DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Examiner acknowledges the amending of claims 1-7, 9-19 and the cancellation of claims 8 and 20.
Claim Interpretation
Claims 7 and 9 refer to the capacitor section as being “constituted of a pn junction structure that is equivalent to the light emitting element provided on the semiconductor substrate” or “constituted of a structure that is equivalent to the light emitting elements”.
This is understood to mean the capacitor is formed of the same material as the light emitting element(s).
Claim Objections
The previous claim objections are withdrawn due to the current amendments.
Claim Rejections - 35 USC § 112
The previous 112 rejections are withdrawn due to the current amendments.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
The Examiner agrees that the currently filed amendments differentiate from the previously applied interpretation of the Ono reference. An updated interpretation of the reference is made use of in the new rejections below.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 102a1/2 as being anticipated by Ono (US 2020/0096895).
With respect to claim 1, Ono discloses a light emitting device (fig.1, 4, 5, 6, 7, 11-12) comprising: a light emitting section (fig.4a U) that includes a light emitting element (fig.4a/7 L3); a capacitance section connected to the light emitting section (fig.4a/7 L4, fig.11-12, C1/C2 internal to each L); and a control section (fig.12 voltage inputs, especially at GI) that controls a potential of the capacitance section when the light emitting element of the light emitting section emits light (fig.12 showing the applied potentials to the Ls during 3 operating states- fig.12a off, 12b just on, 12c steady state on; note potentials at GI changing), wherein the capacitance section is constituted of a pn junction that is a structure that is equivalent to the light emitting element (as the capacitors are induced/parasitic from the emitters, [0308]) provided on the semiconductor substrate (fig.4a #80, [0055]), and the control section applies, to the capacitance section, a potential that does not apply a forward bias to the pn junction when a light emission current flowing through the light emitting section is on (fig.7/12- when L3 on, L4 off; L3 is at operating state shown in fig.12c, L4 then is at operating state shown in fig.12a).
With respect to claim 7, Ono discloses the light emitting section and the capacitance section are provided on a single semiconductor substrate (fig.4a #80, [0055]), and the light emitting section and the capacitance section are connected to each other through the semiconductor substrate (as seen in fig.4a #80).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ono.
With respect to claim 2, Ono teaches the control section sets the potential of the capacitance section to a first potential when a light emission current flowing through the light emitting section is on (fig.7- L3 is on and corresponds to fig.12c, L4 is off and corresponds to fig.12a). Ono does not teach the control section sets the potential of the capacitance section to a first potential when a light emission current flowing through the light emitting section is on and the control section sets the potential of the capacitor section from the first potential to a second potential that is higher in absolute value than the first potential when the light emission current flowing through the light emitting section is turned from on to off. Ono does further teach operation in which 2 light emitters are both on (fig.7, e.g. L1/L2) as well as extensive control description for the emitters and circuit ([0191+]), but does not specify L3/L4 are switched to be on/on then on/off. It would have been obvious to one of ordinary skill in the art before the filing of the instant application to utilize the extensive controls of Ono to enable any combination of on and off operation for the emitters L3/L4 (such as on/on, on/off, off/on, off/off) as Ono has demonstrated the capability of having varied on/off sequences and it would allow for the ability to control light levels output from the device and/or allow for light sources to cool while other sources operate in their place.
After modification Ono then teaches: the control section sets the potential of the capacitance section to a first potential when a light emission current flowing through the light emitting section is on (when both L3/L4 are on, both would be at operating state shown in fig.12c at -2.16V) and the control section sets the potential of the capacitor section from the first potential to a second potential that is higher in absolute value than the first potential when the light emission current flowing through the light emitting section is turned from on to off (when both L3/4 are off, both would be at operating state shown in fig.12a at -3.3V, which is higher than 2.16).
With respect to claim 3, Ono teaches a drive section (fig.5 #110) connected to the light emitting section and the capacitance section to turn on or off the light emission current flowing through the light emitting section (fig.12b switch closed), wherein the control section sets the potential of the capacitance section from the first potential to the second potential in accordance with a timing when the drive section turns the light emission current from on to off (when L3/L4 going from both on to both off).
With respect to claim 4, Ono teaches the light emitting section has a first capacitance (fig.12 C2) in parallel with the light emitting element, the capacitance section has a second capacitor (fig.12 C1), and the first potential or the second potential is a potential at which a displacement current flows through the first capacitance and the second capacitance in a series connection state (current flows serially through both when both on, see fig.11b).
With respect to claim 5, Ono teaches, the second capacitance (fig.12 C1, 100pF) has a value that is as much as that of the first capacitance (fig.12 C2, 40pF) or more.
With respect to claim 6, Ono teaches the second capacitance has a value that is four times as much as that of the first capacitance or less (fig.12 C1 100pf, C2 40pF, C1/C2 = 2.5).
Claim(s) 9-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ono in view of Kondo (US 2019/0086831).
With respect to claim 9, Ono teaches the device outlined above, including the light emitting section includes a plurality of light emitting elements (fig.4a multiple Ls), the capacitance section is constituted of a structure that is equivalent to the light emitting elements (as fig.11/12 shows the equivalent circuit of the Ls), the light emitting device includes a select section that selects a light emitting element to be caused to emit light (fig.5 T/Qt/Qw/W). Ono does not teach the select section is stacked on the capacitance section. Kondo teaches a related emission device (fig.1-5) which includes a selection element (fig.7a S) stacked atop the emission element (fig.7a LED). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to stack the selection element section atop the capacitance section (noting the capacitance section being equivalent to the emission section) as Kondo has demonstrated such an arrangement and which would provide a compact device able to be formed in a single processing batch (see also MPEP 2144.04 V B).
With respect to claim 10, Ono, as modified, further teaches during light emission in which the selected light emitting element is caused to emit light, the control section sets the capacitance section to a potential that is different from that during selection in which the select section selects the light emitting element to be caused to emit light (L3 on corresponding to fig.12c -2.16V, L4 off corresponding to fig.12a -3.3V).
With respect to claim 11, Ono, as modified, teaches the device outlined above, but does not teach the control section sets the potential of the capacitance section to a first potential when the select section makes the selection, and sets the potential of the capacitor section to a second potential that is higher in absolute value than the first potential when the select section has ended the selection. Ono does further teach operation in which 2 light emitters are both on (fig.7, e.g. L1/L2) as well as extensive control description for the emitters and circuit ([0191+]), but does not specify L3/L4 are switched to be on/on then on/off. It would have been obvious to one of ordinary skill in the art before the filing of the instant application to utilize the extensive controls of Ono to enable any combination of on and off operation for the emitters L3/L4 (such as on/on, on/off, off/on, off/off) as Ono has demonstrated the capability of having varied on/off sequences and it would allow for the ability to control light levels output from the device and/or allow for light sources to cool while other sources operate in their place.
After modification Ono then teaches: the control section sets the potential of the capacitance section to a first potential when the select section makes the selection (when both L3/L4 on, fig.12c), and sets the potential of the capacitor section to a second potential that is higher in absolute value than the first potential when the select section has ended the selection (when both L3/L4 off, fig.12a; 3.3 more than 2.16).
Claim(s) 13-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenius (US 9368936).
With respect to claims 13-20, Ono teaches the device outlined above, but does not teach a measurement apparatus that measures a three-dimensional shape of an object to be measured, the measurement apparatus comprising: the light emitting device according to claim 1; and a light receiving section that receives light output from the light emitting section of the light emitting device and reflected by the object to be measured. Lenius teaches a similar light emission device using plural semiconductor light emitters (fig.5a/5e) and the use thereof in a measurement apparatus that measures a three-dimensional shape of an object to be measured, the apparatus comprising: the semiconductor emitters; and a light receiving section that receives light output from the light emitting section of the light emitting device and reflected by the object to be measured (fig.4a col.14 line 63 – col.15 line 15, mapping of multiple 3d positions equates to measuring a shape). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the system of Ono to be used in a LIDAR system with receiver and measurement ability as taught by Lenius in order to create 3d maps of environments.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Please see the previous pto892 form for a list of related art to Ono.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOD THOMAS VAN ROY whose telephone number is (571)272-8447. The examiner can normally be reached M-F: 8AM-430PM.
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/TOD T VAN ROY/ Primary Examiner, Art Unit 2828