DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is made non-final.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/06/2026 and 06/08/2026 has been entered. Claims 1-20 are pending. Claims 1 and 11 are independent claims.
Response to Arguments
Applicant’s arguments dated 5/6/2026, regarding the 35 U.S.C. 112(f) interpretations of the previous office action have been fully considered, and are persuasive. Due to the amendments, the 112(f) interpretation no longer applies to claims 1-10.
Applicant’s arguments dated 5/6/2026, regarding the 35 U.S.C. 103 rejections of the previous office action have been fully considered, but are unpersuasive – see the updated 103 rejections below.
Applicant argues that Martin does not teach “based on the selected weight sparsity arrangement”, because Martin does not teach a “selection between structured and random arrangement”. The examiner argues that if Martin teaches a weight buffer that works in combination with a sparsity map to provide a “sparsity arrangement” (¶141, A sparsity map for the weights may be provided with weights 302 by a respective weight buffer 240), then that sparsity arrangement can be interpreted as a “selected weight sparsity arrangement”. Claim 1 does not recite a specific selecting process or selecting step based on some criteria, and additionally, Martin’s weights + sparsity map would be capable of representing a “structured” or a “random” arrangement.
Applicant argues that Xiao fails to teach a sparsity arrangement for actual weight values because Xiao utilizes sparsity in bitmaps, and not in weights. Examiner respectfully disagrees that Xiao’s use of bitmaps, which are used in combination with weights, is distinctive from the claimed weight sparsity arrangements. The amended claim 1 recites: “a weight buffer comprising an array of weight registers configured to store weight values in an arrangement selected from a group comprising a structured weight sparsity arrangement and a random weight sparsity arrangement…” Nothing in this claim limitation describes a weight sparsity arrangement as consisting solely of weights, or in other words, nothing in this claim limitation prevents the examiner’s broadest reasonable interpretation (BRI) of “weight sparsity arrangement” as encompassing a set of weights and a corresponding sparsity bitmap/mask. The claim also recites: “a weight multiplexer array configured to output one or more weight values stored in the weight buffer as first operand values based on the selected weight sparsity arrangement” which is also in line with the examiner’s BRI – outputting weight values based on the weight sparsity arrangement, i.e., utilizing a bitmap to determine which weight values have not been sparsified, and outputting those non-sparsified weights. Although the examiner’s BRI of the claim encompasses weights in combination with a sparsity map, Martin ¶142 does describe an embodiment that includes weight sparsity without using a map structure: (¶142, In some examples, sparsity maps distinct from the weights/input data are not generated and the control block determines whether each weight/data value is zero from the weights/data values themselves at the point the control provides each weight-data value pair for evaluation at the multiplication logic)
Applicant argues that Xiao does not select one arrangement from a group. The examiner argues that in Xiao ¶27, separate sparsity arrangements are discussed, one of which is a structured arrangement, and one of which is a random arrangement. Xiao introduces two possible arrangements for sparse matrices, and additionally explains how arrangements might differ (¶27, as there may be a tradeoff between theoretically a more accurate outcome using less a less aggressive sparsing techniques versus computational savings using a more aggressive sparsing techniques). The use of a sparsity arrangement is already taught by Martin, as addressed in the response to A and in the updated rejection.
Applicant argues that Xiao’s unstructured sparsity is not equivalent to random sparsity. Examiner argues that Xiao discusses random sparsity in ¶27, (¶27, Therefore, sparse matrix 115 of FIG. 1A may have a random non-zero element distribution and an unstructured sparsity) and that the BRI of “random weight sparsity arrangement” encompasses weights/zeroes that are randomly distributed within a parameter tensor – see the updated rejection below.
Applicant argues that Xiao is improperly isolated. Examiner respectfully disagrees. Xiao is relied on in the current rejection only to teach that, among the sparsity arrangements that can possibly be represented by Martin’s use of weight buffers, multiplexers and sparsity maps, it would be an obvious modification to use a single arrangement from a group of arrangements that contains at least a structured arrangement and a random arrangement. The device taught by Martin is already capable of handling the structured or random arrangements distinctly pointed out by Xiao, through the use of sparsity maps.
Applicant argues that there is no articulated rationale to combine Martin and Xiao. Examiner argues that Martin’s operation is well-equipped to handle any sparsity arrangement representable by using sparsity maps. Applicant describes that “The architectural modality – where the hardware organization and dataflow depend on the selected sparsity arrangement-is entirely absent from both Martin and Xiao”. The examiner argues that the “hardware organization” (i.e., buffers and multiplexers, described in Figs. 2 and 3) and “dataflow” (Martin, Fig. 3 describes dataflow) of Martin is capable of performing the functionality described in claim 1. Claim 1 does not provide any details on how the “hardware organization” or “dataflow” differs between the “structured weight sparsity arrangement” and “random weight sparsity arrangement”. As Xiao is used to teach choosing between two specific sparsity arrangements, the examiner argues that the cited rationale, which recognizes that there may be an accuracy/speed tradeoff between different sparsity arrangements, is sufficient motivation to combine – see the updated rejection below.
Applicant argues that Xiao does not disclose mutually exclusive configuration of a weight buffer. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Applicant states that “Claim 1 is directed to a weight buffer configured to store weight values in an arrangement that comprises one of the recited sparsity arrangements. This limitation imposes a structural and operational constraint on the weight buffer itself-namely, that the organization of stored weight values and the corresponding dataflow are governed by a single selected sparsity regime.” While examiner agrees that the limitation imposes a structural and operational constraint on the weight buffer, examiner notes that as claimed, the weight buffer can be compatible with both (or many) selectable sparsity schemes, as long as it has the functionality to operate on one of them at a time.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 6-11 and 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martin et al. (US 20190147327 A1), herein Martin, in view of Xiao et al. (US 20210240684 A1, INCLUDED IN IDS), herein Xiao.
Regarding claim 1, Martin teaches: A neural processing unit, comprising: a weight buffer comprising an array of weight registers configured to store weight values (Fig. 3, weight register 306 is a part of the neuron engine 245 that is replicated in Fig. 2 – see Fig. 2, 245a-n – the array of weight registers reads on the recited “weight buffer”) in a selected sparsity arrangement… a weight multiplexer array configured to output one or more weight values stored in the weight buffer as first operand values based on the selected weight sparsity arrangement (¶141, A sparsity map for the weights may be provided with weights 302 by a respective weight buffer 240 – Martin teaches utilizing a sparsity map alongside weights, which can represent any selected sparsity arrangement – the sparsity map defines the “selected sparsity arrangement”, and the claim recites no selecting step performed by the neural processing units that determines what sparsity arrangement to use (selecting an arrangement based on criteria, random choice, user preference, etc.) – also see ¶140, The control block 304 may be configured to identify whether each input datum or its respective weight are zero. If either the input datum or its respective weight are zero, the datum-weight pair is skipped and not processed. The next non-zero operation may instead be performed on the same cycle. This can be achieved through the use of multiplexers 307 and 308 – and – Fig. 3, neuron engine 245 contains a weight and input multiplexer); an activation buffer comprising an array of activation registers configured to store activation values (Fig. 3, input register 306 is a part of the neuron engine 245 that is replicated in Fig. 2 – see Fig. 2, 245a-n – these inputs can be the outputs, i.e., activations, of a previous layer as described in ¶120, Sparsity in input data may occur for the following reasons: Activation Function… Data sparsity is generally higher following a ReLU activation layer, as this function clamps all negative values to zero); an activation multiplexer array comprising inputs to the activation multiplexer array coupled to the activation buffer, the activation multiplexer array configured to output one or more activation values stored in the activation buffer as second operand values, each respective second operand value and a corresponding first operand value forming an operand value pair (Fig. 3, multiplexer 307); and a multiplier array configured to output a product value for each operand value pair (Fig. 3, multiplier 309 and ¶40, The multiplication logic may comprise a plurality of multipliers arranged to concurrently combine a plurality of weights with a plurality of corresponding data values).
Martin fails to explicitly teach: an arrangement selected from a group comprising a structured weight sparsity arrangement and a random weight sparsity arrangement, wherein the selected arrangement comprises one of the structured weight sparsity arrangement or the random weight sparsity arrangement…
However, in the same field of endeavor, Xiao teaches: an arrangement selected from a group comprising a structured weight sparsity arrangement and a random weight sparsity arrangement, wherein the selected arrangement comprises one of the structured weight sparsity arrangement or the random weight sparsity arrangement… (¶27, Sparsifying 110 of FIG. 1A may not provide spatial predictability in selecting elements not to set to zero because the elements with the largest absolute values may be distributed anywhere in matrix 111. Therefore, sparse matrix 115 of FIG. 1A may have a random non-zero element distribution and an unstructured sparsity – Xiao discloses one arrangement, a sparse matrix with a random non-zero element distribution, i.e., a random weight sparsity arrangement – and – ¶27, Sparsifying 120 of FIG. 1B can provide a spatial predictability because the non-zero elements are selected according to a certain rule (e.g., first element of each row). Therefore, sparse matrix 125 of FIG. 1B may have a regular non-zero element distribution and a structured sparsity – Xiao discloses a separate arrangement involving a structured non-zero element distribution, i.e., a structured weight sparsity arrangement. Both of these arrangements are compatible with the sparsity bitmaps).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a weight value arrangement selected from a group comprising a structured weight sparsity arrangement or an unstructured sparsity arrangement as disclosed by Xiao in the unit disclosed by Martin to balance accuracy and efficiency (¶27, as there may be a tradeoff between theoretically a more accurate outcome using less a less aggressive sparsing techniques versus computational savings using a more aggressive sparsing techniques).
Regarding claim 6, Martin teaches: The neural processing unit of claim 1, wherein the weight values are stored in the weight buffer in the… weight sparsity arrangement (¶198, Packing the weights for sparsity with all of the zero weights at one end), the neural processing unit further comprising a control unit configured to control the activation multiplexer array to select and output one or more activation values stored in the activation buffer based on the… weight sparsity arrangement (¶140, The control block 304 may be configured to identify whether each input datum or its respective weight are zero. If either the input datum or its respective weight are zero, the datum-weight pair is skipped and not processed… This can be achieved through the use of multiplexers 307 and 308 which are configured to pass to the multiplication logic 309 (in this case a multiplier) only on those datum-weight pairs where both the datum and weight are non-zero – this method handles weights and activations under any sparsity arrangement).
Martin fails to explicitly teach: structured weight sparsity… structured…
However, in the same field of endeavor, Xiao teaches: structured weight sparsity (¶27, Sparsifying 120 of FIG. 1B can provide a spatial predictability because the non-zero elements are selected according to a certain rule (e.g., first element of each row). Therefore, sparse matrix 125 of FIG. 1B may have a regular non-zero element distribution and a structured sparsity).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a structured weight sparsity arrangement or an unstructured sparsity arrangement as disclosed by Xiao in the unit disclosed by Martin to balance accuracy and efficiency (¶27, as there may be a tradeoff between theoretically a more accurate outcome using less a less aggressive sparsing techniques versus computational savings using a more aggressive sparsing techniques).
Regarding claim 7, Martin teaches: The neural processing unit of claim 1, wherein the weight values are stored in the weight buffer in the random weight sparsity arrangement (¶118, Zero pruning is a process that can be performed during mapping, where very small non-zero weights can be set to zero in order to increase the sparsity – zero pruning would result in a random sparsity arrangement), the neural processing unit further comprising a control unit configured to control the activation multiplexer array to select and output one or more activation values stored in the activation buffer based on the random weight sparsity arrangement of the weight values (¶140, The control block 304 may be configured to identify whether each input datum or its respective weight are zero. If either the input datum or its respective weight are zero, the datum-weight pair is skipped and not processed… This can be achieved through the use of multiplexers 307 and 308 which are configured to pass to the multiplication logic 309 (in this case a multiplier) only on those datum-weight pairs where both the datum and weight are non-zero – this method handles weights and activations under any sparsity arrangement).
Regarding claim 8, Martin teaches: The neural processing unit of claim 7, wherein the activation values are stored in the activation buffer in a random activation sparsity arrangement (¶126, When converting the data into a fixed point format at a particular bit depth, some small values may become zero. The lower the bit depth used, the more zeros are likely to be introduced into the data – quantization would result in a random sparsity arrangement), and wherein the control unit is further configured to control the activation multiplexer array to select and output the one or more activation values based on the random weight sparsity arrangement and on the random activation sparsity arrangement (¶140, The control block 304 may be configured to identify whether each input datum or its respective weight are zero. If either the input datum or its respective weight are zero, the datum-weight pair is skipped and not processed… This can be achieved through the use of multiplexers 307 and 308 which are configured to pass to the multiplication logic 309 (in this case a multiplier) only on those datum-weight pairs where both the datum and weight are non-zero).
Regarding claim 9, Martin teaches: The neural processing unit of claim 8, wherein the control unit is further configured to select and output the one or more activation values based on an ANDing of an activation zero- bit mask of activation values stored in the activation buffer and a weight zero-bit mask of weight values stored in the weight buffer (¶141, A sparsity map for the input data may be provided with input data 301 by the input buffer 235. A sparsity map for the weights may be provided with weights 302 by a respective weight buffer 240. By combining the pair of sparsity maps the control block may readily determine which of the datum-weight pairs includes a zero value).
Regarding claim 10, Martin teaches: The neural processing unit of claim 1, wherein the weight multiplexer array comprises four multiplexers, the activation multiplexer array comprises four second multiplexers and the multiplier array comprises four multipliers (Fig. 3, each neuron engine has a weight multiplexer 308, an input (i.e., activation) multiplexer 307, and a multiplier 309 – if there were 4 neuron engines, there would be 4 of each component – ¶138, Any number of neuron engines can theoretically be included in a hardware implementation 200, allowing the design to be scaled with a fine granularity).
Regarding claim 11, it recites similar limitations to claim 1 and is rejected on the same grounds – see above.
Regarding claim 15, it recites similar limitations to claim 6 and is rejected on the same grounds – see above.
Regarding claim 16, it recites similar limitations to claim 7 and is rejected on the same grounds – see above.
Regarding claim 17, it recites similar limitations to claim 8 and is rejected on the same grounds – see above.
Regarding claim 18, it recites similar limitations to claim 9 and is rejected on the same grounds – see above.
Regarding claim 19, Martin teaches: The neural processing unit of claim 17, wherein the weight multiplexer is part of an array of weight multiplexers, the activation multiplexer is part of an array of activation multiplexers, and the multiplier unit is part of an array of multipliers (Fig. 3, a neuron engine 245 contains a weight 308 and input 307 multiplexer, also see Fig. 2, which contains a plurality of neuron engines 245, i.e. an array of multiplexers and multipliers).
Regarding claim 20, it recites similar limitations to claim 19 and is rejected on the same grounds – see above.
Claim(s) 2 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Xiao as applied to claim 1 above, and further in view of Moshovos et al. (US 20210004668 A1), herein Moshovos.
Regarding claim 2, Martin in view of Xiao fails to teach: The neural processing unit of claim 1, wherein the weight multiplexer array is further configured to select the one or more weight values in a lookahead manner, and wherein the activation multiplexer array is further configured to select the one or more activation values in the lookahead manner.
However, in the same field of endeavor, Moshovos teaches: wherein the weight multiplexer array is further configured to select the one or more weight values in a lookahead manner (¶36, allowing schedules where only two intra-filter weight movements are permitted: a lookahead movement and a lookaside movement), and wherein the activation multiplexer array is further configured to select the one or more activation values in the lookahead manner (¶47, For each weight wi processed by tile 7000 there are h+1 activations, Ai,0 through Ai,h, that correspond to a lookahead window of h activations).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select weights and activations in a lookahead manner as disclosed by Moshovos in the unit disclosed by Martin in view of Xiao to improve flexibility and efficiency (¶36, weight scheduling flexibility may be balanced with energy and area efficiency).
Regarding claim 12, it recites similar limitations to claim 2 and is rejected on the same grounds – see above.
Claim(s) 3, 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Xiao and Moshovos as applied to claim 2 above, and further in view of Ovsiannikov et al. (US 20190392287 A1), herein Ovsiannikov.
Regarding claim 3, Martin in view of Xiao fails to teach: The neural processing unit of claim 2, wherein the weight multiplexer array is further configured to select the one or more weight values in a lookaside manner…
However, in the same field of endeavor, Moshovos teaches: wherein the weight multiplexer array is further configured to select the one or more weight values in a lookaside manner (¶36, only two intra-filter weight movements are permitted: a lookahead movement and a lookaside movement).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select weights in a lookaside manner as disclosed by Moshovos in the unit disclosed by Martin in view of Xiao to improve flexibility and efficiency (¶36, weight scheduling flexibility may be balanced with energy and area efficiency).
Martin in view of Xiao and Moshovos fails to teach: and wherein the activation multiplexer array is further configured to select the one or more activation values in the lookaside manner.
However, in the same field of endeavor, Ovsiannikov teaches: and wherein the activation multiplexer array is further configured to select the one or more activation values in the lookaside manner (¶343, As mentioned earlier in the description of those drawings, the ability to retrieve (and multiplex in) data from one lane above and below may be referred to as a “look-aside of 1”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select activations in a lookaside manner as disclosed by Ovsiannikov in the unit disclosed by Martin in view of Xiao and Moshovos to improve efficiency (¶258, The neural processor may be configured to efficiently calculate a convolution or a tensor product of an input feature map (IFM) (or a tensor of “activations”) with a multi-dimensional array (or tensor) of weights, to form an output feature map).
Regarding claim 4, Martin in view of Xiao fails to teach: The neural processing unit of claim 3, wherein the weight multiplexer array is configured to select the one or more weight values in a lookahead of at least 3 timeslots and in a lookaside of 1 channel.
However, in the same field of endeavor, Moshovos teaches: wherein the weight multiplexer array is configured to select the one or more weight values in a lookahead of at least 3 timeslots (¶36, A lookahead movement allows an effectual weight to advance in step to replace an ineffectual weight… h is a lookahead depth which is linked to the number of activation values that must be made available -- and – ¶80, Accordingly, setting a lookahead and lookaside pair to (2, 5) or (4, 3) may be a reasonable compromise configuration for many embodiments and situations – (4,3) meaning a lookahead depth of 4, which is at least 3) and in a lookaside of 1 channel (¶36, lookaside movement allows an effectual weight to replace an ineffectual weight in a different lane, for example effectual weight… may be advanced one time step and shifted d lanes to replace ineffectual weight – and – ¶42, Accelerator 6000 employs a lookaside structure in which d has been set to 1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select weights with a lookahead of at least 3 and a weight lookaside of 1 as disclosed by Moshovos in the unit disclosed by Martin in view of Xiao to improve flexibility and efficiency (¶36, weight scheduling flexibility may be balanced with energy and area efficiency).
Martin in view of Xiao and Moshovos fails to teach: and wherein the activation multiplexer array is configured to select the one or more activation values in a lookahead of at least 3 time slots and in a lookaside of at least 2 channels.
However, in the same field of endeavor, Ovsiannikov teaches: and wherein the activation multiplexer array is configured to select the one or more activation values in a lookahead of at least 3 time slots and in a lookaside of at least 2 channels (¶344, The look-aside and/or look-ahead may be greater than two… skipping zero activations – the lookahead greater than 2 is at least 3, and the lookahead greater than 2 includes values like 3, 4, 5, etc. that are at least 2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select activations with a lookahead of at least 3 and a lookaside of at least 2 as disclosed by Ovsiannikov in the unit disclosed by Martin in view of Xiao and Moshovos to improve efficiency (¶258, The neural processor may be configured to efficiently calculate a convolution or a tensor product of an input feature map (IFM) (or a tensor of “activations”) with a multi-dimensional array (or tensor) of weights, to form an output feature map).
Regarding claim 13, it recites similar limitations to claim 3 and is rejected on the same grounds – see above.
Claim(s) 5 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Xiao as applied to claim 1 above, and further in view of Moshovos and Ovsiannikov.
Regarding claim 5, Martin in view of Xiao fails to teach: The neural processing unit of claim 1, wherein the weight multiplexer array is further configured to select the one or more weight values in a lookaside manner.
However, in the same field of endeavor, Moshovos teaches: wherein the weight multiplexer array is further configured to select the one or more weight values in a lookaside manner (¶36, allowing schedules where only two intra-filter weight movements are permitted: a lookahead movement and a lookaside movement).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select weights in a lookaside manner as disclosed by Moshovos in the unit disclosed by Martin in view of Xiao to improve flexibility and efficiency (¶36, weight scheduling flexibility may be balanced with energy and area efficiency).
Martin in view of Xiao and Moshovos fails to teach: and the activation multiplexer array is further configured to select the one or more activation values in the lookaside manner.
However, in the same field of endeavor, Ovsiannikov teaches: and the activation multiplexer array is further configured to select the one or more activation values in the lookaside manner (¶343, As mentioned earlier in the description of those drawings, the ability to retrieve (and multiplex in) data from one lane above and below may be referred to as a “look-aside of 1”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select activations in a lookaside manner as disclosed by Ovsiannikov in the unit disclosed by Martin in view of Xiao and Moshovos to improve efficiency (¶258, The neural processor may be configured to efficiently calculate a convolution or a tensor product of an input feature map (IFM) (or a tensor of “activations”) with a multi-dimensional array (or tensor) of weights, to form an output feature map).
Regarding claim 14, it recites similar limitations to claim 5 and is rejected on the same grounds – see above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRISON CHAN YOUNG KIM whose telephone number is (571)272-0713. The examiner can normally be reached Monday - Friday 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Cesar Paula can be reached at (571) 272-4128. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HARRISON C KIM/ Examiner, Art Unit 2145
/CHAU T NGUYEN/ Primary Examiner, Art Unit 2145
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