Prosecution Insights
Last updated: April 19, 2026
Application No. 17/982,572

APPARATUSES, SYSTEMS, AND METHODS FOR RELAXATION-OSCILLATOR-BASED THERMAL SENSING

Non-Final OA §103§112
Filed
Nov 08, 2022
Examiner
LAM, TUAN THIEU
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Advanced Micro Devices, Inc.
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
2y 1m
To Grant
91%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
775 granted / 1001 resolved
+9.4% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
34 currently pending
Career history
1035
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
36.8%
-3.2% vs TC avg
§102
36.3%
-3.7% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1001 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This is a response to the amendment filed 1/22/2026. Claims 1-2, 4, 7-8 and 10-24 are pending and are under examination. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 12 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In this instant, the specification has failed to describe as to how “a first metal-oxide-semiconductor field-effect transistor configured to charge a node via leakage current flowing through the first metal-oxide-semiconductor field-effect transistor while the first metal-oxide-semiconductor field-effect transistor is in an off-state leak charge; and the second relaxation oscillator comprises a second metal-oxide-semiconductor field-effect transistor configured to charge a node via leakage current flowing through the first metal-oxide- semiconductor field-effect transistor while the first metal-oxide-semiconductor field-effect transistor is in an off-state leak charge” realized at the time the application was filed. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 11-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 11, the recitation of “the number of oscillations” is indefinite because it is unclear as to this refers to the first number of oscillations or the second number of oscillations recited in claim 1. Thus, the metes and bounds of the claim cannot be determined renders the claim indefinite. In claim 12, the recitation of “a first metal-oxide-semiconductor field-effect transistor configured to charge a node via leakage current flowing through the first metal-oxide-semiconductor field-effect transistor while the first metal-oxide-semiconductor field-effect transistor is in an off-state leak charge; and the second relaxation oscillator comprises a second metal-oxide-semiconductor field-effect transistor configured to charge a node via leakage current flowing through the first metal-oxide- semiconductor field-effect transistor while the first metal-oxide-semiconductor field-effect transistor is in an off-state leak charge” is indefinite because it is unclear as to how the recited FET (512(a) and 512(b)) charge a node while it is an off state leak charge. Thus, the metes and bounds of the claim cannot be determined renders the claim indefinite. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 4, 7-8 and 10-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishi (USP 7,387,435) in view of Magod Ramakrishna (US 2020/0228101). Regarding claims 1, 17 and 20, Kishi’s figures 1 and 15 shows An apparatus for oscillator-based thermal sensing, the apparatus comprising: a first oscillation count circuit comprising a first oscillator (20-1, 31 (figure 15)) to produce a first oscillating voltage and a first counter (31; figure 15) configured to count a first number of oscillations produced by the first oscillator (20-1); a second oscillation count circuit comprising a second oscillator (20-2; figure 15; 35) to produce a second oscillating voltage and a second counter (35) configured to count a second number of oscillations produced by the second oscillator (20_2); and a subtraction circuit (34) configured to subtract the second number of oscillations from the first number of oscillations to generate a count difference. The difference seen between Kishi reference and the present invention is that Kishi does not disclose: (1) the first and second oscillators (20-1 and 20-2) being relaxation oscillators; (2) wherein the first oscillation count circuit and the second oscillation count circuit use different reference voltages as called for in claims 1, 17 and 20. Regarding the difference noted in item (1), Kishi suggests that the first and second oscillators can be constructed with any general oscillators (column 1, lines 65-67; column 6, lines 13-15; column 7, lines 35-13). Furthermore, Magod Ramakrishna teaches that relaxation oscillators have low power consumption (paragraph 0015). Therefore, it would have been obvious to person skilled in the art before the effective filing date of the invention to have Kishi’s first and second oscillators being relaxation oscillators for the reason taught by Magod Ramakrishna reference. Regarding the difference noted in item (2), Kishi’s abstract suggests that the frequency of the first and second oscillators (20-1, 20-2) are different. Ramakrishna’s figure 2a discloses a relaxation oscillation circuit whose output frequency determined/varied when the reference voltage Vtrip is varied (see figures 2a, 2b, paragraphs 0026-0038). Thus, one skilled in the art would have recognized that Kishi’s first and second oscillation count circuit would have used different reference voltages in order to obtain different output frequency, respectively. Therefore, it would have been obvious to person skilled in the art before the effective filing date of the present invention to have the different reference voltages Vtrip used by first and second oscillation count circuit the purpose of providing different output frequency as taught by Ramakrishna reference. Regarding claim 2, Kishi’s first oscillation count circuit and the second oscillation circuit count module are adjacent to each other. Regarding claim 4, Magod Ramakrishna’s figure 2a shows the first relaxation oscillator (Kishi’s first oscillator replaced by Magod Ramakrishna’s relaxation oscillator as noted in the above) comprises a first voltage comparator (206) configured to compare the first oscillating voltage (VRAMP) with a first reference voltage (Vtrip), wherein the first counter (Kishi’s counter 31) is configured to count an oscillation based on output from the first voltage comparator; and the second relaxation oscillator (Kishi’s second oscillator replaced by Magod Ramakrishna’s relaxation oscillator as noted in the above) comprises a second voltage comparator (206) configured to compare the second oscillating voltage (VRAMP) of with a second reference voltage (Vtrip), wherein the second counter (Kishi’s counter 35 is configured to count an oscillation based on output from the second voltage comparator. Regarding claim 7, the first oscillation count circuit further comprises a first reset delay circuit (inverters 218a, 218b, 220a and 220b, Magod Ramakrishna’s figure 2a) configured to delay an output signal from the first voltage comparator; and the second oscillation count circuit further comprises a second reset delay circuit (inverters 218a, 218b, 220a and 220b, Magod Ramakrishna’s figure 2a) configured to delay an output signal from the second voltage comparator. Regarding claim 8, wherein a first reset delay element and the second reset delay element are configured to differ to produce differing delays since Kishi’s first and second oscillators are having different oscillation frequency characteristic from one another (see Kishi’s abstract). Regarding claim 10, wherein the apparatus is capable of being configured to be disposed in a lower metal layer of a multi metal layers of a chip. Regarding claim 11, wherein the number of oscillations is driven by charge leakage (transistor 20, Magod Ramakrishna’s figure 2a). Regarding claim 12, insofar as understood, the first relaxation oscillator comprises a first metal-oxide-semiconductor field-effect transistor (210; Magao Ramakrishna’s figure 2a) to charge configured to leak charge (discharge); and the second relaxation oscillator comprises a second metal-oxide-semiconductor field- effect transistor (210; Magao Ramakrishna’s figure 2a) configured to leak charge (discharge). Regarding claims 13-16, the combination of Kishi and Mago Ramakrishna reference does not show a frequency circuit configured to divide the count difference by a period of time to output a current temperature value; an averaging module configured to average the current temperature value over a period of time to output an average temperature value; a comparison module configured to: compare the average temperature value with the current temperature value; and generate a temperature alarm signal in response to the current temperature value exceeding the average temperature value by a predetermined amount. However, it is so apparent that Kishi’s temperature signal 90 would have been capable of further processed by a frequency module configured to divide the count difference by a period of time to output a current temperature value; an averaging module configured to average the current temperature value over a period of time to output an average temperature value; a comparison module configured to: compare the average temperature value with the current temperature value; and generate a temperature alarm signal in response to the current temperature value exceeding the average temperature value by a predetermined amount. Therefore, outside of any non-obvious results, the obviousness of further processing Kishi’s temperature signal using the recited technique in claims 13-16 would not be patentable under 35USC 103. Regarding claim 18, Kishi’s figure 16 shows further comprising an alarm circuit (74, 71) configured to generate, based at least in part on the count difference, a temperature alarm signal (output from 71). Regarding claim 19, further comprising a remediation circuit (72) configured to, in response to the temperature alarm signal, perform a remediation action (compensating signal 93). Regarding claim 21, wherein the remediation action (72) is selected based on a location of the thermal sensor (10). Regarding claim 22, the first relaxation oscillator comprises a first metal-oxide-semiconductor field-effect transistor (204; Magao Ramakrishna’s figure 2a) configured to leak charge (discharge); and the second relaxation oscillator comprises a second metal-oxide-semiconductor field- effect transistor (204; Magao Ramakrishna’s figure 2a) configured to leak charge (discharge). Regarding claims 23-24, the combination of Kishi and Mago Ramakrishna reference does not show a frequency circuit configured to divide the count difference by a period of time to output a current temperature value; an averaging module configured to average the current temperature value over a period of time to output an average temperature value; a comparison module configured to: compare the average temperature value with the current temperature value; and generate a temperature alarm signal in response to the current temperature value exceeding the average temperature value by a predetermined amount. However, it is so apparent that Kishi’s temperature signal 90 would have been capable of further processed by a frequency module configured to divide the count difference by a period of time to output a current temperature value; an averaging module configured to average the current temperature value over a period of time to output an average temperature value; a comparison module configured to: compare the average temperature value with the current temperature value; and generate a temperature alarm signal in response to the current temperature value exceeding the average temperature value by a predetermined amount. Therefore, outside of any non-obvious results, the obviousness of further processing Kishi’s temperature signal using the recited technique in claims 23-24 would not be patentable under 35USC 103. Response to Arguments Applicant's arguments filed 1/22/2026 have been fully considered but they are not persuasive. Applicant argues that Magod Ramakrishna's Figure 2A discloses a single oscillator. Thus, it cannot be said that Magod Ramakrishna discloses the claim language "wherein the first oscillation count circuit and second oscillation count circuit use different reference voltages" because Ramakrishna simply does not disclose two oscillation count circuits found not persuasive. As noted above, Kishi reference does not disclose the first and second oscillators (20-1 and 20-2) being relaxation oscillators. Kishi suggests that the first and second oscillators can be constructed with any general oscillators (column 1, lines 65-67; column 6, lines 13-15; column 7, lines 35-13). Furthermore, Magod Ramakrishna teaches that relaxation oscillators have low power consumption (paragraph 0015). Therefore, it would have been obvious to person skilled in the art before the effective filing date of the invention to have Kishi’s first and second oscillators being relaxation oscillators for the reason taught by Magod Ramakrishna reference. Furthermore, Kishi’s abstract suggests that the frequency of the first and second oscillators (20-1, 20-2) are different. Ramakrishna’s figure 2a discloses a relaxation oscillation circuit whose output frequency determined/varied when the reference voltage Vtrip is varied (see figures 2a, 2b, paragraphs 0026-0038). Thus, one skilled in the art would have recognized that Kishi’s first and second oscillation count circuit would have used different reference voltages in order to obtain different output frequency, respectively. Therefore, it would have been obvious to person skilled in the art before the effective filing date of the present invention to have the different reference voltages Vtrip used by first and second oscillation count circuit the purpose of providing different output frequency as taught by Ramakrishna reference. Applicant also argues that the purpose of Kishi's invention is incompatible with the proposed modification, which would render Kishi's device inoperable for its intended purpose found not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). The rejection is deemed proper, thus, claims 1-2, 4, 7, 8 and 10-24 remain rejected under 35USC 103 as being unpatentable over Kishi (USP 7,387,435) in view of Magod Ramakrishna (US 2020/0228101). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN THIEU LAM whose telephone number is (571)272-1744. The examiner can normally be reached Monday-Friday, 8:30 am to 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at 571-270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUAN T LAM/Primary Examiner, Art Unit 2843 3/20/2026
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Prosecution Timeline

Nov 08, 2022
Application Filed
Mar 20, 2025
Non-Final Rejection — §103, §112
Jun 10, 2025
Interview Requested
Jun 17, 2025
Applicant Interview (Telephonic)
Jun 17, 2025
Examiner Interview Summary
Aug 27, 2025
Response Filed
Oct 19, 2025
Final Rejection — §103, §112
Jan 22, 2026
Request for Continued Examination
Feb 01, 2026
Response after Non-Final Action
Mar 25, 2026
Non-Final Rejection — §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
91%
With Interview (+13.3%)
2y 1m
Median Time to Grant
High
PTA Risk
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