DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. PCTCN2022127039 filed on 10/24/2022.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5, 9-13, and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Geetha et al. (US2020/0356482), hereinafter Geetha in view of Dawkins et al. (US2014/0047190), hereinafter Dawkins.
Regarding claim 1, Geetha teaches an apparatus comprising:
a central processing unit (CPU) (Geetha, [0024], multicore processor 110A; Fig.1) comprising:
at least two cores (Geetha, [0024], the multiple processing cores 101; Fig.1, core 101);
at least two caching agents (CAs) (Geetha, [0021], cache home agent (CHA); [0024], the multiple CHAs 109; [0026], each CHA 109 includes a cache agent (CA) 117; Fig.1, see CHA 109); and
circuitry to monitor a workload mapped to a CA of the at least two CAs and adjust the workload allocated to the CA to allocation among the CA and at least one other CA of the at least two CAs based on the monitored workload.
Geetha does not explicitly teach circuitry to monitor a workload mapped to a CA of the at least two CAs and adjust the workload allocated to the CA to allocation among the CA and at least one other CA of the at least two CAs based on the monitored workload, as claimed.
However, Geetha in view of Dawkins teaches circuitry to monitor a workload mapped to a CA of the at least two CAs and adjust the workload allocated to the CA to allocation among the CA and at least one other CA of the at least two CAs based on the monitored workload (Geetha, [0023], Each of the processing cores 101 may include a level one (L1) cache and a level two (L2) cache; [0026], The cache agent 117 may further include a last level cache (LLC) slice 102; Dawkins, [0018], each memory manager may be local to and associated with a different portion of clustered memory cache 22. The memory managers typically are independent of one another, and each is configured to allocate and manage individual units of physical memory in its associated portion of clustered memory cache 22; Note – memory managers correspond to cache agents; [0093]; [0094], if information in metadata service data store 80 (FIG. 1) indicates unacceptable or burdensome over-usage at memory managers MM2 and MM3, metadata service 30 can coordinate relocation of some of the data items to other memory managers (e.g., memory managers MM1 or MM4)).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of each caching agent/memory manager and balance workload allocated to each caching agent by moving excess workload from a first caching agent to a second caching agent. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the storage system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
Regarding claim 11, Geetha teaches a non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors (Geetha, [0095], The data storage device 1116 may include a computer-readable storage medium 1124 on which is stored software 1126 embodying any one or more of the methodologies of functions described herein; [0096]), cause the one or more processors to: execute an operating system (OS) that is to receive an indication of workloads of at least two caching agents (CAs) (Geetha, [0021], cache home agent (CHA); [0024], the multiple CHAs 109; [0026], each CHA 109 includes a cache agent (CA) 117; Fig.1, see CHA 109) and to allocate workloads among the at least two CAs (Geetha, [0024], the multicore processor 110A may further include an NM controller 105 coupled to near memory (NM) 112 … and a FM controller 106 coupled to far memory (FM) 113; [0033], the NM controller 105 sends the cache line (including data) to the CHA 109A).
Geetha teaches at least two caching agents and allocate workload among the caching agents, nevertheless, Geetha does not explicitly teach execute an operating system (OS) that is to receive an indication of workloads of at least two caching agents (CAs) and to allocate workloads among the at least two CAs, as claimed.
However, Geetha in view of Dawkins teaches execute an operating system (OS) that is to receive an indication of workloads (Dawkins, [0003], operating system; [0004]; [0040]; [0041]; [0093], Usage information may be gathered over time and maintained by memory managers 34 and the metadata services; Note – metadata service manages shared clustered memory cache) of at least two caching agents (CAs) and to allocate workloads among the at least two CAs (Geetha, [0023], Each of the processing cores 101 may include a level one (L1) cache and a level two (L2) cache; [0026], The cache agent 117 may further include a last level cache (LLC) slice 102; Dawkins, [0018], each memory manager may be local to and associated with a different portion of clustered memory cache 22. The memory managers typically are independent of one another, and each is configured to allocate and manage individual units of physical memory in its associated portion of clustered memory cache 22; [0093]; [0094], if information in metadata service data store 80 (FIG. 1) indicates unacceptable or burdensome over-usage at memory managers MM2 and MM3, metadata service 30 can coordinate relocation of some of the data items to other memory managers (e.g., memory managers MM1 or MM4)).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of caching agent/memory managers and balance workload allocated to each caching agent using an operating system. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
Regarding claim 17, Geetha teaches a method comprising:
at a central processing unit (CPU) (Geetha, [0024], multicore processor 110A; Fig.1):
monitoring a workload allocated to a caching agent (CA) of at least two CAs (Geetha, [0021], cache home agent (CHA); [0024], the multiple CHAs 109; [0026], each CHA 109 includes a cache agent (CA) 117; Fig.1, see CHA 109) and allocating the workload allocated to the CA among the CA and at least one other CA of the at least two CAs.
Geetha does not explicitly teach monitoring a workload allocated to a caching agent (CA) of at least two CAs and allocating the workload allocated to the CA among the CA and at least one other CA of the at least two CAs, as claimed.
However, Geetha in view of Dawkins teaches monitoring a workload allocated to a caching agent (CA) of at least two CAs (Geetha, [0023], Each of the processing cores 101 may include a level one (L1) cache and a level two (L2) cache; [0026], The cache agent 117 may further include a last level cache (LLC) slice 102; Dawkins, [0017]; [0018], each memory manager may be local to and associated with a different portion of clustered memory cache 22. The memory managers typically are independent of one another, and each is configured to allocate and manage individual units of physical memory in its associated portion of clustered memory cache 22; [0035], metadata service 30 can provide a centralized, or relatively centralized, location for maintaining status information about the clustered cache. In particular, in FIG. 1, memory managers MM1, MM2, etc. through MMN may be considered to all be within a domain that is assigned to metadata service 30. Metadata service 30 can monitor the domain;) and allocating the workload allocated to the CA among the CA and at least one other CA of the at least two CAs (Dawkins, [0093]; [0094], if information in metadata service data store 80 (FIG. 1) indicates unacceptable or burdensome over-usage at memory managers MM2 and MM3, metadata service 30 can coordinate relocation of some of the data items to other memory managers (e.g., memory managers MM1 or MM4))
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of each caching agent/memory manager and balance workload allocated to each caching agent by moving excess workload from a first caching agent to a second caching agent. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the storage system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
Regarding claims 2, 12, and 18, taking claim 2 as exemplary, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, wherein the workload comprises one or more of: processing of a cache coherency request or processing of a snoop filter request (Geetha, [0026], The cache agent 117 may further include a last level cache (LLC) slice 102 and a snoop filter 108A; [0028]).
Claims 12 and 18 have similar limitations as claim 2 and they are rejected for the similar reasons.
Regarding claims 3, 13, and 19, taking claim 3 as exemplary, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, wherein to monitor a workload allocated to a CA of the at least two CAs, the circuitry is to monitor a number of requests received at the at least two CAs over a time duration (Dawkins, [0041]; [0056], during periods where heavier usage volume is detected (e.g., an escalation in the number of cache insertion requests); [0075]; [0078]; [0093]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of each caching agent/memory manager and balance workload allocated to each caching agent by moving excess workload from a first caching agent to a second caching agent. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the storage system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
Claims 13 and 19 have similar limitations as claim 3 and they are rejected for the similar reasons.
Regarding claim 5, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, wherein to monitor a workload allocated to a CA of the at least two CAs, the circuitry is to identify at least one CA of the at least two CAs to an operating system (OS) based on a load of the at least one CA of the at least two CAs (Dawkins, [0003], The information handling system may include one or more operating systems. An operating system serves many functions, such as controlling access to hardware resources and controlling the execution of application software; [0004], certain information handling systems may be designed to monitor, configure, and adjust the features, functionality, and software of other information handling systems … For example, one information handling system might be configured to manage a shared, distributed cache; [0040]-[0041]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of each caching agent and balance workload allocated to each caching agent according to an operating system. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the storage system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
Regarding claims 9 and 16, taking claim 9 as exemplary, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, wherein the at least two CAs comprise at least one caching and home agent (CHA) (Geetha, [0016], CHA—caching home agent complex; Fig.1, CHA 109).
Claim 16 has similar limitations as claim 9 and is rejected for the similar reasons.
Regarding claim 10, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, comprising a server (Geetha, [0084], servers; Dawkins, [0017], server), wherein the server comprises the CPU and at least one memory device (Geetha, Fig.1, Far Memory 113) associated with one or more memory addresses associated with the at least two CAs (Geetha, [0084], FIG. 9 is an exemplary system on a chip (SoC) 900 that may include one or more of the cores 902A . . . 902N that may implement hardware support for hybrid directory and snoopy-based coherency. Other system designs and configurations known in the arts for laptops, desktops, handheld PCs, personal digital assistants, engineering workstations, servers; [0098]).
Claim(s) 4 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Geetha and Dawkins as applied to claims 1 and 11 respectively above, and further in view of Chang et al. (US 2015/0127905), hereinafter Chang.
Regarding claims 4 and 14, taking claim 4 as exemplary, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha further teaches the apparatus of claim 1, wherein to monitor a workload allocated to a CA of the at least two CAs, the circuitry is to monitor a number of requests received at the at least two CAs for particular one or more memory address ranges over a time duration (Dawkins, [0056], during periods where heavier usage volume is detected (e.g., an escalation in the number of cache insertion requests); [0075]; [0078]; [0093]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Geetha to incorporate teachings of Dawkins to monitor workload of each caching agent/memory manager and balance workload allocated to each caching agent by moving excess workload from a first caching agent to a second caching agent. A person of ordinary skill in the art would have been motivated to combine the teachings of Geetha with Dawkins because it improves efficiency and performance of the storage system disclosed in Geetha by balancing workload of the storage system (Dawkins, [0093]).
The combination of Geetha does not explicitly teach requests received at the at least two CAs for particular one or more memory address ranges, as claimed.
However, the combination of Geetha in view of Chang teaches requests received at the at least two CAs for particular one or more memory address ranges (Chang, [0004], determining which address ranges to map to a particular cache; [0054], selecting a portion of an address space of a memory structure of the computing system; monitoring a workload of data transactions to identify a transaction of the workload directed to the portion of the address space; determining an effect of the transaction on a cache of the computing system).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Geetha to incorporate teachings of Chang to monitor cache workload based on transactions activities directed to predefined portions of an address space, for example, address ranges. A person of ordinary skill in the art would have been motivated to combine the teachings of the combination of Geetha with Chang because it improves efficiency and performance of the storage system disclosed in the combination of Geetha by allowing the storage system to allocate a portion of an address space to each cache partition.
Claim 14 has similar limitations as claim 4 and is rejected for the similar reasons.
Claim(s) 6, 15, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Geetha and Dawkins as applied to claims 1, 11, and 17 respectively above, and further in view of Koka et al. (US2016/0124858), hereinafter Koka.
Regarding claims 6, 15, and 20, taking claim 6 as exemplary, the combination of Geetha teaches all the features with respect to claim 1 as outlined above. The combination of Geetha does not explicitly teach the apparatus of claim 1, wherein to balance the workload allocated to the CA among the CA and at least one other CA of the at least two CAs, the circuitry is to allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs, as claimed.
However, the combination of Geetha in view of Koka teaches the apparatus of claim 1, wherein to balance the workload allocated to the CA among the CA and at least one other CA of the at least two CAs, the circuitry is to allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs (Koka, [0038]; [0047]; [0053]; [0054]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Geetha to incorporate teachings of Koka to dynamically repartition a cache memory using address remapping. As such, the workload associated with cache partitions are changed. A person of ordinary kill in the art would have been motivated to combine the combination of Geetha with Koka because it improves efficiency of the storage system disclosed in the combination of Geetha by allowing the storage system to dynamically adjust cache partitions when needed.
Claims 15 and 20 have similar limitations as claim 6 and they are rejected for the similar reasons.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Geetha, Dawkins, and Koka as applied to claim 6 above, and further in view of Idei et al. (US2022/0129453), hereinafter Idei.
Regarding claim 7, the combination of Geetha teaches all the features with respect to claim 6 as outlined above. The combination of Geetha does not explicitly teach the apparatus of claim 6, wherein the allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs is based on a request from an operating system (OS), as claimed.
However, the combination of Geetha in view of Idei teaches the apparatus of claim 6, wherein the allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs is based on a request from an operating system (OS) (Idei, [0073], The OS 214 is a general OS such as Linux (R) and, although description is omitted here, includes a monitor command 234; [0102], the DBMS 312 periodically executes the monitor command 334 of the OS 314, acquires the monitor data 70 including metric values such as the IOPS and the CPU usage rate; Dawkins, [0041], so that the memory managers provide periodic updates to maintain the information in the metadata service data store 80).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Geetha to incorporate teachings of Idei to execute monitor commands of an operating system in order to provide periodic cache status and performance information which can be used for balancing cache workload. A person of ordinary skill in the art would have been motivated to combine the teachings of the combination of Geetha with Idei because it improves efficiency of the storage system disclosed in the combination of Geetha by providing cache status/performance information in order to balance cache workload.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Geetha, Dawkins, and Koka as applied to claim 6 above, and further in view of Ibrahim et al. (US2020/0293445), hereinafter Ibrahim.
Regarding claim 8, the combination of Geetha teaches all the features with respect to claim 6 as outlined above. The combination of Geetha does not teach the apparatus of claim 6, wherein the allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs comprises allocate data associated with the one or more memory addresses to a range of memory addresses, as claimed.
However, the combination of Geetha in view of Ibrahim teaches the apparatus of claim 6, wherein the allocate one or more memory addresses for monitoring by the CA and at least one other CA of the at least two CAs comprises allocate data associated with the one or more memory addresses to a range of memory addresses (Ibrahim, [0047], the GPU identifies transient lines resulting from the change in CU cluster configuration. As used herein, the term “transient line” refers to a cache line which is no longer mapped to the cache; [0049], method 700 proceeds by migrating the transient lines to their new, current home CUs having the proper address mapping; Fig.7).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Geetha to incorporate teachings of Ibrahim to migrate all the cache lines from a cache that they are no longer mapped to a new cache. A person of ordinary skill in the art would have been motivated to combine the teachings of the combination of Geetha with Ibrahim because it improves consistency of the storage system disclosed in the combination of Geetha by ensuring cache data coherence for the storage system.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Roozbeth et al. (US2025/0094350) teaches redirecting I/O traffic in response to a cache usage exceeds a threshold.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NANCI N WONG whose telephone number is (571)272-4117. The examiner can normally be reached Monday-Friday 9am -6pm.
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/NANCI N WONG/Primary Examiner, Art Unit 2136
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