Office Action Predictor
Application No. 17/988,785

METHOD FOR DETECTING DEFECTS ON WAFERS, SYSTEM FOR DETECTING DEFECTS ON WAFERS

Non-Final OA §103
Filed
Nov 17, 2022
Examiner
MUKUNDHAN, ROHAN TEJAS
Art Unit
2663
Tech Center
2600 — Communications
Assignee
United Semiconductor (Xiamen) Co., LTD.
OA Round
3 (Non-Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
3y 0m
To Grant

Examiner Intelligence

100%
Career Allow Rate
8 granted / 8 resolved
Without
With
+0.0%
Interview Lift
avg trend
3y 0m
Avg Prosecution
26 pending
34
Total Applications
career history

Statute-Specific Performance

§101
9.1%
-30.9% vs TC avg
§103
50.3%
+10.3% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
23.5%
-16.5% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10 December 2025 has been entered. Response to Arguments In view of the amendments to independent claims 1 and 12, the claim objections are withdrawn. In view of the amendment to claim 9, the previously applied rejection under 35 U.S.C. § 112(b) is withdrawn. In view of the amendments to independent claims 1 and 12 and dependent claims 7, 8, and 15, the previously applied prior art rejections are withdrawn. Applicant’s arguments are moot in view of the new grounds of rejection set forth below. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3, 5, 7, and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US PG Pub 20220067898, hereafter “Chen”) in view of Maher et al. (US PG Pub 20170140516, hereafter “Maher”). Regarding claim 1, Chen discloses a method for detecting defects on a wafer (para. 0026), comprising: obtaining a grayscale reference image of a chip pattern formed on a reference wafer (paras. 0009, 0051-0052, 0056, 0084, 0088, and 0103, wherein the “grayscale” image is a grey level difference calculation. Specifically, “grayscale image” as defined within para. 0022 of the Specification of the instant application refers to an image whose pixel intensities/brightness values fall between 0 and 255, wherein intermediate values are various shades of gray and whose endpoints are black and white, respectively. Chen explicitly discloses determination of pixel intensities in [0103], and explicitly discloses grey level as a defect detection metric within [0084] and [0088]); using a computer algorithm to analyze the grayscale reference image to produce a division map for the chip pattern, wherein the division map comprises a plurality of divisions (paras. 0073-0083, wherein the runtime context map and golden grid map, both of which are generated by computer algorithm, constitute division maps for the chip pattern which comprise a plurality of divisions, and which are used in the defect detection process); setting respective grayscale difference thresholds for the divisions (para. 0085, disclosing difference images between golden grid reference images and test images as a defect detection method and further disclosing thresholds within the grayscale difference image top identify specific defects); obtaining a grayscale difference data between a grayscale test image of the chip pattern formed on a test wafer and the grayscale reference image (paras. 0080-0081, 0084, 0088, and 0103, wherein the rationale for the application of a grey level test image is the same rationale as for the aforementioned grey level application to the reference image); and using the division map and the grayscale difference thresholds of the divisions to examine the comparison data to identify a defect in the grayscale test image (paras. 0084-0088, and 0103-0104, wherein the rationale for the application of a grey level test image comprises the aforementioned grayscale difference image between the golden grid reference and test image and the subsequent identification of defects using thresholds within the difference image). Specifically, Chen discloses a wafer inspection and defect detection method, comprising acquiring a reference image, removing random defects and signatures from the reference image, fitting the reference image to a design grid to create a golden grid image of the wafer die pattern, and saving the golden grid image (Fig. 3, elements 300 through 308, 314, 316, and 324, where the pathway including elements 300, 302, 304, 306, and 308 relate to gathering and processing the raw reference image, elements 314 and 316 are with respect to creation of a golden grid image, which would be the ideal reference pattern against a design grid, and element 324 stores the golden grid). Chen further discloses aligning a test image to the golden grid image (Fig. 4 elements 400, 404, and 406, where element 400 is the raw test image, element 404 is the test image aligned to the golden grid, and element 406 is the modified test image for defect detection), and performing defect detection including, in certain embodiments, median pixel gray level, thresholding, or machine learning adjacent methods (Fig. 4 step 416 and paras. 0082-0085, 0104). Chen does not disclose wherein a grayscale difference threshold of a darker division is smaller than a grayscale difference threshold of a whiter division. However, Maher discloses wherein a grayscale difference threshold of a darker division is smaller than a grayscale difference threshold of a whiter division (paras. 0048-0052 and 0058-0065, wherein the defect detection method for regional differences in gray level value comprises comparing pixel values containing a lower and a higher bound for difference comparison, wherein the lower bound and below is reserved for darker pixels having lower pixel values, and wherein the upper bound and above is reserved for whiter pixels having higher pixel values ). Specifically, Maher discloses a method and system of wafer die defect detection comprising identifying multiple corresponding regions between a reference image and a test image of a die, calculating a region-specific gray level threshold for defect detection, and subsequently detecting defects. Therefore, both Chen and Maher disclose methods and systems of wafer die defect detection utilizing correspondences and image processing operations between a reference image and a test image of a die and gray level threshold-based defect identification. Thus, it would have been obvious to the ordinarily skilled artisan prior to the effective filing date of the claimed invention to have utilized the teaching of Maher relating to the threshold magnitude and apparent division brightness within the method of Chen as a teaching or suggestion in the art that would have led one having ordinary skill in the art to modify the method and system of Chen, resulting in a clear metric for observing defects and defect detection sensitivity within regions of different brightness in a difference image. Claim 12 is rejected, mutatis mutandis, for reasons similar to claim 1. Chen further discloses an inspection tool, configured to obtain a reference image and a test image of a chip pattern (Fig. 1 element 10, wherein element 10 is the inspection tool, and para. 0025 for a more detailed description of the inspection tool elements), and a computer (Fig. 5, elements 500, 502, and 504, wherein element 500 is the computer readable medium with the algorithm, element 502, and element 504 is a computer system, defined within paragraph 0037 to be at least one processor with a plurality of subsystems). Regarding claim 3, Chen and Maher disclose all limitations of claim 1. Chen further discloses wherein the comparison data comprises differences in grayscale value between the grayscale test image and the grayscale reference image (paras. 0084, 0088, and 0103-0104, wherein the defect detection method “may use the reference along with the difference image [between the reference image and the test image] (also referenced within para. 0104, “subtracting the reference from a test image”) to detect the defects. In one such example, a characteristic of the reference such as a median grey level may be plotted on the y axis, the difference image grey level may be plotted on the x axis, and a threshold may be applied to the resulting 2D plot to detect defects on the specimen”). Regarding claim 5, Chen and Maher disclose all limitations of claim 1. Maher further discloses grouping the divisions according to the grayscale levels of the divisions (paras. 0061-0062, “the matching metric includes a defined range of pixel values (e.g. grayscale pixel values”, and “in one embodiment, reference image 400 is a grayscale image such that pixel values of the reference image represent grayscale values. In another embodiment, the first set of similar structures 402, the second set of similar structures 404, and the third set of similar structures 406 have pixel values that lie in distinguishable ranges.”). Therefore, it would have been obvious to the ordinarily skilled artisan to have integrated the grouping method of Maher within the method and system of Chen according to the rationale of claim 1. Regarding claim 7, Chen and Maher disclose all limitations of claim 5. Maher further discloses wherein the grayscale difference thresholds of the divisions of the same group are the same (paras. 0061-0063, “the matching metric includes a defined range of pixel values (e.g. grayscale pixel values”; “in one embodiment, reference image 400 is a grayscale image such that pixel values of the reference image represent grayscale values. In another embodiment, the first set of similar structures 402, the second set of similar structures 404, and the third set of similar structures 406 have pixel values that lie in distinguishable ranges.”; and “Accordingly, a matching metric including a range of pixel values may be used to identify structures in the reference image having pixels with a pixel value within the same range as the target region”). Therefore, it would have been obvious to the ordinarily skilled artisan to have integrated grayscale difference threshold differentiation method of Maher within the method and system of Chen according to the rationale of claim 1. Regarding claim 10, Chen and Maher disclose all limitations of claim 1. Chen further discloses wherein the reference image and the test image are obtained by a same inspection tool (paras. 0023-0024, 0026, 0067, and 0071, where paras 0023, 0024, and 0026 describe an inspection system configured to capture a reference image, and 0067 and 0071 describe the acquisition and modification of the test image utilizing the same inspection tool). Regarding claim 11, Chen and Maher disclose all limitations of claim 10. Chen further discloses wherein the inspection tool is an optical imaging tool (paras. 0033 and 0034, wherein para. 0033 describes detectors, elements 28 and 34 in Fig. 1, and para. 0034 includes photomultiplier tubes and CCD and TDI cameras as embodiments of the detectors). Regarding claim 13, Chen and Maher disclose all limitations of claim 12. Chen further discloses wherein the reference image and the test image are obtained by a same inspection tool (paras. 0023-0024, 0026, 0067, and 0071, where paras 0023, 0024, and 0026 describe an inspection system configured to capture a reference image, and 0067 and 0071 describe the acquisition and modification of the test image utilizing the same inspection tool). Regarding claim 14, Chen and Maher disclose all limitations of claim 12. Chen further discloses wherein the system of claim 12 further comprises a memory configured to store the reference image, the test image, and the division map (para. 0037 for explicit disclosure of a memory medium, and paras. 0067-0073 and 0095 for the storage of the reference image, the test image, and the golden grid division map). Allowable Subject Matter Claims 6, 8, 9, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHAN TEJAS MUKUNDHAN whose telephone number is (571)272-2368. The examiner can normally be reached Monday - Friday 9AM - 6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gregory Morse can be reached at 5712723838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROHAN TEJAS MUKUNDHAN/Examiner, Art Unit 2663 /GREGORY A MORSE/Supervisory Patent Examiner, Art Unit 2698
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Prosecution Timeline

Nov 17, 2022
Application Filed
Apr 22, 2025
Non-Final Rejection — §103
Jul 18, 2025
Response Filed
Sep 05, 2025
Final Rejection — §103
Nov 18, 2025
Interview Requested
Nov 25, 2025
Applicant Interview (Telephonic)
Nov 25, 2025
Examiner Interview Summary
Dec 10, 2025
Request for Continued Examination
Jan 06, 2026
Response after Non-Final Action
Jan 10, 2026
Non-Final Rejection — §103
Mar 31, 2026
Response Filed

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Prosecution Projections

3-4
Expected OA Rounds
100%
Grant Probability
3y 0m
Median Time to Grant
High
PTA Risk
Based on 8 resolved cases by this examiner