Prosecution Insights
Last updated: April 19, 2026
Application No. 17/989,742

ELECTRONIC DEVICE

Final Rejection §103
Filed
Nov 18, 2022
Examiner
ALATA, YASSIN
Art Unit
2426
Tech Center
2400 — Computer Networks
Assignee
Asustek Computer Inc.
OA Round
4 (Final)
66%
Grant Probability
Favorable
5-6
OA Rounds
2y 9m
To Grant
81%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allow Rate
545 granted / 820 resolved
+8.5% vs TC avg
Moderate +14% lift
Without
With
+14.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
45 currently pending
Career history
865
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
55.0%
+15.0% vs TC avg
§102
21.3%
-18.7% vs TC avg
§112
6.6%
-33.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 820 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 09/24/2025 have been fully considered but they are not persuasive. The Applicant argues that the cited references don’t disclose that the universal motherboard is adapted to be connected to the first type display panel and the second type display panel. The Examiner respectfully disagrees. Jiang discloses an electronic device, comprising: a display panel, which is a first type display panel or a second type display panel, a transmission line, which is a first transmission line or a second transmission line; and a universal motherboard, adapted to be connected to the first type display panel and the second type display panel, the universal motherboard is connected to the first type display panel through the first transmission line, or connected to the second type display panel through the second transmission line. For example, Jian discuss how the display controller identifies the display type as being a first display type or being a second display type in response to calculating consumption ratio and the consumption ratio being different for each display type, therefore, the motherboard is adapted to connected to the first type display panel and the second type display panel (see at least paragraphs 0026-0027, 0033 and 0035-0036). For at least the above reasons, the present claimed invention is not patentable over the cited reference(s). Claims 1 and 11 have been amended and claim 9 has been previously canceled. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a panel power management module” and “a lens module” in claims 1, 4 and 11. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7-8 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Jiang (US 2014/0267325), in view of Chin (US 2022/0383833). Regarding claim 1, Jiang discloses an electronic device, comprising: a display panel, which is a first type display panel or a second type display panel (display 116 can be a first type or a second type; see at least paragraphs 0026-0027, 0033 and 0035-0036); a transmission line, which is a first transmission line or a second transmission line (all components are connected via signal bus 102; see at least Fig. 1 and paragraph 0021); and a universal motherboard, adapted to be connected to the first type display panel and the second type display panel, the universal motherboard is connected to the first type display panel through the first transmission line, or connected to the second type display panel through the second transmission line (all circuits shown in Fig. 1. Furthermore, display 116 can be a first type or a second type; see at least paragraphs 0026-0027, 0033 and 0035-0036). Jiang discloses the display panel is the first type display panel, the universal motherboard and the first transmission line and providing power management required for the first type display panel according to the universal motherboard (power consumption distribution module 112 is connected to the circuit shown in Fig. 1 and at least paragraph 0024);, but is not clear about a panel power management module, wherein the panel power management module is mounted in a frame of the first type display panel and located separate from the universal motherboard. Chen discloses a panel power management module, wherein the panel power management module is mounted in a frame of the first type display panel and located separate from the universal motherboard; a PMIC 216 included in an LCD panel 204 and separated from a motherboard 206; see at least Fig. 2 and paragraph 0026. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Jiang by the teachings of Chen by having the above limitations so to be able to provide a screen flicker performance manager; see at least the Abstract. Regarding claim 2, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the first transmission line and the second transmission line are each an embedded display port (EDP) transmission line (Jiang; the signal bus is embedded in the circuit; see at least Fig. 1). Regarding claim 3, Jiang in view of Chen disclose the electronic device according to claim 2, wherein the universal motherboard is provided with an embedded display port connector, so that the first transmission line or the second transmission line is connected to the embedded display port connector (Jiang; the signal bus is embedded in the circuit; see at least Fig. 1). Regarding claim 4, Jiang in view of Chen disclose the electronic device according to claim 1, further comprising a lens module, connected to the universal motherboard through the first transmission line or the second transmission line (the specification and the claim do not explain the nature of the lens module, therefore, it is interpreted to be any module on the circuit; Jiang; see at least Fig. 1 and paragraphs 0022 and 0024). Regarding claim 5, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the first type display panel is an organic light-emitting diode (OLED) panel (Jiang; an OLED display; see at least paragraphs 0028-0030). Regarding claim 7, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the first transmission line further comprises a power cable and a signal cable (Jiang; the signal bus; see at least Fig. 1). Regarding claim 8, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the second transmission line further comprises a power cable and a signal cable (Jiang; the signal bus; see at least Fig. 1). Regarding claim 10, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the electronic device is a notebook computer (Jiang; see at least paragraph 0021). Claim 11 is rejected on the same grounds as claim 1, wherein the first type display panel requires the panel power management module is disclosed by Jiang as in claim 1 and the second type display panel does not require the panel power management is an alternative language. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Jiang in view of Chen and further in view of CHO (US 2016/0329357). Regarding claim 6, Jiang in view of Chen disclose the electronic device according to claim 1, wherein the second type display panel is a liquid crystal panel; see at least paragraphs 0028-0030, but are not clear about an in-plane-switching (IPS) panel. CHO discloses an LCD panel that can be and an in-plane-switching type; see at least paragraph 0033. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Jiang in view of Chen by the teachings of CHO by having the above limitations so to be able to provide a display panel with better reliability; see at least paragraph 0003. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YASSIN ALATA whose telephone number is (571)270-5683. The examiner can normally be reached Mon-Fri 7-4 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nasser Goodarzi can be reached on 571-272-4195. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YASSIN ALATA/Primary Examiner, Art Unit 2426
Read full office action

Prosecution Timeline

Nov 18, 2022
Application Filed
Nov 02, 2024
Non-Final Rejection — §103
Jan 31, 2025
Response Filed
Mar 08, 2025
Final Rejection — §103
May 20, 2025
Applicant Interview (Telephonic)
May 20, 2025
Examiner Interview Summary
Jun 11, 2025
Request for Continued Examination
Jun 16, 2025
Response after Non-Final Action
Jun 26, 2025
Non-Final Rejection — §103
Sep 24, 2025
Response Filed
Oct 17, 2025
Final Rejection — §103
Dec 26, 2025
Interview Requested
Jan 07, 2026
Examiner Interview Summary
Jan 07, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
66%
Grant Probability
81%
With Interview (+14.5%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 820 resolved cases by this examiner. Grant probability derived from career allow rate.

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