Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. PCT/CN2022/128984, filed on 11/01/2022.
Drawings
The drawings are objected to because Figs. 1 and 4 are grainy as appeared in the application’s publication (US 20230118994). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 5, 12 and 20 are objected to because of the following informalities:
In line 4, line 5, and line 5, respectively, “access the data block” should be written as “accesses the data block”.
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more.
Claims 1 and 8 recite the limitation: “select a compute node to execute a function based on latency of retrievals of function data blocks, wherein the function data blocks comprise at least a portion of an image of the function and the function data blocks are stored among two or more tiers of storage”. The limitation, as drafted, is a process that, under its broadest reasonable interpretation, cover performance of the limitation in the mind but for the recitation of generic computer components. That is, besides reciting “one or more processors” in claim 1 and “at least one processor” in claim 8, nothing in the claims’ elements preclude the steps from practically being performed in the mind. The mere nominal recitation of generic computer components does not take the claims limitations out of the mental processes grouping. Thus, the claims recite a mental process.
The judicial exception is not integrated into a practical application. In particular, the claims recite additional elements of: a “non-transitory computer-readable medium”, “one or more processors”, a “compute node”, “storage”, and a “stored” step in claim 1; a “processor”, a “memory”, a “compute node”, “storage”, and a “stored” step in claim 8. The “non-transitory computer-readable medium”, “processors”, “memory, “compute node”, and “storage” are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using generic computer components (see MPEP 2106.05(f)). Additionally, the “stored” step amounts to no more than mere data gathering, which is insignificant extra-solution activity (see MPEP 2106.05(g)). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The recitation of a “non-transitory computer-readable medium”, “processors”, “memory, “compute node”, and “storage” amount to nothing more than applying the exception with generic computer components. Mere instructions to apply an exception using generic computer components cannot integrate a judicial exception into a practical application nor provide an inventive concept. Additionally, the “stored” step is “storing and retrieving information in memory”, which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The claims are not patent eligible.
Claim 2 recites “determine latency of retrievals of function data blocks is based on storage of the function data blocks in devices of one or more storage tiers and retrieval latency to a memory utilized to launch the function” (mental process). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 3 recites “determine one or more candidate nodes to execute the function based on hardware and/or software resource parameters of the function” (mental process). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 4 recites “wherein the select a compute node to execute the function based on the determined latency of accesses to container data blocks is also based on the determined one or more candidate nodes”. The limitation further defines the “select a compute node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The “determined latency of accesses” and the “determined one or more candidate nodes” are also mental processes. The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 5 recites “store at least one data block into a tier of storage based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected compute node that access the data block”. The “store” step amounts to no more than mere data gathering, which is insignificant extra-solution activity (see MPEP 2106.05(g)). Additionally, the “store” step is “storing and retrieving information in memory”, which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 6 recites “wherein the access frequency of the data block and sequence of access of the data block are based on at least one prior execution of the function”. The limitation further defines the access frequency and sequence of access used in the “store” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 7 recites “wherein the one or more tiers of storage comprise memory and/or storage devices in a hierarchal storage system”. The limitation further defines the tiers of storage used in the “select a compute node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 9 recites “wherein the latency of retrievals of function data blocks is based on storage of the function data blocks in devices of one or more storage tiers and retrieval latency to a memory utilized to launch the function”. The limitation further defines the latency of retrievals used in the “select a compute node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 10 recites “determine one or more candidate nodes to execute the function based on hardware and/or software resource parameters of the function” (mental process). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 11 recites “wherein the select a compute node to execute the function based on the determined latency of accesses to container data blocks is also based on the determined one or more candidate nodes”. The limitation further defines the “select a compute node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The “determined latency of accesses” and the “determined one or more candidate nodes” are also mental processes. The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 12 recites “store at least one data block into a tier of storage based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected compute node that access the data block”. The “store” step amounts to no more than mere data gathering, which is insignificant extra-solution activity (see MPEP 2106.05(g)). Additionally, the “store” step is “storing and retrieving information in memory”, which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 13 recites “wherein the access frequency of the data block and sequence of access of the data block are based on at least one prior execution of the function”. The limitation further defines the access frequency and sequence of access used in the “store” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 14 recites “comprising a server, wherein the server comprises at least one memory and/or storage device corresponding to the one or more tiers of storage and the at least one memory and/or storage device is to store the function data blocks”. These additional elements are generic computer components. The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 15 recites the limitation: “selecting a node to execute a function instance based on a distribution pattern of function image data segments in the hierarchal storage to reduce a time to access function image data segments during start-up and execution of the function instance”. The limitation, as drafted, is a process that, under its broadest reasonable interpretation, cover performance of the limitation in the mind but for the recitation of generic computer components. That is, besides reciting a “cloud computing cluster”, nothing in the claim’s elements preclude the steps from practically being performed in the mind. The mere nominal recitation of generic computer components does not take the claim’s limitations out of the mental processes grouping. Thus, the claim recites a mental process.
The judicial exception is not integrated into a practical application. In particular, the claim recites additional elements of: a “cloud computing cluster”, a “hierarchal storage”, and a “node”. The “cloud computing cluster”, “hierarchal storage”, and “node” are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using generic computer components (see MPEP 2106.05(f)). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The recitation of a “cloud computing cluster”, a “hierarchal storage”, and a “node” amount to nothing more than applying the exception with generic computer components. Mere instructions to apply an exception using generic computer components cannot integrate a judicial exception into a practical application nor provide an inventive concept. The claim is not patent eligible.
Claim 16 recites “wherein the function image data segments comprise at least a portion of an image of the function instance”. The limitation further defines the function image data segments used in the “selecting a node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 17 recites “determining latency of retrievals of function image data segments to a memory utilized to launch the function instance” (mental process). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 18 recites “determining one or more candidate nodes to execute the function instance based on hardware and/or software resource parameters of the function instance” (mental process). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 19 recites “wherein the selecting a node to execute a function instance based on a distribution pattern of function image data segments in the hierarchal storage to reduce a time to access function image data segments during start-up and execution of the function instance is based on the determined one or more candidate nodes”. The limitation further defines the “selecting a node” step, which limits the claim to a certain field of use and technological environment (see MPEP 2106.05(h)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim 20 recites “storing the function image data segments into one or more storage devices based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected node that access the data block”. The “storing” step amounts to no more than mere data gathering, which is insignificant extra-solution activity (see MPEP 2106.05(g)). Additionally, the “storing” step is “storing and retrieving information in memory”, which the courts have found to be a well-understood, routine, and conventional activity (see MPEP 2106.05(d)(II)(iv)). The features of this claim do not add any additional elements integrating the abstract idea into a practical application or amounting to significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 7-11, and 14-19 are rejected under 35 U.S.C 103 as being unpatentable over Devriendt et al. (US 20210149563 A1), hereinafter Devriendt, in view of Kushwah et al. (US 20190129621 A1), hereinafter Kushwah.
Regarding claim 1, Devriendt teaches a non-transitory computer-readable medium comprising instructions stored thereon (Paragraph 111, computer-readable medium including computer-readable program code),
that if executed by one or more processors (Paragraph 112, computer-readable medium includes a processor), cause the one or more processors to:
select a compute node to execute a function based on latency of retrievals of function data blocks (Paragraphs 67, 97, 102-103; Fig. 8, steps 810-812, selecting a storage element [compute node] to execute a storage request [function] based on the collected latency of processed storage requests [retrievals] of [function] data blocks),
the function data blocks are stored among two or more tiers of storage (Paragraph 52; Fig. 5, block spreader 532 distributes the data blocks among layers of a hierarchal storage structure).
Devriendt does not explicitly teach wherein the function data blocks comprise at least a portion of an image of the function.
However, Kushwah teaches wherein the function data blocks comprise at least a portion of an image of the function (Paragraph 23; Fig. 1, snapshot 103 [image] of a dataset is comprised of data blocks A, B, F).
Devriendt and Kushwah are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer-readable medium of Devriendt to further include the portions of an image according to the teachings of Kushwah. The motivation for doing so would have been to provide data protection by storing image/snapshots of a function/dataset and reduce bandwidth by distributing only portions for storage (Kushwah, Paragraphs 4 and 18).
Regarding claim 2, Devriendt in view of Kushwah teaches the computer-readable medium of claim 1, comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to: determine latency of retrievals of function data blocks is based on storage of the function data blocks (Devriendt, Paragraphs 67, 97, 102-103; Fig. 8, steps 810-812, selecting a storage element [compute node] to execute a storage request [function] based on the collected latency of processed storage requests [retrievals] of [function] data blocks)
in devices of one or more storage tiers (Devriendt, Paragraph 52, the data blocks are stored among multiple storage nodes of a hierarchal storage architecture)
and retrieval latency to a memory utilized to launch the function (Devriendt, Paragraphs 103, 105-106, 107; Fig. 8, steps 812, 816-820, selecting a storage node to execute [launch] a storage request based on the determined read [retrieval] latency of the node).
Regarding claim 3, Devriendt in view of Kushwah teaches the computer-readable medium of claim 2, comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to: determine one or more candidate nodes to execute the function based on hardware and/or software resource parameters of the function (Devriendt, Paragraphs 61-62, 64, determining a storage element to execute a process’ storage request [function] based on the processes’ latency requirement [hardware resource parameter]).
Regarding claim 4, Devriendt in view of Kushwah teaches the computer-readable medium of claim 3, wherein the select a compute node to execute the function based on the determined latency of accesses to container data blocks is also based on the determined one or more candidate nodes (Devriendt, Paragraphs 103, 105, 107; Fig. 8, steps 812, 816, 820, selecting a storage node based on the determined read [access] latency of the node).
Regarding claim 7, Devriendt in view of Kushwah teaches the computer-readable medium of claim 1, wherein the one or more tiers of storage comprise memory and/or storage devices in a hierarchical storage system (Devriendt, Paragraph 57; Fig. 5, system hierarchal model [system] 542 is comprised of storage nodes/elements).
Regarding claims 8-11, this is an apparatus version of the claimed computer-readable medium discussed above (claim 1-4, respectively), wherein Devriendt in view of Kushwah also teaches an apparatus (Devriendt, Paragraph 112, computer-readable medium may be an apparatus)
comprising at least one processor (Devriendt, Paragraph 112, computer-readable medium includes a processor), and
at least one memory comprising instructions stored thereon (Devriendt, Paragraphs 111-112, computer-readable medium includes memory and computer-readable program code).
The remaining claim limitations have also been addressed and/or covered in the cited areas as set forth above. Thus, accordingly, these claims are also obvious over Devriendt in view of Kushwah.
Regarding claim 14, Devriendt in view of Kushwah teaches the apparatus of claim 8, comprising a server (Devriendt, Paragraph 57, storage racks of server rooms),
wherein the server comprises at least one memory and/or storage device corresponding to the one or more tiers of storage (Devriendt, Paragraph 57; Fig. 5, system hierarchy model 542 is composed of hierarchal levels [storage tiers] of storage elements [storage devices] of object store 580, such as racks in server rooms)
and the at least one memory and/or storage device is to store the function data blocks (Devriendt, Paragraph 52, data blocks are stored on a number of storage elements).
Regarding claim 15, Devriendt teaches a method comprising: in a cloud computing cluster with hierarchical storage (Paragraphs 28, 38, 57; Figs. 1 and 2, storage cloud network 50 including a hierarchal storage system 80),
selecting a node to execute a function instance based on a distribution pattern of function data in the hierarchical storage to reduce a time to access function data during start-up and execution of the function instance (Paragraphs 60-62, 64, 97-98; Figs. 5 and 8, step 802, selecting a storage element in a hierarchal storage to execute a storage request [function] based on path selection rules 548 [distribution pattern] to reduce [access] latency for the storage request (execution including start-up and runtime)).
Devriendt does not explicitly teach function image data segments.
However, Kushwah teaches function image data segments (Paragraph 23; Fig. 1, snapshot 103 [image] of a dataset is comprised of data blocks [segments] A, B, F).
Devriendt and Kushwah are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer-readable medium of Devriendt to further include the image data segments according to the teachings of Kushwah. The motivation for doing so would have been to provide data protection by storing image/snapshots of a function/dataset and reduce bandwidth by distributing only portions for storage (Kushwah, Paragraphs 4 and 18).
Regarding claim 16, Devriendt in view of Kushwah teaches the method of claim 15, wherein the function image data segments comprise at least a portion of an image of the function instance (Kushwah, Paragraph 23; Fig. 1, snapshot 103 of a dataset [function instance image] is comprised of data blocks A, B, F [segments/portions]).
Regarding claim 17, Devriendt teaches the method of claim 15, comprising: determining latency of retrievals of function data to a memory utilized to launch the function instance (Paragraphs 106-107; Fig. 8, steps 818-820, determining the data read [retrieval] latency of a storage node [memory] used to execute the storage request [launch the function instance]).
Devriendt does not explicitly teach function image data segments.
However, Kushwah teaches function image data segments (Paragraph 23; Fig. 1, snapshot 103 [image] of a dataset is comprised of data blocks [segments] A, B, F).
Devriendt and Kushwah are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer-readable medium of Devriendt to further include the image data segments according to the teachings of Kushwah. The motivation for doing so would have been to provide data protection by storing image/snapshots of a function/dataset and reduce bandwidth by distributing only portions for storage (Kushwah, Paragraphs 4 and 18).
Regarding claim 18, this is a method version of the claimed computer-readable medium discussed above (claim 3, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also obvious over Devriendt in view of Kushwah.
Regarding claim 19, Devriendt in view of Kushwah teaches the method of claim 18, wherein the selecting a node to execute a function instance based on a distribution pattern of function image data segments in the hierarchical storage to reduce a time to access function image data segments during start-up and execution of the function instance is based on the determined one or more candidate nodes (Devriendt, Paragraphs 103, 105, 107; Fig. 8, steps 812, 816, 820, selecting a storage node based on the determined latency [access time] of the node).
Claims 5-6, 12-13, and 20 are rejected under 35 U.S.C 103 as being unpatentable over Devriendt in view of Kushwah as applied to claims 1, 8, and 15 above, and further in view of Rabii et al. (US 20100281230 A1), hereinafter Rabii.
Regarding claim 5, Devriendt in view of Kushwah teaches the computer-readable medium of claim 1, comprising instructions stored thereon (Devriendt, Paragraph 111, computer-readable medium including computer-readable program code),
executed by one or more processors (Devriendt, Paragraph 112, computer-readable medium includes a processor).
Devriendt in view of Kushwah does not explicitly teach to store at least one data block into a tier of storage based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected compute node that access the data block.
However, Rabii teaches store at least one data block into a tier of storage based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected compute node that access the data block (Paragraph 36; Fig. 4, write allocator 440 stores data blocks in a storage tier based on its access frequency and/or whether it is randomly/sequentially accessed).
Devriendt, Kushwah, and Rabii are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer-readable medium of Devriendt in view of Kushwah to further include storing of data into storage tiers based on access frequency according to the teachings of Rabii. The motivation for doing so would have been to improve the storage performance of frequently accessed data and reduce the storage cost of infrequently accessed data (Rabii, Paragraph 36).
Regarding claim 6, Devriendt in view of Kushwah, further in view of Rabii teaches the computer-readable medium of claim 5, wherein the access frequency of the data block and sequence of access of the data block are based on at least one prior execution of the function (Rabii, Paragraphs 36-37, access frequency and random/sequential access is based on previous data accesses [prior function executions]).
Regarding claims 12-13, this is an apparatus version of the claimed computer-readable medium discussed above (claims 5-6, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also obvious over Devriendt in view of Kushwah, further in view of Rabii.
Regarding claim 20, Devriendt in view of Kushwah teaches the method of claim 15 and storing the function image data segments into one or more storage devices (Kushwah, Paragraphs 23-24; Fig. 1, storing data blocks A, B, F [data segments] of snapshot 103 [function image] in storage appliance 101 or cloud storage 117).
Devriendt in view of Kushwah does not explicitly teach storing based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected node that access the data block.
However, Rabii teaches storing based on one or more of: access frequency of the data block, sequence of access of the data block, and number of functions executing on the selected node that access the data block (Paragraph 36; Fig. 4, write allocator 440 stores data blocks in a storage tier based on its access frequency and/or whether it is randomly/sequentially accessed).
Devriendt, Kushwah, and Rabii are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the computer-readable medium of Devriendt in view of Kushwah to further include storing based on access frequency according to the teachings of Rabii. The motivation for doing so would have been to improve the storage performance of frequently accessed data and reduce the storage cost of infrequently accessed data (Rabii, Paragraph 36).
Conclusion
The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure:
Guim Bernat et al. (US 20180285009 A1) teaches systems for selecting a computer node to execute an application based on the respective hardware requirements of the application.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137