DETAILED ACTION The office action is responsive to an application filed on 11/23 / 22 and is being examined under the first inventor to file provisions of the AIA. Claims 1 -8 are pending. Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in India on 11/24/21 . It is noted, however, that applicant has not filed a certified copy of the IN 202131054345 application as required by 37 CFR 1.55. Double Patenting Claim 1 , 3-5 and 7-8 of this application is patentably indistinct from claim s 1-8 of Application No. 17/993,696 . Pursuant to 37 CFR 1.78(f), when two or more applications filed by the same applicant or assignee contain patentably indistinct claims, elimination of such claims from all but one application may be required in the absence of good and sufficient reason for their retention during pendency in more than one application. Applicant is required to either cancel the patentably indistinct claims from all but one application or maintain a clear line of demarcation between the applications. See MPEP § 822. With respect to claim 1 of the current application , 1. A method comprising: obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model, and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing; simulating segmentation of the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits, wherein each of the plurality of sub-circuits comprises at least one qubit; simulating a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is simulated based on the at least one qubit of a given sub-circuit and an output of a gate teleportation operation simulated on a sub-circuit which is previous to the given sub-circuit; and measuring an output of simulation on gate teleportation operation on a last sub-circuit from the plurality of sub-circuits. ( Claim 1 of 17/993,696 “1. A method comprising: obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model; segmenting the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits, wherein each of the plurality of sub-circuits comprises at least one qubit; performing a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is performed based on the at least one qubit of a given sub-circuit and an output of a gate teleportation operation performed on a sub-circuit which is previous to the given sub-circuit; and measuring an output of the gate teleportation operation on a last sub- circuit from the plurality of sub-circuits . ” , Claim 2 of 17/993,696 2. The method as claimed in claim 1, wherein the gate teleportation circuit is prepared based on Measurement Based Quantum Computing (MBQC) model. ) With respect to claim 3 of the current application , 3. The method as claimed in claim 1, wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n . (Claim 3 of 17/993,696 “ 3. The method as claimed in claim 1, wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n . ). With respect to claim 4 of the current application, 4. The method as claimed in claim 1, wherein each of the plurality of sub-circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2 n and less than 2 n+1 . (Claim 4 of 17/993,696 , “ 4. The method as claimed in claim 1, wherein each of the plurality of sub-circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2 n and less than 2 n + 1 . ). With respect to claim 5 of the current application, 5. A simulator for a quantum computing system comprising: a circuit reception engine to obtain a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is utilized for transferring an unknown quantum state of a qubit to another qubit in a quantum computing model, and wherein the gate teleportation circuit is complaint with Measurement Based Quantum Computing (MBQC) model of quantum computing; a circuit segmentation engine coupled to the circuit reception engine to simulate segmentation of the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits, wherein each of the plurality of sub-circuits comprises at least one qubit; and a gate teleportation engine coupled to the circuit segmentation engine to: simulate a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is simulated based on an at least one qubit of a given sub-circuit and an output of a gate teleportation operation simulated on a sub-circuit which is previous to the given sub-circuit; and measure an output of the gate teleportation operation on a last sub-circuit from the plurality of sub-circuits. (Claim 5 of 17/993,696 , “ 5. A quantum computing system comprising: a circuit reception engine to obtain a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is utilized for transferring an unknown quantum state of a qubit to another qubit in a quantum computing model; a circuit segmentation engine coupled to the circuit reception engine to segment the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits, wherein each of the plurality of sub- circuits comprises at least one qubit; and a gate teleportation engine coupled to the circuit segmentation engine to: perform a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is performed based on an at least one qubit of a given sub-circuit and an output of a gate teleportation operation performed on a sub-circuit which is previous to the given sub-circuit; and measure an output of the gate teleportation operation on a last sub-circuit from the plurality of sub-circuits. ). With respect to claim 7 of the current application, 7. The simulator as claimed in claim 5, wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n ". (Claim 7 of 17/993,696 , “ 7. The quantum computing system as claimed in claim 5, wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n . ” ). With respect to claim 8 of the current application, 8. The simulator as claimed in claim 5, wherein each of the plurality of sub-circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2" and less than 2 n+1 . (Claim 8 of 17/993,696 , “ 8. The quantum computing system as claimed in claim 5, wherein each of the plurality of sub- circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2" and less than 2 n+1 . ” ). Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-8 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Under the broadest reasonable interpretation, the claims cover performance of the limitation in the mind or by pencil and paper and as a mathematical concept. Claims 1 and 5 Regarding step 1 , claims 1 and 5 are directed towards a method and a simulator. The simulator is mentioned within the paragraph [0031] of the specification as being a hardware unit. This has the method and simulator fall within the eligible statutory categories of processes, machines, manufactures and composition of matter under 35 U.S.C. 101. Claim 1 Regarding step 2A, prong 1, claim 1 recites “ and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing ”. This limitation doesn’t distinguish itself from being able to be conducted in the human mind or with pencil and paper, where a patient’s dentition that is scanned can be processed. Therefore, under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claim 1 recites “ wherein each of the plurality of sub-circuits comprises at least one qubit ”. Under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claim 1 recites “ simulating segmentation of the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits ” . The simulating involves using calculations to segment the gate teleportation circuit into a plurality of sub-circuits as shown in paragraphs [0058] – [0063] of the specification. Therefore, under MPEP 2106.04(a)(2), this limitation covers a mathematical concept, which falls in the “Mathematical Concept” grouping of abstract ideas. Claim 1 recites “ simulating a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is simulated based on the at least one qubit of a given sub-circuit and an output of a gate teleportation operation simulated on a sub-circuit which is previous to the given sub-circuit ”. The simulating involves using calculations to segment the gate teleportation circuit into a plurality of sub-circuits as shown in paragraphs [0058] – [0063] of the specification. Therefore, under MPEP 2106.04(a)(2), this limitation covers a mathematical concept, which falls in the “Mathematical Concept” grouping of abstract ideas. Regarding step 2A, prong 2 , the limitation of “ obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model ” amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process, see MPEP 2106.05(g). Also, the limitation of “ and measuring an output of simulation on gate teleportation operation on a last sub-circuit from the plurality of sub-circuits ” amounts to mere instructions to apply an exception, where it recites an idea of a solution. The claim limitation doesn’t how the measuring of the output is occurring. See MPEP 2106.05 (f) (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it ". Further , the claim language also does not include a computer or components of a computer, but if written with, for example, a processor, the claim language would still not be eligible under 35 U.S.C. 101. For example, adding the phrase "by a processor" to the claim language, would encompass the processor be recited at a high level of generality such that it amounts no more than mere instructions to apply the exception using a computer and/or a generic computer component. Accordingly, the additional element of a processor does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. Regarding Step 2B , the limitation of “ obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model ” are also shown to reflect the court decisions of Versata Dev. Group, Inc. v. SAP Am., Inc. iv. Storing and retrieving information in memory, shown in MPEP 2106.05(d) (II). Also, the limitation of “ and measuring an output of simulation on gate teleportation operation on a last sub-circuit from the plurality of sub-circuits ” amounts to mere instructions to apply an exception, where it recites an idea of a solution. The claim limitation doesn’t how the measuring of the output is occurring. See MPEP 2106.05 (f) (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it ". Also, the claim(s) docs/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of a processor amounts no more than mere instructions to apply the exception using a generic computer component that does not impose any meaningful limits on practicing the abstract idea and therefore cannot provide an inventive concept (See MPEP 2106.05(b). Claim 5 Regarding step 2A, prong 1, claim 5 recites “ and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing ”. This limitation doesn’t distinguish itself from being able to be conducted in the human mind or with pencil and paper, where a patient’s dentition that is scanned can be processed. Therefore, under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claim 5 recites “ wherein each of the plurality of sub-circuits comprises at least one qubit ”. Under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claim 5 recites “ simulate segmentation of the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits ”. The simulating involves using calculations to segment the gate teleportation circuit into a plurality of sub-circuits as shown in paragraphs [0058] – [0063] of the specification. Therefore, under MPEP 2106.04(a)(2), this limitation covers a mathematical concept, which falls in the “Mathematical Concept” grouping of abstract ideas. Claim 5 recites “ simulate a gate teleportation operation on each of the plurality of sub-circuits sequentially, wherein the gate teleportation operation on each of the plurality of sub-circuits is simulated based on an at least one qubit of a given sub-circuit and an output of a gate teleportation operation simulated on a sub-circuit which is previous to the given sub-circuit ”. The simulating involves using calculations to segment the gate teleportation circuit into a plurality of sub-circuits as shown in paragraphs [0058] – [0063] of the specification. Therefore, under MPEP 2106.04(a)(2), this limitation covers a mathematical concept, which falls in the “Mathematical Concept” grouping of abstract ideas. Regarding step 2A, prong 2 , the limitation of “ obtain a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is utilized for transferring an unknown quantum state of a qubit to another qubit in a quantum computing model ” amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process, see MPEP 2106.05(g). Also, the limitation of “ and measure an output of the gate teleportation operation on a last sub-circuit from the plurality of sub-circuits .” amounts to mere instructions to apply an exception, where it recites an idea of a solution. The claim limitation doesn’t how the measuring of the output is occurring. See MPEP 2106.05 (f) (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it ". Also, the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The additional elements of a circuit reception engine, a circuit segmentation engine and a gate teleportation engine that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine, see MPEP 2106.05(b) 1. It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial , Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014). See also TLI Communications LLC v. AV Automotive LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (mere recitation of concrete or tangible components is not an inventive concept); Eon Corp. IP Holdings LLC v. AT&T Mobility LLC, 785 F.3d 616, 623, 114 USPQ2d 1711, 1715 (Fed. Cir. 2015) (noting that Alappat’s rationale that an otherwise ineligible algorithm or software could be made patent-eligible by merely adding a generic computer to the claim was superseded by the Supreme Court’s Bilski and Alice Corp. decisions). Further, the claim recites the additional elements of a circuit reception engine, a circuit segmentation engine and a gate teleportation engine. The c ircuit reception engine, circuit segmentation engine and gate teleportation engine are recited at a high level of generality such that it amounts no more than mere instructions to apply the exception using a computer and/or a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. Regarding Step 2B , the limitation of “ obtain a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is utilized for transferring an unknown quantum state of a qubit to another qubit in a quantum computing model ” are also shown to reflect the court decisions of Versata Dev. Group, Inc. v. SAP Am., Inc. iv. Storing and retrieving information in memory, shown in MPEP 2106.05(d) (II). Also, the limitation of “ and measure an output of the gate teleportation operation on a last sub-circuit from the plurality of sub-circuits .” amounts to mere instructions to apply an exception, where it recites an idea of a solution. The claim limitation doesn’t how the measuring of the output is occurring. See MPEP 2106.05 (f) (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it ". Also, the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The additional elements of a circuit reception engine, a circuit segmentation engine and a gate teleportation engine that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine, see MPEP 2106.05(b) 1. It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial , Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014). See also TLI Communications LLC v. AV Automotive LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (mere recitation of concrete or tangible components is not an inventive concept); Eon Corp. IP Holdings LLC v. AT&T Mobility LLC, 785 F.3d 616, 623, 114 USPQ2d 1711, 1715 (Fed. Cir. 2015) (noting that Alappat’s rationale that an otherwise ineligible algorithm or software could be made patent-eligible by merely adding a generic computer to the claim was superseded by the Supreme Court’s Bilski and Alice Corp. decisions). Claims 2 and 6 Dependent claims 2 and 6 recite “ receiving a quantum circuit for the predetermined number of qubits, wherein the quantum circuit is compliant with circuit model of the quantum computing ”. This limitation amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process, see MPEP 2106.05(g). Dependent claims 2 and 6 recite “ and converting the quantum circuit into the gate teleportation circuit . ”. This limitation amounts to mere instructions to apply an exception, where it recites an idea of a solution. The claim limitation doesn’t indicate how the converting of the quantum circuit into the gate teleportation circuit is occurring. See MPEP 2106.05 (f) (1) Whether the claim recites only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished. The recitation of claim limitations that attempt to cover any solution to an identified problem with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, does not integrate a judicial exception into a practical application or provide significantly more because this type of recitation is equivalent to the words "apply it ". Claims 3 and 7 Dependent claims 3 and 7 recite “ wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n . ” . Under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claims 4 and 8 Dependent claims 4 and 8 recite “ wherein each of the plurality of sub-circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2 n and less than 2 n+1 . ” . Under the broadest reasonable interpretation, this limitation is a process step that covers performance in the human mind or with the aid of pencil and paper. As such, this limitation falls within the “Mental Process” grouping of abstract ideas. Claims 1-8 are therefore not drawn to eligible subject matter as they are directed to an abstract idea without significantly more. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness . Claim (s) 1-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over online reference A New Universal Quantum Gates and Its Simulation on GPGPU , written by Luo et al. in view of online reference Automatic Parallelisation of Quantum Circuits Using the Measurement Based Quantum Computing Model , written by Pius. With respect to claim 1 , Luo et al. discloses “ A method ” as [Luo et al. ( Pg. 16, Introduction, 1 st paragraph, “ A wide range of classical counterpart applications, such as large factor factorization, disordered database search [3] and quantum system simulation, are accelerated with quantum method ”)]; “ obtaining a gate teleportation circuit for a predetermined number of qubits ” as [Luo et al. (Pg. 23 , sec. 4.1 Implementation of Quantum Teleportation Algorithm , 1 st paragraph, “ To demonstrate usage of the universal gates proposed in Sect. 3.3, let us consider the quantum circuit shown in Fig. 7 that is used in quantum teleportation. Quantum teleportation is a process by which we can transfer the state of a system and can create replica of a state to another system. Quantum teleportation is the transfer of an unknown quantum state from a sender to a receiver by means of a shared bipartite entangled state and appropriate classical communication [16] . ”)]; “ wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model ” as [Luo et al. (Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm , 1 st paragraph, “ To demonstrate usage of the universal gates proposed in Sect. 3.3, let us consider the quantum circuit shown in Fig. 7 that is used in quantum teleportation. Quantum teleportation is a process by which we can transfer the state of a system and can create replica of a state to another system. Quantum teleportation is the transfer of an unknown quantum state from a sender to a receiver by means of a shared bipartite entangled state and appropriate classical communication [16] . A program is simulated with successful simulation which give successful transfer of random qubit to output and which governs perfect communication between sender and receiver. )]; “ simulating segmentation of the gate teleportation circuit into a plurality of sub-circuits based on the predetermined number of qubits, wherein each of the plurality of sub-circuits comprises at least one qubit ” as [Luo et al. (Pg. 19, sec. 2.2 Circuit Model for Quantum Computation , “ In the framework of the quantum circuit model of quantum computation it is assumed that a memory register containing n qubits can be prepared in an arbitrary state. Quantum circuit consists of quantum gates and lines connecting the gates and showing the evolution of qubit states, and it is to be read from left-to-right [7]. In quantum computation, any unitary matrix can be decomposed into a series of gate operations . A number of gates and their arrangement in the circuit determine a quantum algorithm . ” , Luo et al. (Pg. 24, sec. 4.2 Implemention of Grover’s Search Algorithm , 3 rd paragraph, “ To implement Grover’s algorithm, the multi-bit control gate and the multibit control phase shift gate in Fig. 9(b) need to be decomposed into one-qubit and two-qubit quantum gates . ” , The examiner considers the decompo sition into a series of gate operations as being segmentation of the gate teleportation circuit into a plurality of sub-circuits , since the decomposition results into one-qubit and two-qubit quantum gates , where the teleportation circuit is constructed from quantum gates )]; “ simulating a gate teleportation operation on each of the plurality of sub-circuits sequentially ” as [Luo et al. (Pg. 19, sec. 2.2 Circuit Model for Quantum Computation , “ In the framework of the quantum circuit model of quantum computation it is assumed that a memory register containing n qubits can be prepared in an arbitrary state. Quantum circuit consists of quantum gates and lines connecting the gates and showing the evolution of qubit states, and it is to be read from left-to-right [7]. In quantum computation, any unitary matrix can be decomposed into a series of gate operations . A number of gates and their arrangement in the circuit determine a quantum algorithm . ”, Luo et al. (Pg. 24, sec. 4.2 Implemention of Grover’s Search Algorithm , 3 rd paragraph, “ To implement Grover’s algorithm, the multi-bit control gate and the multibit control phase shift gate in Fig. 9(b) need to be decomposed into one-qubit and two-qubit quantum gates . ”, The examiner considers the simulation of the Grover’s Search Algorithm as being simulating a gate teleportation operation , since to the simulation of the Grover’s Search Algorithm is based on the simulation of the quantum teleportation algorithm)]; “ wherein the gate teleportation operation on each of the plurality of sub-circuits is simulated based on the at least one qubit of a given sub-circuit and an output of a gate teleportation operation simulated on a sub-circuit which is previous to the given sub-circuit ” as [Luo et al. (Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm , 1 st paragraph, “ To demonstrate usage of the universal gates proposed in Sect. 3.3, let us consider the quantum circuit shown in Fig. 7 that is used in quantum teleportation. Quantum teleportation is a process by which we can transfer the state of a system and can create replica of a state to another system. Quantum teleportation is the transfer of an unknown quantum state from a sender to a receiver by means of a shared bipartite entangled state and appropriate classical communication [16] . A program is simulated with successful simulation which give successful transfer of random qubit to output and which governs perfect communication between sender and receiver. , Luo et al. Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm , 3 rd paragraph “ Base on the Sect. 3.3, we use the new universal quantum gates to construct the circuit of quantum teleportation as Fig. 8. Implementing different circuits in GPGPU simulation platform, we verified that the effect of the two circuit is the same, and we propose a new quantum teleportation circuit only need two types of gates can be achieved .”, The examiner considers the simulation of the Grover’s Search Algorithm as being simulating a gate teleportation operation , since to the simulation of the Grover’s Search Algorithm is based on the simulation of the quantum teleportation algorithm)]; “ and measuring an output of simulation on gate teleportation operation on a last sub-circuit from the plurality of sub-circuits . ” as [ Luo et al. (Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm , 1 st paragraph, “ To demonstrate usage of the universal gates proposed in Sect. 3.3, let us consider the quantum circuit shown in Fig. 7 that is used in quantum teleportation. Quantum teleportation is a process by which we can transfer the state of a system and can create replica of a state to another system. Quantum teleportation is the transfer of an unknown quantum state from a sender to a receiver by means of a shared bipartite entangled state and appropriate classical communication [16] . A program is simulated with successful simulation which give successful transfer of random qubit to output and which governs perfect communication between sender and receiver . ” , Luo et al. Pg. 24, sec. 4.2 Implemention of Grover’s Search Algorithm , 3 rd paragraph, “ To implement Grover’s algorithm, the multi-bit control gate and the multibit control phase shift gate in Fig. 9(b) need to be decomposed into one-qubit and two-qubit quantum gates , By transferring an unknow quantum state to a target qubit demonstrates that the gate teleportation operation is measured, since the measurement involves verifying an unknown quantum state after applying conditional corrections based on classical measurements , see paragraph [ 0027] and [0054] of the specification)]; While Luo et al. teaches obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model , Luo et al. does not expliclty disclose “ and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing ” Pius discloses “ and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing ” as [Pius (Abstract “ The main focus of this work is to implement a program that can be used to parallelise quantum circuits. This is done by translating the quantum circuits to the Measurement Based Quantum Computing (MBQC) model, applying a number of optimising techniques to the computation in MBQC, and by translating it back to a quantum circuit .”, Pius Pg. 2, sec. 2.3.2 From the Quantum Circuit to the MBQC Pattern , 1 st paragraph, “ We can create a pattern that realises a computation that is equal to a computation in the quantum circuit model by adding command sequences that equal the gates to the pattern. The MBQC patterns realising a J(α) and ^Z gate are following, etc .”, Eqns. 2.14 and 2.15)]; Luo et al. and Pius are analogous art because they are from the same field endeavor of analyzing quantum circuits. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art to modify the teachings of Luo et al. of obtaining a gate teleportation circuit for a predetermined number of qubits, wherein the gate teleportation circuit is to transfer an unknown quantum state of a qubit to another qubit in a quantum computing model by incorporating and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing as taught by Pius for the purpose of parallelizing quantum circuits. Luo et al. in view of Pius teaches and wherein the gate teleportation circuit is compliant with Measurement Based Quantum Computing (MBQC) model of quantum computing . The motivation for doing so would have been because Pius teaches that by parallelizing quantum circuits, the ability to reduce the depth of quantum circuits can be accomplished. This allows a quantum circuit to be implemented on experimental quantum computers where the lifetime of a qubit is short (Luo et al. Pg. 61, sec. 7.1 Conclusions, 1 st paragraph, “ As presented, the main goal of this project, writing a program that automatically parallelises quantum circuits using the MBQC model, was fully achieved. Two versions of this program were implemented: a graphical, and a console one. This program is a useful tool that has two main fields of application. The most obvious way to use it is for reducing the depth of quantum circuits when the depth of the circuit is important. This is useful when implementing a quantum circuit on experimental quantum computers, where the lifetime of a qubit is short .”). With respect to claim 2 , the combination of Luo et al. and Pius discloses the method of claim 1 above, and Luo et al. discloses “ receiving a quantum circuit for the predetermined number of qubits ” as [Luo et al. (Pg. 19, sec. 2.2 Circuit Model for Quantum Computation, “ In the framework of the quantum circuit model of quantum computation it is assumed that a memory register containing n qubits can be prepared in an arbitrary state. Quantum circuit consists of quantum gates and lines connecting the gates and showing the evolution of qubit states, and it is to be read from left-to-right [7]. In quantum computation, any unitary matrix can be decomposed into a series of gate operations. A number of gates and their arrangement in the circuit determine a quantum algorithm .” )]; “ wherein the quantum circuit is compliant with circuit model of the quantum computing ” as [Luo et al. (Pg. 19, sec. 2.2 Circuit Model for Quantum Computation, “ In the framework of the quantum circuit model of quantum computation it is assumed that a memory register containing n qubits can be prepared in an arbitrary state. Quantum circuit consists of quantum gates and lines connecting the gates and showing the evolution of qubit states, and it is to be read from left-to-right [7]. In quantum computation, any unitary matrix can be decomposed into a series of gate operations. A number of gates and their arrangement in the circuit determine a quantum algorithm .” )]; “ and converting the quantum circuit into the gate teleportation circuit . ” as [Luo et al. (Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm, 1 st paragraph, “ To demonstrate usage of the universal gates proposed in Sect. 3.3, let us consider the quantum circuit shown in Fig. 7 that is used in quantum teleportation. Quantum teleportation is a process by which we can transfer the state of a system and can create replica of a state to another system. Quantum teleportation is the transfer of an unknown quantum state from a sender to a receiver by means of a shared bipartite entangled state and appropriate classical communication [16] . A program is simulated with successful simulation which give successful transfer of random qubit to output and which governs perfect communication between sender and receiver. , Luo et al. Pg. 23, sec. 4.1 Implementation of Quantum Teleportation Algorithm, 3 rd paragraph “ Base on the Sect. 3.3, we use the new universal quantum gates to construct the circuit of quantum teleportation as Fig. 8. Implementing different circuits in GPGPU simulation platform, we verified that the effect of the two circuit is the same, and we propose a new quantum teleportation circuit only need two types of gates can be achieved .” )]; With respect to claim 3 , the combination of Luo et al. and Pius discloses the method of claim 1 above, and Luo et al. discloses “ wherein each of the plurality of sub-circuits comprises 'n' qubits when the predetermined number of qubits is 2 n .” as [Luo et al. (Pg. 18, (1) Single qubit gates, 3 rd paragraph, “ We use the ∗ to indicate that the bits on the corresponding positions are the same. It can be concluded that the H, X, Y, Phase shift gates act on the quantum bits of n require additional space for exchanging amplitudes, and the number of ground probabilities to be updated are 2 n .”)]; With respect to claim 4 , the combination of Luo et al. and Pius discloses the method of claim 1 above, and Pius discloses “ wherein each of the plurality of sub-circuits comprises 'n+1' qubits when the predetermined number of qubits is more than 2 n and less than 2 n+1 . ” as [Pius (Pg. 5, 1 st full paragraph, “ Some of the most common one and two qubit quantum gates are presented in figure 2.3. All the gates used in this work are either present in this figure or are introduced immediately before they are used .”, Fig. 2.3, With there being two qubit quantum gates, demonstrates that the plurality of sub-circuit comprises n+1 qubits, where for example, Hadamard gates act on multiple qubits, see paragraph [0014] of the specification)]; With respect to claim 5 , Luo et al. discloses “ A simulator for a quantum computing system ” as [Luo et al. (Pg. 17, 2 nd paragraph, “ In this study, the novel basic quantum gate simulation platform is achieved under the GPGPU environment, on which any arbitrary quantum algorithm can be simulated . ”)]; “ a circuit reception engine ” as [Luo et al. (Pg. 17, 1 st paragraph, “ The quantum circuit model is the most widely used quantum computing model, which provides a basic architecture for the physical implementation of quantum computers. In the quantum computing theory of the circuit model, the basic quantum gate library is found first, and then the universal quantum computation is realized with the combination of these gates. ”, A circuit reception engine can be hardware and firmware such as a processor. With having a quantum computer, demonstrates that there’s a processor, since quantum processing units (QPUs) are embedded within a quantum computer)]; “ a circuit segmentation engine ” as [Luo et al. (Pg. 17, 1 st paragraph, “ The quantum circuit model is the most widely used quantum computing model, which provides a basic architecture for the physical implementation of quantum computers. In the quantum computing theory of the circuit model, the basic quantum gate library is found first, and then the universal quantum computation is realized with the combination of these gates. ”, A circuit s egmentation engine can be hardware and firmware such as a processor. With having a quantum computer, demonstrates that there’s a processor, since quantum processing units (QPUs) are embedded within a quantum computer)]; The other limitaitons of the claim recite the same substantive limitations as claim 1 above, and are rejected using the same teachings. With respect to claims 6-8 , the claims recite the same substantive limitations as claims 2-4 above, and are rejected using the same teachings. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The relevance of Pednault et al. (U.S. PGPub 2019/0095561) is a computer implemented method includes receiving a digital description of a quantum circuit, partitioning the digital description of the quantum circuit into a plurality of quantum sub-circuits wherein each quantum sub-circuit of the plurality of quantum sub-circuits comprises one or more quantum gates . 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