Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/27/2026 has been entered.
In the Instant Amendment, Claim(s) 1, 5 and 16 has/have been amended; Claim(s) 4, 9, 10 and 17 was/were cancelled; Claim(s) 1, 5 and 16 is/are independent claims. Claims 1-3, 5-8, 11-16 and 18-24 have been examined and are pending in this application.
Response to Arguments
Applicant's arguments filed 1/27/2026 have been fully considered but they are not persuasive.
Regarding claims 1, 5 and 16, the Applicant is arguing in the remarks (pages 8-13) that Oh/Mehta in the combination fails to disclose, suggest or teach “wherein an electric field within the first photodiode produces a unidirectional electron drift current, and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor”.
The Examiner respectfully disagrees with the Applicant. The Examiner respectfully submits that Oh in the combination does teach wherein an electric field within the first photodiode produces a unidirectional electron drift current (UEDC), and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor (PGC1 is input to both transistors PG1 and PG2 enabling simultaneously charge transferring) (Figs. 1-8; paras. 0087-0090, 0096; the reproduced figure 1 [please see below in the rejection section] is intentionally rotated to show the similarity between the Applicant’s figure 2A and the reproduced figure 1; the unidirectional electron drift current UEDC corresponds to the Applicant’s “electron flow 219”; D1 and D2 correspond to “two-way charge transfer 221”). While Oh is silent on an electric field within a photodiode producing a unidirectional electron drift current UEDC, the structure of the photodiode PD and the arrangement of the two-way charge transfer transistors PG1 and PG2 are similar to the Applicant’s figure 2A. Thus, one skill in the art would understand that there must be an electric field within the photodiode PD producing a unidirectional electron drift current UEDC flowing from the left to the right of the photodiode PD as annotated in the reproduced figure 1 of Oh below.
For the reasons above, the Examiner respectfully submits that the combination Wang, Oh and Mehta does teach the features as claimed in claims 1, 5 and 16.
Claim Objections
Claim 5 is objected to because of the following informalities:
Claim 5 is suggested to be amended as “a first transfer .
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6-8, 11-16 and 18-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US 20120002089 A1) in views of Oh et al (US 20140252437 A1) and Mehta et al (US 20210168314 A1).
Regarding claim 1, Wang teaches An active pixel for use in a
a first photodiode (PPD);
a first transfer transistor (TX1) directly coupled to and operatively coupled to the first photodiode; and
a second transfer transistor (TX2) directly coupled to and operatively coupled to the first photodiode, wherein the first transfer transistor and the second transfer transistor reside at opposite sides of the first photodiode (Figs. 8A, 23, 27);
a first floating diffusion node (FD1) directly coupled to and operatively coupled to the first transfer transistor and a source follower (SF1) (Fig. 11);
a second floating diffusion node (FD2) directly coupled to and operatively coupled to the second transfer transistor and operatively coupled to the source follower (Fig. 11); and
a transistor (SH) for pixel binning disposed between the first floating diffusion node and the second floating diffusion node (Fig. 24; paras. 0075, 0094; “"2.sup.nd sample" is the value read from FD1 and FD2, after SH has been activated to charge share between FD1 and FD2”),
but fails to teach
An active pixel for use in a digital pixel sensor imaging system;
wherein an electric field within the first photodiode produces a unidirectional electron drift current, and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor.
However, in the same field of endeavor Oh teaches
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wherein an electric field within the first photodiode produces a unidirectional electron drift current (UEDC), and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor (PGC1 is input to both transistors PG1 and PG2 enabling simultaneously charge transferring) (Figs. 1-8; paras. 0087-0090, 0096; the reproduced figure 1 above is intentionally rotated to show the similarity between the Applicant’s figure 2A and the reproduced figure 1; the unidirectional electron drift current UC corresponds to the Applicant’s “electron flow 219”; D1 and D2 correspond to “two-way charge transfer 221”).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in Wang to have wherein an electric field within the first photodiode produces a unidirectional electron drift current, and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor for enabling controlled charge drift toward multiple storages to allow faster complete charge transfer yielding a predicted result.
Moreover, in the same field of endeavor Mehta teaches
An active pixel for use in a digital pixel sensor imaging system (Figs. 5A, C, 3; para. 0081; pixels 310 configured as combined or shared event detection (DVS) and image sensor (IS) pixels 501 that perform both event detection and image sensor functions).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Mehta in the combination to have an active pixel for use in a digital pixel sensor imaging system for higher temporal resolution and dynamic range with lower power consumption yielding a predicted result.
Regarding claim 2, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches wherein the first transfer gate and the second transfer gate are located on the second side of the first photodiode (Figs. 8A, 23, 27).
Moreover, Oh teaches an electron flow corresponding to the electron drift current is directed from a first side of the first photodiode to a second side of the first photodiode (Figs. 1-8; paras. 0087-0090).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have an electron flow corresponding to the electron drift current is directed from a first side of the first photodiode to a second side of the first photodiode for enabling controlled charge drift toward multiple storages to allow faster complete charge transfer yielding a predicted result.
Regarding claim 3, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches wherein the first transfer transistor and the second transfer transistor include an active layer intersecting a poly layer and a charge well layer configured as a floating diffusion layer (Fig. 27).
Regarding claim 6, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Oh teaches wherein the electron drift current is generated in response to an electric field being applied to the active pixel based on an impurity concentration gradient of the first photodiode (Figs. 1-8; paras. 0087-0090; doping density of PD).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein the electron drift current is generated in response to an electric field being applied to the active pixel based on an impurity concentration gradient of the first photodiode for enabling controlled charge drift toward multiple storages to allow faster complete charge transfer yielding a predicted result.
Regarding claim 7, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches further comprising:
a second photodiode; a third transfer transistor operatively coupled to the second photodiode; and a fourth transfer transistor operatively coupled to the second photodiode, wherein the third transfer transistor and the fourth transfer transistor reside at opposite sides of the second photodiode (Figs. 8A, 23, 24, 27; another PPD has the same structure as in claim 1), wherein:
Moreover, Oh teaches an electron drift current within the second photodiode causes two direction charge transfer of charge of the second photodiode to the third transfer transistor and the fourth transfer transistor (for the same reason as in claim 1 for another pixel).
Regarding claim 8, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 7. In addition, Oh teaches, wherein:
an electron flow corresponding to the electron drift current is directed from a first side of the second photodiode to a second side of the second photodiode; wherein a direction of the electron drift current within the first photodiode is opposite of a direction of the electron drift current within the second photodiode, wherein the third transfer transistor and the fourth transfer transistor are located on the second side of the second photodiode (Figs. 1-8, 31-35).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have an electron flow corresponding to the electron drift current is directed from a first side of the second photodiode to a second side of the second photodiode; wherein a direction of the electron drift current within the first photodiode is opposite of a direction of the electron drift current within the second photodiode, wherein the third transfer transistor and the fourth transfer transistor are located on the second side of the second photodiode for enabling controlled charge drift toward multiple storages from each photodiode to allow faster complete charge transfer of pixels in the pixel array yielding a predicted result.
Regarding claim 11, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Oh teaches wherein the electron drift current causes the two direction charge transfer of charge of the first photodiode to the first transfer transistor and the second transfer transistor; and wherein the electron drift current is formed in response to an electric field being generated within the first photodiode (Figs. 1-8; paras. 0087-0090).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein the electron drift current causes the two direction charge transfer of charge of the first photodiode to the first transfer transistor and the second transfer transistor; and wherein the electron drift current is formed in response to an electric field being generated within the first photodiode for enabling controlled charge drift toward multiple storages via transfer transistors to allow faster complete charge transfer yielding a predicted result.
Regarding claim 12, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 11. In addition, Oh teaches wherein the first photodiode comprises a first layer and a second layer and the electric field is generated within the first photodiode based on the first photodiode having an impurity concentration gradient resulting from the first layer and the second layer each having different impurity concentrations (Figs. 1-8; paras. 0087-0090; doping density is gradually changing from center CA toward sides EA creating multiple layers with different impurity concentrations).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein the first photodiode comprises a first layer and a second layer and the electric field is generated within the first photodiode based on the first photodiode having an impurity concentration gradient resulting from the first layer and the second layer each having different impurity concentrations for arranging multiple doping layers enabling controlled charge drift toward multiple storages via transfer transistors to allow faster complete charge transfer yielding a predicted result.
Regarding claim 13, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 12. In addition, Oh teaches wherein the first photodiode comprises at least one additional layer having a different impurity concentration than the first layer and the second layer; and wherein a magnitude and a direction of the electric field is adjusted based on a number of layers that the first photodiode includes (Figs. 1-8; paras. 0087-0090; doping density is gradually changing from center CA toward sides EA creating multiple layers with different impurity concentrations).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein the first photodiode comprises at least one additional layer having a different impurity concentration than the first layer and the second layer; and wherein a magnitude and a direction of the electric field is adjusted based on a number of layers that the first photodiode includes for arranging multiple doping layers enabling controlled charge drift toward multiple storages via transfer transistors to allow faster complete charge transfer yielding a predicted result.
Regarding claim 14, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches wherein the first photodiode is a two-way charge transfer photodiode (Figs. 23, 24).
Regarding claim 15, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches wherein the active pixel implements a backside illumination (or illuminated) pinned-photodiode (paras. 0050, 0060, 0084-0087; “The pinned photodiode PPD comprises regions PPD_P, PPD_N in a semiconductor material 10”).
Regarding claim 16, Wang teaches A
one or more active pixels (Figs. 8A), wherein each of the one or more active pixels comprises:
same features as claimed in claim 1 (rejected for the same reasons in claim 1 by the combination of Wang, Oh and Mehta).
Regarding claim 18, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 16. In addition, Mehta teaches further comprising:
a capacitor (431) operatively coupled to the second floating diffusion node (Fig. 5A; paras. 0081, 0105-0115).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Mehta in the combination to have a capacitor operatively coupled to the second floating diffusion node for allowing the image signal to be properly read enabling the DVS imaging system to optimally convert to digital signals yielding a predicted result.
Regarding claim 19, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 16. In addition, Oh teaches wherein an electron flow that corresponding to the electron drift current is directed from a first side of each of the one or more active pixels to a second side of each of the one or more active pixels (Figs. 1-3, 8, 26; paras. 0082, 0088-0090); and
wherein the first transfer transistor and the second transfer transistor are located on the same side of a corresponding active pixel (Figs. 1, 8, 26).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein an electron flow that corresponding to the electron drift current is directed from a first side of each of the one or more active pixels to a second side of each of the one or more active pixels; and wherein the first transfer transistor and the second transfer transistor are located on the same side of a corresponding active pixel for providing different pixel configuration optimizing pixel transfer performance yielding a predicted result.
Regarding claim 20, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 16. In addition, Oh teaches wherein a time of flight (ToF) measurement is determined using the one or more active pixels (Fig. 31; para. 0095).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in the combination to have wherein a time of flight (ToF) measurement is determined using the one or more active pixels for enabling depth detection allowing capturing 3D image capability yielding a predicted result.
Regarding claim 21, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Oh teaches wherein a second transistor (RST) for pixel resetting operatively coupled to the first floating diffusion node and the second floating diffusion node (Figs. 23-24).
Regarding claim 22, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 16. In addition, Oh teaches wherein a second transistor (RST) for pixel resetting operatively coupled to the first floating diffusion node and the second floating diffusion node (Figs. 23-24).
Regarding claim 23, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang teaches wherein the second floating diffusion node (FD2) includes a drain node (of TX2, SH or RST) (Figs. 23-24).
Regarding claim 24, the combination of Wang, Oh and Mehta teaches everything as claimed in claim 1. In addition, Wang wherein the source follower (SF) includes a voltage node (VDD) to dump accumulate photo charge (Figs. 23-24; when RST is ON, dump photo charge in FD2 into VDD; when RST and SH are ON, dump photo charges in FD1 and FD2 into VDD).
Claim 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fossum (US 6667768 B1) in views of Oh et al (US 20140252437 A1) and Mehta et al (US 20210168314 A1).
Regarding claim 5, Fossum teaches An active pixel for use in a
a first photodiode (200);
a first transfer transistor (M2) directly coupled to and operatively coupled to the first photodiode;
a second transfer transistor (M1) directly coupled to and operatively coupled to the first photodiode, wherein the first transfer transistor and the second transfer transistor reside at opposite sides of the first photodiode (Figs. 2);
a floating diffusion node (FD) directly coupled to and operatively coupled to the first transfer transistor; and
a drain (of ) directly coupled to and operatively coupled to the second transfer transistor, directly coupled to a power supply line (“Photodiode 200 is connected to the source of FET 204 whose drain is connected to a bias voltage level VDR 206”), and configured to receive charge output by the second transfer transistor (“FIGS. 4F and 4G show how the shutter can be closed by enabling RPD to allow incoming charge to spill over the barrier”) (col. 2, lines 40-67; col. 4, lines 30-32),
but fails to teach
An active pixel for use in a digital pixel sensor imaging system;
wherein an electric field within the first photodiode produces a unidirectional electron drift current, and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor.
However, in the same field of endeavor Oh teaches
wherein an electric field within the first photodiode produces a unidirectional electron drift current (UC), and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor (PGC1 is input to both transistors PG1 and PG2 enabling simultaneously charge transferring) (Figs. 1-8; paras. 0087-0090, 0096; the reproduced figure 1 above is intentionally rotated to show the similarity between the Applicant’s figure 2A and the reproduced figure 1; the unidirectional electron drift current UC corresponds to the Applicant’s “electron flow 219”; D1 and D2 correspond to “two-way charge transfer 221”).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Oh in Fossum to have wherein an electric field within the first photodiode produces a unidirectional electron drift current, and wherein the unidirectional electron drift current simultaneously flows to and is collected by the first transfer transistor and the second transfer transistor such that charge from the unidirectional electron drift current from the first photodiode is simultaneously transferred to both the first transfer transistor and the second transfer transistor for enabling controlled charge drift toward multiple storages to allow faster complete charge transfer yielding a predicted result.
Moreover, in the same field of endeavor Mehta teaches
An active pixel for use in a digital pixel sensor imaging system (Figs. 5A, C, 3; para. 0081; pixels 310 configured as combined or shared event detection (DVS) and image sensor (IS) pixels 501 that perform both event detection and image sensor functions).
Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Mehta in the combination to have an active pixel for use in a digital pixel sensor imaging system for higher temporal resolution and dynamic range with lower power consumption yielding a predicted result.
Additional Rejections
Buettgen et al (US 20130248938 A1): figure 13 shows the similar structure to the Applicant’s figures 2A and 11C. This can be used in combination with the combination to expressly teach the new features claimed in claim 1 and 6 for the same reason presented in claims 1 and 6.
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Kenichi (US 20100237390 A1): figure 10 shows the similar structure to the Applicant’s figure 11C. This can be used in combination with the combination to expressly teach claim 6 or 1 for the same reason presented in claim 6.
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Ma et al (US 20210203869 A1) teaches a back-side-illuminated (BSI) image sensor pixel that includes a pinned photodiode (PPD) (para. 0003) which can be combined to address the limitation “backside illumination pinned-photodiode” as claimed in claim 15 for allowing more light to reach photodiode improving low-light performance yielding a predicted result.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Brady et al (US 12010449 B2): FIGS. 4-7 further illustrate modulation areas 415, 515, 615, and 715, which are areas (e.g., doped areas) near gates of transistors TG0 and TG1 that may receive control signals to assist with channeling charge toward TG0 or TG1 (col. 9, lines 14-17). FIGS. 4-7 further illustrate modulation areas 415, 515, 615, and 715, which are areas (e.g., doped areas) near gates of transistors TG0 and TG1 that may receive control signals to assist with channeling charge toward TG0 or TG1 (col. 7, lines 50-67).
Geurts (US 9853080 B2): the source follower (SF) includes a voltage node (VAA) to dump accumulate photo charge (Fig. 2).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Quan Pham whose telephone number is (571)272-4438. The examiner can normally be reached Mon-Fri 9am-7pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at (571) 272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Quan Pham/Primary Examiner, Art Unit 2637