DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed January 16, 2026 has been entered. Claims 15-20 and 24-27 remain pending in the application.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 15-20 and 24-27 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Under the Step 1 of the Section 101 analysis, Claims 15-20, 24, and 27 are drawn to a method which is within the four statutory categories (i.e., a process), Claim 25 is drawn to a device which is within the four statutory categories (i.e. a machine), and Claim 26 is drawn to a non-transitory computer-readable medium which is within the four statutory categories (i.e., a manufacture).
Since the claims are directed toward statutory categories, it must be determined if the claims are directed towards a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea). Based on consideration of all of the relevant factors with respect to the claim as a whole, claims 15-20 and 24-27 are determined to be directed to an abstract idea. The rationale for this determination is explained below:
Regarding Claims 15 and 25-26:
Claims 15 and 25-26 are drawn to an abstract idea without significantly more. The claims recite “providing a first set of values for parameters that define at least one part of a first architecture for the artificial neural network, the at least one part of the first architecture encompassing a plurality of layers of the artificial neural network and/or a plurality of operations of the artificial neural network; determining a first value of a function, the first value characterizing a property of the hardware accelerator when the hardware accelerator executes a task for the at least one part of the artificial neural network that is defined by the first set of values for the parameters, wherein a first data point of the function is defined by the first set of values for the parameters and the first value of the function; determining a gradient of the function at each of at least two additional data points of the function; determining which one of the at least two additional data points has a greater gradient; selecting as a second data point of the function the one of the at least two additional data points that has the greater gradient, wherein the second data point of the function is defined by a second set of values for the parameters that define at least one part of a second architecture for the artificial neural network and a second value of the function, the second value characterizing a property of the hardware accelerator when the hardware accelerator executes the task for the at least one part of the artificial neural network that is defined by the second set of values for the parameters; determining a third data point of the function using an interpolation between the first data point and the second data point, wherein the third data point is defined by a third set of values for the parameters and a third value of the function; determining, from the first, second, and third data points, a data point for which a value of the function of the data point satisfies a condition, the data point defining the result of the neural architecture search; and operating at least one part of the artificial neural network on the hardware accelerator based on a set of values for the parameters of the determined data point.”
Under the Step 2A Prong One, the limitations, as underlined above, are processes that, under its broadest reasonable interpretation, cover Mental Processes such as concepts performed in the human mind (including an observation, evaluation, judgment, opinion). For example, but for the “architecture”, “artificial neural network”, “layers”, “operations”, “function”, “hardware accelerator”, and “neural architecture search” language, the underlined limitations in the context of this claim encompass the mental processes. The series of steps belong to a typical observation, evaluation, judgment, or opinion, because providing and determining data or information such as values or sets of values can be performed manually by human mind.
Under the Step 2A Prong Two, this judicial exception is not integrated into a practical application. In particular, the claim only recites additional elements – “A computer-implemented method for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural architecture search, the method comprising the following steps:”, “A device for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural architecture search, the device configured to:”, “A non-transitory computer-readable medium on which is stored a computer program including computer-readable instructions for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural network search, the instruction, when executed by a computer, causing the computer to perform the following steps:”, “architecture”, “artificial neural network”, “layers”, “operations”, “function”, “hardware accelerator”, and “neural architecture search”. The additional elements are recited at a high-level of generality (i.e., performing generic functions of an interaction) such that it amounts no more than mere instructions to apply the exception using a generic computer component, merely implementing an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. Additionally, regarding the specification and claims, there is no improvement in the functioning of a computer or an improvement to other technology or technical field present, there is no applying or using the judicial exception to effect a particular treatment or prophylaxis for a disease or medical condition present, there is no implementing the judicial exception with or using the judicial exception in conjunction with a particular machine or manufacture that is integral to the claim present, there is no effecting a transformation or reduction of a particular article to a different state or thing present, and there is no applying or using the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment present such that the claim as a whole is more than a drafting effort designed to monopolize the exception. Accordingly, these additional elements, individually or in combination, do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
Under the Step 2B, the claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements in the process amounts to no more than mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claims are not patent eligible.
Regarding Claims 16-20 and 24:
Dependent claims 16-20 and 24 include additional limitations, for example, “function” and “target system” (Claim 16); “function” and “target system” (Claim 17); “computing time”, “energy”, and “memory bandwidth” (Claim 18); “synapse”, “neuron”, “filter”, “artificial neural network”, “layers”, “target system”, and “memory” (Claim 19); “function” (Claim 20); and “artificial neural network”, “function”, and “architecture” (Claim 24), but none of these limitations are deemed significantly more than the abstract idea because, as stated above, they require no more than generic computer structures or signals to be executed, and do not recite any Improvements to the functioning of a computer, or Improvements to any other technology or technical field.
Thus, taken alone, the additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Furthermore, looking at the limitations as an ordered combination adds nothing that is not already present when looking at the elements taken individually. There is no indication that the combination of elements improves the functioning of a computer or improves any other technology, and their collective functions merely provide conventional computer implementation or implementing the judicial exception on a generic computer.
Therefore, whether taken individually or as an ordered combination, claims 16-20 and 24 are nonetheless rejected under 35 U.S.C. 101 as being directed to non-statutory subject matter.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 15-16, 18-20, and 24-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wu (US 11748615 B1) in view of Izadi (WO 2020023483 A1).
Regarding Claims 15 and 25-26, Wu teaches A computer-implemented method for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural architecture search, the method comprising the following steps (Wu: Abstract; Col. 8, lines 49-61): A device for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural architecture search, the device configured to (Wu: Abstract; Col. 2, lines 16-28; Col. 8, lines 49-61): A non-transitory computer-readable medium on which is stored a computer program including computer-readable instructions for operating at least one part of an artificial neural network on a hardware accelerator using a result of a neural network search, the instruction, when executed by a computer, causing the computer to perform the following steps (Wu: Abstract; 2/16-28; Col. 8, lines 49-61):
providing a first set of values for parameters that define at least one part of a first architecture for the artificial neural network, the at least one part of the first architecture encompassing a plurality of layers of the artificial neural network and/or a plurality of operations of the artificial neural network (Wu: Abstract; 4/65 ~ 5/18 teach(es) The DNAS engine is configured with a stochastic super net defining a layer-wise search space having a plurality of candidate layers, each of the candidate layers specifying one or more operators for a neural network architecture; neural network model generation system receives, via user interface, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models); determining a first value of a function, the first value characterizing a property of the hardware accelerator when the hardware accelerator executes a task for the at least one part of the artificial neural network that is defined by the first set of values for the parameters, wherein a first data point of the function is defined by the first set of values for the parameters and the first value of the function (Wu: Abstract; 1/56-67; 4/65 ~ 5/18 teach(es) The DNAS engine is configured with a stochastic super net defining a layer-wise search space having a plurality of candidate layers, each of the candidate layers specifying one or more operators for a neural network architecture; the DNAS engine is configured to process training data to train weights for the operators in the stochastic super net based on a loss function representing a latency of the respective operator on a target platform, and to select a set of candidate neural network architectures from the trained stochastic super net; neural network model generation system receives, via user interface, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models); determining a gradient of the function at each of at least two additional data points of the function; determining which one of the at least two additional data points has a greater gradient (Wu: Abstract; 1/56 ~ 2/4; 5/37-55; 6/12-30 teach(es) The DNAS engine may, for example, be configured to train the stochastic super net by traversing the layer-wise search space using gradient-based optimization of network architecture distribution; during operation of DNAS engine, the architecture of the distribution may be trained during the search process using gradient-based optimization search, such as stochastic gradient descent (SGD), such that the constructed neural net need not be trained after selecting and prior to deployment to target devices);
selecting as a second data point of the function the one of the at least two additional data points that has the greater gradient, wherein the second data point of the function is defined by a second set of values for the parameters that define at least one part of a second architecture for the artificial neural network (Wu: Abstract; 4/65 ~ 5/18; 8/49-51 teach(es) The DNAS engine is configured with a stochastic super net defining a layer-wise search space having a plurality of candidate layers, each of the candidate layers specifying one or more operators for a neural network architecture; neural network model generation system receives, via user interface, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices) a second value of the function, the second value characterizing a property of the hardware accelerator when the hardware accelerator executes the task for the at least one part of the artificial neural network that is defined by the second set of values for the parameters (Wu: Abstract; 1/56-67; 8/49-61 teach(es) The DNAS engine is configured with a stochastic super net defining a layer-wise search space having a plurality of candidate layers, each of the candidate layers specifying one or more operators for a neural network architecture; the DNAS engine is configured to process training data to train weights for the operators in the stochastic super net based on a loss function representing a latency of the respective operator on a target platform, and to select a set of candidate neural network architectures from the trained stochastic super net; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices); …, wherein the … data point is defined by a … set of values for the parameters and a … value of the function (Wu: 4/65 ~ 5/18 teach(es) neural network model generation system receives, via user interface, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models); determining, from the first, second, and …, a data point for which a value of the function of the data point satisfies a condition, the data point defining the result of the neural architecture search (Wu: Wu: 5/37-55; 6/12-30; 8/49-51 teach(es) during operation of DNAS engine, the architecture of the distribution may be trained during the search process using gradient-based optimization search, such as stochastic gradient descent (SGD), such that the constructed neural net need not be trained after selecting and prior to deployment to target devices; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices)); operating at least one part of the artificial neural network on the hardware accelerator based on a set of values for the parameters of the determined data point (Wu: 4/65 ~ 5/18; 8/49-61; 10/58-61 teach(es) neural network model generation system receives, via user interface, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models. User may also, for example, specify for each desired target device data characterizing performance characteristics for each convolutional neural network operation with respect to each device, such as the actual or expected latency of executing each operation on the respective device; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices).
However, Wu does not explicitly teach determining a third data point of the function using an interpolation between the first data point and the second data point.
Izadi from same or similar field of endeavor teaches determining a third data point of the function using an interpolation between the first data point and the second data point (Izadi: Paragraph(s) 0063 teach(es) the latent parameters parameterize the conditional layer weights by one or more B-splines. A B-spline (or basis spline) is a piecewise polynomial parametric function with bounded support and a specified level of smoothness up to Cd , where d is the degree of the B-spline, that approximately interpolates a set of control points (“knots”)).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of Wu to incorporate the teachings of Izadi for determining a third data point of the function using an interpolation between the first data point and the second data point.
There is motivation to combine Izadi into Wu because Izadi’s teachings of interpolation would facilitate splining of data points having a specified level of smoothness (Izadi: Paragraph(s) 0063).
Regarding Claim 16, the combination of Wu and Izadi teaches all the limitations of claim 15 above; and Wu further teaches wherein the first value of the function is determined by acquiring the property of the hardware accelerator on the hardware accelerator (Wu: Abstract; 1/56 ~ 2/4; 8/49-61 teach(es) The DNAS engine is configured with a stochastic super net defining a layer-wise search space having a plurality of candidate layers, each of the candidate layers specifying one or more operators for a neural network architecture; the DNAS engine is configured to process training data to train weights for the operators in the stochastic super net based on a loss function representing a latency of the respective operator on a target platform, and to select a set of candidate neural network architectures from the trained stochastic super net; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices).
Regarding Claim 18, the combination of Wu and Izadi teaches all the limitations of claim 16 above; and Wu further teaches wherein the property is a latency, the latency being a duration of a computing time or a performance or energy consumed per period of time or a memory bandwidth (Wu: 3/26-36 teach(es) a differentiable neural architecture search (DNAS) engine that uses, in some examples, gradient-based optimization to search for architectures from a discrete combinatorial space and directly optimizes for actual/expected characteristics for target devices, such as latency per each type of neural network operation and/or power or energy consumption per type of operation).
Regarding Claim 19, the combination of Wu and Izadi teaches all the limitations of claim 15 above; and Wu further teaches wherein one of the parameters defines: a size of a synapse or neuron or filter in the artificial neural network, and/or a number of filters in the artificial neural network, and/or a number of layers of the artificial neural network that are combined in a task which can be executed by the hardware accelerator without part-results of the task being transferred into or from a memory that is external to the hardware accelerator (Wu: 7/24-40; 8/49-61 teach(es) The macro architecture may be viewed as configuration data defining the search space of super net for use by NN model generation system when constructing the super net and defines the number of layers and the input/output dimensions of each layer. In this example, the first and the last three layers of the network have fixed operators. For the rest of the layers, their block type needs to be searched. The filter numbers for each layer are hand-picked empirically; The loss function reflects not only the accuracy of a given architecture but also the latency on the target hardware of target devices).
Regarding Claim 20, the combination of Wu and Izadi teaches all the limitations of claim 15 above; however the combination does not explicitly teach the method further comprising: determining a measure of similarity between the first data point and each of at least two further data points of the function; determining which one of the at least two further data points has a measure of similarity with the first data point that satisfies a condition; and selecting as a fourth data point of the function the one of the at least two further data points that has the measure of similarity with the first data point that satisfies the condition, wherein the fourth data point of the function is defined by a fourth set of values for the parameters and a fourth value of the function.
Izadi further teaches the method further comprising: determining a measure of similarity between the first data point and each of at least two further data points of the function; determining which one of the at least two further data points has a measure of similarity with the first data point that satisfies a condition; and selecting as a fourth data point of the function the one of the at least two further data points that has the measure of similarity with the first data point that satisfies the condition, wherein the fourth data point of the function is defined by a fourth set of values for the parameters and a fourth value of the function (Izadi: Paragraph(s) 0081-0082, 0063 teach(es) the objective function characterizes the accuracy of the network outputs generated by the neural network by measuring a similarity between the network outputs and the corresponding target outputs specified by the training examples, e.g., using a cross-entropy loss term or a squared-error loss term; the latent parameters parameterize the conditional layer weights by one or more B-splines. A B-spline (or basis spline) is a piecewise polynomial parametric function with bounded support and a specified level of smoothness up to Cd , where d is the degree of the B-spline, that approximately interpolates a set of control points (“knots”)).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination of Wu and Izadi to incorporate the teachings of Izadi for wherein for the method further comprising: determining a measure of similarity between the first data point and each of at least two further data points of the function; determining which one of the at least two further data points has a measure of similarity with the first data point that satisfies a condition; and selecting as a fourth data point of the function the one of the at least two further data points that has the measure of similarity with the first data point that satisfies the condition, wherein the fourth data point of the function is defined by a fourth set of values for the parameters and a fourth value of the function.
There is motivation to combine Izadi into the combination of Wu and Izadi because Izadi’s teachings of measuring a similarity and interpolation would facilitate characterizing the accuracy of the network outputs generated by the neural network (Izadi: Paragraph(s) 0081-0082, 0063).
Regarding Claim 24, the combination of Wu and Izadi teaches all the limitations of claim 15 above; and Wu further teaches wherein a further value for a further parameter of the artificial neural network is determined independently of the function, and the architecture of the artificial neural network is determined based on the further value (Wu: 4/65 ~ 5/18 teach(es) neural network model generation system receives, via user interface 38, various input parameters, such as data specifying a set of one or more desired target devices for which to generate neural network models).
Regarding Claim 27, the combination of Wu and Izadi teaches all the limitations of claim 20 above; and the combination further teaches further comprising determining a fifth data point of the function using an interpolation between the first data point and the fourth data point, wherein the fifth data point is defined by a fifth set of values for the parameters and a fifth value of the function (Wu: 4/65 ~ 5/18; Izadi: Paragraph(s) 0063, as stated above with respect to claim 15).
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wu (US 11748615 B1) in view of Izadi (WO 2020023483 A1), as applied to claim 15, and in further view of Zhou (US 20190354837 A1).
Regarding Claim 17, the combination of Wu and Izadi teaches all the limitations of claim 15 and hardware accelerator above; however the combination does not explicitly teach wherein the first value of the function is determined by determining the property of the hardware accelerator in a simulation of the hardware accelerator.
Zhou from same or similar field of endeavor teaches wherein the first value for the function is determined by determining the property of the hardware accelerator in a simulation of the hardware accelerator (Zhou: 0045, 0086-0088 teach(es) FIG. 1 shows a high-level depiction of a resource-efficient neural architect (RENA), according to embodiments of the present disclosure. As shown in FIG. 1, in one or more embodiments, a RENA embodiment may comprise two principal networks: a policy network and a value network (or a performance simulation network); a performance simulation network takes a target network embedding and a training dataset in terms of size, distribution, and regularity to generate approximated accuracy and training time).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination of Wu and Izadi to incorporate the teachings of Zhou for wherein the first value for the function is determined by determining the property of the hardware accelerator in a simulation of the hardware accelerator.
There is motivation to combine Zhou into the combination of Wu and Izadi because Zhou’s teachings of performance simulation network would facilitate providing a resource-efficient neural architect (Zhou: Paragraph(s) 0045, 0086-0088).
Response to Arguments
Applicant's arguments filed January 16, 2026 have been fully considered but they are not persuasive.
Regarding applicant’s argument under Claim Rejections - 35 USC § 101 that “the claimed techniques allow for a more efficient neural architecture search that takes into account both the accuracy of the neural network and the costs associated with operating the neural network on a particular hardware system. As a result, the claimed techniques provide a "network architecture that is particularly suitable for carrying out a task" when operated on the particular hardware system. Therefore, the claimed techniques improve the implementation and operation of a given artificial neural network on a desired hardware system,” examiner respectfully argues that the invention is directed to processing of data or information such as a set of values for parameters and a value of function for determining greater gradient of the function, which can be performed mentally by people, especially when the claims do not recite and define any technical details and contexts of neural architecture search, accuracy and costs associated with operating the neural network, particular hardware system, etc. In addition, the claims do not recite and define any technical details and contexts of “network architecture that is particularly suitable for carrying out a task”, “efficient and scalable automated architecture search”, “hardware accelerator”, etc. It is recommended for the applicant to amend the claims further with more technical details and contexts of such additional elements.
Regarding applicant’s argument under Claim Rejections - 35 USC § 103 that “[Wu’s] SGD minimizes the loss function by adjusting the parameters in a direction opposite the calculated gradient. Thus, SGD does not compare gradient values between data points of the loss function, nor does SGD determine a data point of the loss function by selecting a data point that has a greater gradient,” examiner respectfully argues that Wu teaches to train weights for the operators in the stochastic super net based on a loss function representing a latency of the respective operator on a target platform, and to select a set of candidate neural network architectures from the trained stochastic super net, and to train the stochastic super net by traversing the layer-wise search space using gradient-based optimization of network architecture distribution (Wu: Abstract; 1/56 ~ 2/4; 5/37-55; 6/12-30). Gradient-based optimization implies comparing gradient values between data points, as recited in the claims. In addition, the claims do not recite and define any technical details and contexts of parameters, first value of a function, a property of hardware accelerator, task, gradient of the function, etc., enough to differentiate the claim languages from the teachings of the combination of cited references.
Regarding applicant’s further argument that “using an approximate interpolation in the process of conditional layer weight parameterization for a neural network is not equivalent to "determining a third data point of the function using an interpolation between the first data point and the second data point, wherein the third data point is defined by a third set of values for the parameters and a third value of the function," as recited in amended claim 15,” examiner respectfully argues that Izadi teaches interpolation, in which it is obvious that a third data point can be obtained out of first and second data points (Izadi: Paragraph(s) 0063). Therefore, the combination of Wu and Izadi teaches the features. It is recommended for the applicant to amend the claims further with more technical details and contexts of data point, function, parameters, etc.
Regarding applicant’s still further argument that “In Izadi, the similarity is measured between the output of a neural network and a pre-determined training example (or, ground-truth data)-not between data points of the same function. Thus, Izadi does not describe "determining a measure of similarity between the first data point and each of at least two further data points of the function," as recited in amended claim 20,” examiner respectfully argues that Izadi teaches the features (Izadi: Paragraph(s) 0081-0082, 0063). As stated above, it is recommended for the applicant to amend the claims further with more technical details and contexts of data point, function, parameters, etc.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CLAY C LEE/Primary Examiner, Art Unit 3699
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