Office Action Predictor
Application No. 18/002,934

SENSOR DEVICE

Non-Final OA §102§103
Filed
Dec 22, 2022
Examiner
LAWSON, SETH DOUGLAS FRIE
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
3y 8m
To Grant
99%
With Interview

Examiner Intelligence

78%
Career Allow Rate
7 granted / 9 resolved
Without
With
+40.0%
Interview Lift
avg trend
3y 8m
Avg Prosecution
25 pending
34
Total Applications
career history

Statute-Specific Performance

§103
66.9%
+26.9% vs TC avg
§102
24.0%
-16.0% vs TC avg
§112
6.9%
-33.1% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after 16 March 2013, is being examined under the first inventor to file provisions of the AIA . Acknowledgment The Preliminary Amendment filed on 22 December 2022 has been entered. Applicant amended to remove multiple dependencies from claims and cross-reference to the specification. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on 22 December 2022 have been considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 5-6, and 9-10 rejected under 35 U.S.C. 102(a)(1) as being anticipated by Suzuki (EP 3576152 A1) hereinafter Suzuki. Regarding claim 1, Suzuki discloses (figs. 1-10) a sensor device comprising an array of a plurality of pixels in a row direction and a column direction (fig. 1, where 4 pixels are shown in a 2x2 configuration labeled R, G, or B), each of the pixels including a photoelectric conversion element (12 ¶42-43), wherein at least two kinds of pixels (fig. 10, where at least two kinds of pixels are show) are disposed with an inter-pixel isolating structure (11, ¶42) formed with a different pattern in one of the row direction and the column direction (fig. 10, where the pattern of inter-pixel isolating structures are different in the column direction from the row direction). Regarding claim 2, Suzuki discloses the sensor device according to claim 1, wherein the at least two kinds of pixels have different width patterns on an end face of the inter-pixel isolating structure near a light entrance surface (where the inter-pixel separation section can vary in width according to pixel color ¶15, and/or the pattern of the shared pixel ¶19). Regarding claim 5, Suzuki discloses a sensor device comprising an array of a plurality of pixels in a row direction and a column direction (fig. 1, where 4 pixels are shown in a 2x2 configuration labeled R, G, or B), each of the pixels including a photoelectric conversion element (12 ¶42-43), wherein at least two kinds of pixels (fig. 10, where at least two kinds of pixels are show) are disposed with an inter-pixel light-shielding structure (11, ¶42-43) formed with a different pattern in one of the row direction and the column direction (fig. 10, where the pattern of inter-pixel isolating structures are different in the column direction from the row direction). Regarding claim 6, Suzuki discloses the sensor device according to claim 5, wherein the at least two kinds of pixels have different width patterns on an end face of the inter-pixel light-shielding structure near a light entrance surface (where the inter-pixel separation section can vary in width according to pixel color ¶15, and/or the pattern of the shared pixel ¶19). Regarding claim 9, Suzuki discloses the sensor device according to claim 1, wherein the at least two kinds of pixels are disposed with the intra-pixel isolating structure formed with a different pattern in one of the row direction and the column direction (fig. 10, where the pattern of inter-pixel isolating structures are different in the column direction from the row direction). Regarding claim 10, Suzuki discloses the sensor device according to claim 9, wherein the at least two kinds of pixels with the intra-pixel isolating structure formed with different patterns have different width patterns on an end face of the intra-pixel isolating structure near a light entrance surface (where the inter-pixel separation section can vary in width according to pixel color ¶15, and/or the pattern of the shared pixel ¶19). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 11-15 rejected under 35 U.S.C. 103 as being unpatentable over Miyawaki et al. US PGPUB No. 20210385394 (hereinafter Miyawaki). Regarding claim 11, Suzuki discloses the sensor device according to claim 1, further comprising a wiring layer (19) stacked on a semiconductor substrate (10) in which the photoelectric conversion elements (12) are formed (¶44), wherein the at least two kinds of pixels are disposed with polysilicon portions (fig. 7, where the inter-pixel separation section is shown as poly-Si). Suzuki does not explicitly disclose that the polysilicon portions are formed in the wiring layer and located at different positions in the pixels in one of the row direction and the column direction. In the same field of endeavor, Miyawaki discloses (fig. 10) polysilicon portions are formed in the wiring layer and located at different positions in the pixels in one of the row direction and the column direction (where, the peripheral pixel area is smaller than pixels closer to the center, resulting in inter-pixel arrangement of wiring to be different). It would have been obvious to one of ordinary skill in the art at the time of filing to adjust the wiring location based on size and configuration of inter-pixel separations (such as those shown in Suzuki figs. 5-6), improving device performance by aligning wiring and gate interfaces to photoelectric conversion element placement. Regarding claim 12, Suzuki discloses the sensor device according to claim 1, further comprising a wiring layer (19) stacked on a semiconductor substrate (10) in which the photoelectric conversion elements (12) are formed (¶44). Suzuki does not explicitly disclose wherein the at least two kinds of pixels are disposed with intra-pixel wirings that are formed in the wiring layer and located at different positions in the pixels in one of the row direction and the column direction. In the same field of endeavor, Miyawaki discloses (fig. 10), wherein the at least two kinds of pixels are disposed with intra-pixel wirings that are formed in the wiring layer and located at different positions in the pixels in one of the row direction and the column direction (where, the peripheral pixel area is smaller than pixels closer to the center, resulting in inter-pixel arrangement of wiring to be different). It would have been obvious to one of ordinary skill in the art at the time of filing to adjust the wiring location based on size and configuration of inter-pixel separations (such as those shown in Suzuki figs. 5-6), improving device performance by aligning wiring and gate interfaces to photoelectric conversion element placement. Regarding claim 13, Suzuki discloses the sensor device according to claim 1. Suzuki does not disclose further comprising inter-pixel wirings formed to extend in one of the column direction and the row direction and cross the plurality of pixels disposed in the one direction, the inter-pixel wirings being disposed for each of the pixels in the other direction of the column direction and the row direction, wherein the at least two kinds of pixels are disposed with the inter-pixel wirings formed with different patterns in the other direction. In the same field of endeavor, Miyawaki discloses (figs. 5 and 7) further comprising inter-pixel wirings (21 and 22, ¶47, 42-51) formed to extend in one of the column direction and the row direction and cross the plurality of pixels disposed in the one direction, the inter-pixel wirings being disposed for each of the pixels in the other direction of the column direction and the row direction, wherein the at least two kinds of pixels are disposed with the inter-pixel wirings formed with different patterns in the other direction (figs. 5 and 7, where the inter-pixel wirings have different patterns and from one another in different directions). It would have been obvious to one of ordinary skill in the art at the time of filing for the inter-pixel wiring pattern to be different in each direction in order to properly interface with each pixel, improving device performance by aligning wiring and gate interfaces to photoelectric conversion element placement. Regarding claim 14, Suzuki in view of Miyawaki discloses the sensor device according to claim 13, wherein the at least two kinds of pixels have the inter-pixel wirings formed with different patterns such that the patterns of the inter-pixel wirings (21 and 22 Miyawaki ¶47, 60-69) vary in width or interval (Miyawaki figs. 5 and 7, where the patterns of inter-pixel wirings vary in width or interval). Regarding claim 15, Suzuki discloses the sensor device according to claim 1. Suzuki does not explicitly disclose wherein the at least two kinds of pixels are disposed with different orientations in a pixel array plane in one of the row direction and the column direction. In the same field of endeavor, Miyawaki discloses (figs. 1-10) wherein the at least two kinds of pixels (R, G, or B Miyawaki ¶100) are disposed with different orientations in a pixel array plane in one of the row direction and the column direction (fig. 10, where pixels are shown with different orientations in the pixel array plane). It would have been obvious to one of ordinary skill in the art at the time of filing for pixels to be arranged with different orientations as disclosed by Miyawaki, improving device performance by minimizing empty space within the pixel array facing incoming light signals. Allowable Subject Matter Claims 3-4 and 7-8 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Lee, S. et al. US PGPUB No. 20160099267 discloses (fig. 8) width patterns on an end face of the isolating structure near, but does not disclose the end face of these patterns to have the same area. Kim et al. US PGPUB No. 20200381473 also discloses isolation structures with different patterns (protrusions), but does not disclose the end face of these patterns to have the same area. Lee, C. US PGPUB No. 20180130834 discloses (fig. 3A) isolation structure patterns apparently of the same area (but not explicitly disclosed) on the end face near the light entrance surface, but the variation in width is shown on the end opposite of light entrance. Regarding claim 3, none of the prior art of record discloses, alone or in combination, “wherein the end face of the inter-pixel isolating structure has an equal area in the at least two kinds of pixels” while also “different width patterns on an end face of the inter-pixel isolating structure near a light entrance surface” (inherited from claim 2). Claim 4 depends upon claim 3. Regarding claim 7, none of the prior art of record discloses, alone or in combination, “wherein the end face of the inter-pixel light-shielding structure has an equal area in the at least two kinds of pixels” while also “different width patterns on an end face of the inter-pixel light-shielding structure near a light entrance surface” (inherited from claim 6). Claim 8 depends upon claim 7. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Seth Lawson whose telephone number is (703)756-5675. The examiner can normally be reached M-F 8-5 PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Seth D Lawson/Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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Prosecution Timeline

Dec 22, 2022
Application Filed
Aug 05, 2025
Non-Final Rejection — §102, §103
Apr 13, 2026
Response after Non-Final Action

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+40.0%)
3y 8m
Median Time to Grant
Low
PTA Risk
Based on 9 resolved cases by this examiner