DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Amendments
This Office Action is in response to the amendment filed on 06/09/2026.
Claims 26, 33, 38, 40, 42, and 44 have been amended.
No claim has been cancelled.
No new claims have been added.
The objections and rejections from the prior correspondence that are not restated herein are withdrawn.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 06/09/2026 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Response to Arguments
Applicant's arguments filed on 06/09/2026 have been fully considered.
Applicant's arguments regarding the 35 U.S.C. 101 rejections of the previous office action have been fully considered but are not persuasive. Applicant argues: “Applicant submits that the analysis provided in the Office Action fails to consider the claims as a whole, as suggested in the August 4, 2025 Memorandum. Specifically, the analysis on pages 6-10 of the Office Action points to several limitations and fails to evaluate these limitations as a whole or in combination with the alleged abstract idea.
Each of these limitations are rejected with a conclusory statement as to why they do not amount to significantly more than the abstract idea, and without proper analysis of the detailed subject matter of these limitations, or due consideration for how these limitations may be combined with each other and/or the alleged abstract idea to provide significantly more than the abstract idea.
The claimed subject-matter including decoding and encoding using two tensors may be enhanced by utilizing or signaling a dimension of a tensor and a decomposition rank of a tensor. For example, a size of a tensor may be used to encode or decode which may result in more efficient encoding and decoding since the dimension of each tensor is known. Additionally, a decomposition rank of a tensor may be used to encode or decode which may result in more efficient encoding and decoding since the decomposition rank of each tensor is known.”
Examiner respectfully disagrees. The examiner performed Step 1, Step 2A Prong 1, Step 2A Prong 2, and Step 2B for every claim, and these four steps evaluate the claim as a whole in view of the abstract idea. Applicant also states that the limitations are rejected with conclusory statements, but applicant does not explain how any of the limitations amount to significantly more than the abstract idea. Independent claim 26, for example, recites the mathematical concepts of decoding parameters in a data unit header from a bitstream and decoding the second tensor and the third tensor based on the one or more decoded sizes and based on the one or more decomposition ranks to obtain the decoded second tensor and a decoded third tensor. According to MPEP § 2106.05(a), the judicial exception alone cannot provide the improvement, and the improvement must be provided by one or more additional elements. Therefore, knowing the size of a tensor for a more efficient encoding and decoding would be an improvement in the abstract idea of encoding and decoding. The additional limitations recite a condition for executing the decoding step and a description of the parameters in the bitstream. These are considered instructions to apply the judicial exception using generic computer components as tools, and do not integrate the abstract idea into a practical application, and do not amount to significantly more than the abstract idea itself.
Applicant's arguments regarding the 35 U.S.C. 103 rejections of the previous office action have been fully considered but are not persuasive. Applicant argues: “The Office Action relies on Minezawa for the claimed parameters encoded in a bitstream, stating that ‘parameters of the compressed recurrent parameter matrix (i.e., second tensor) and projection matrix (i.e., third tensor) correspond to the neural network configuration information encoded in the compressed data’ (emphasis in original) (see Office Action at pp. 16 and 17). However, there is no indication in Minezawa that the parameters are in a data unit header, the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor and the parameters comprising one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor as claimed (emphasis added).”
Examiner respectfully disagrees. It should be noted that MINEZAWA is not relied upon for teaching the parameters in a data unit header. However, CRICI [0061], [0062], [0175] teaches NNR compressed data unit’s header that may specify the dimensions of the tensor, as shown in the 35 U.S.C. 103 rejections below.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 26, 28-38, 40-42, and 44-45 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claims 26, 28-32, 38, and 40-41 are directed to a process. Claims 33-37, 42, and 44-45 are directed to a machine or an article of manufacture.
With respect to claim(s) 26 and 33:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
decoding parameters in a data unit header from a bitstream, (Mathematical concepts – Decoding involves mathematical calculations (see [page 33, lines 33-36] of the specification) – see MPEP § 2106.04(a)(2)(I))
decoding the second tensor and the third tensor based on the one or more decoded sizes and based on the one or more decomposition ranks to obtain the decoded second tensor and a decoded third tensor. (Mathematical concepts – Decoding involves mathematical calculations (see [page 33, lines 33-36] of the specification) – see MPEP § 2106.04(a)(2)(I))
If claim limitations, under their broadest reasonable interpretation, cover performance of the limitations as a mental process, but for the recitation of generic computer components, then the claim limitations fall within the mathematical or mental process grouping of abstract ideas. Accordingly, the claim “recites” an abstract idea.
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 33) An apparatus comprising one or more processors, the one or more processors configured to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
responsive to a determination that a first tensor of a Deep Neural Network is decomposed into a second tensor and a third tensor […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor and the parameters comprising one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Since the claim as a whole, looking at the additional elements individually and in combination, does not contain any other additional elements that are indicative of integration into a practical application, the claim is directed to an abstract idea.
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 33) An apparatus comprising one or more processors, the one or more processors configured to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
responsive to a determination that a first tensor of a Deep Neural Network is decomposed into a second tensor and a third tensor […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor and the parameters comprising one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Considering the additional elements individually and in combination, and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. Therefore, the claim is not patent eligible.
With respect to claim(s) 28 and 24:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
deriving one or more sizes of one or more of the second tensor or the third tensor based on the one or more decoded sizes (Mathematical concepts – Deriving tensor sizes involves mathematical calculations (see [page 6, lines 5-7] of the specification) – see MPEP § 2106.04(a)(2)(I))
decoding one or more of the second tensor and the third tensor based on the one or more derived sizes (Mathematical concepts – Decoding involves mathematical calculations (see [page 33, lines 33-36] of the specification) – see MPEP § 2106.04(a)(2)(I))
Additionally, the claim(s) do not recite any new additional elements that would amount to an integration of the abstract idea into a practical application (individually or in combination) or significantly more than the judicial exception.
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 29 and 35:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
reconstructing the first tensor based on the decoded second tensor and the decoded third tensor. (Mathematical concepts – Reconstructing the first tensor involves mathematical calculations (see [page 7, lines 3-8] and [page 13, Table 1] of the specification) – see MPEP § 2106.04(a)(2)(I))
Additionally, the claim(s) do not recite any new additional elements that would amount to an integration of the abstract idea into a practical application (individually or in combination) or significantly more than the judicial exception.
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 30, 40, and 44:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
storing one or more of the decoded second tensor and the decoded third tensor in a decoded tensor buffer. (Mere data gathering – Adding insignificant extra-solution activity of mere data gathering to the judicial exception – see MPEP § 2106.05(g).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
storing one or more of the decoded second tensor and the decoded third tensor in a decoded tensor buffer. (Simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception (WURC) - see MPEP § 2106.05(d)(ll)(iv) - Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 31:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
determining if one or more of the decoded second tensor and the decoded third tensor is in the decoded tensor buffer by looking for a tensor associated with an identifier (Mental process – A person can mentally determine if decoded tensors are in a decoded tensor buffer by looking for an identifier – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
the identifier comprising a same layer as the one or more of the decoded second tensor and the decoded third tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
the identifier comprising a same layer as the one or more of the decoded second tensor and the decoded third tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 32 and 37:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
wherein the bitstream includes additional parameters associated with the first tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
wherein the bitstream includes additional parameters associated with the first tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 36:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
determine if one or more of the decoded second tensor and the decoded third tensor is in the decoded tensor buffer by looking for a tensor associated with an identifier (Mental process – A person can mentally determine if decoded tensors are in a decoded tensor buffer by looking for an identifier – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
store one or more of the decoded second tensor and the decoded third tensor in a decoded tensor buffer. (Mere data gathering – Adding insignificant extra-solution activity of mere data gathering to the judicial exception – see MPEP § 2106.05(g).)
the identifier comprising a same layer as the one or more of the decoded second tensor and the decoded third tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
store one or more of the decoded second tensor and the decoded third tensor in a decoded tensor buffer. (Simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception (WURC) - see MPEP § 2106.05(d)(ll)(iv) - Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.)
the identifier comprising a same layer as the one or more of the decoded second tensor and the decoded third tensor. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
With respect to claim(s) 38 and 42:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
decomposing a first tensor of a Deep Neural Network into a second tensor and a third tensor; (Mathematical concepts – Decomposing a tensor into tensors involves mathematical calculations – see MPEP § 2106.04(a)(2)(I))
deriving one or more sizes corresponding to at least one or more of the second tensor and the third tensor; (Mathematical concepts – Deriving sizes corresponding to tensors involves mathematical calculations – see MPEP § 2106.04(a)(2)(I))
deriving one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; (Mathematical concepts – Deriving decomposition ranks is performed using mean squared error (MSE) thresholds (see page 22, lines 1-19) – see MPEP § 2106.04(a)(2)(I))
encoding the second tensor and the third tensor and parameters of the second tensor and the third tensor in a bitstream, (Mathematical concepts – Encoding tensors in a bitstream involve mathematical calculations – see MPEP § 2106.04(a)(2)(I))
If claim limitations, under their broadest reasonable interpretation, cover performance of the limitations as a mental process, but for the recitation of generic computer components, then the claim limitations fall within the mathematical or mental process grouping of abstract ideas. Accordingly, the claim “recites” an abstract idea.
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 42) An apparatus comprising one or more processors, the one or more processors configured to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
the parameters comprising the one or more sizes and the parameters comprising the one or more decomposition ranks, wherein the one or more sizes corresponding to at least one or more of the second tensor and the third tensor are encoded in the bitstream, and wherein the parameters of the second tensor and the third tensor are encoded in a data unit header. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Since the claim as a whole, looking at the additional elements individually and in combination, does not contain any other additional elements that are indicative of integration into a practical application, the claim is directed to an abstract idea.
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 42) An apparatus comprising one or more processors, the one or more processors configured to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
the parameters comprising the one or more sizes and the parameters comprising the one or more decomposition ranks, wherein the one or more sizes corresponding to at least one or more of the second tensor and the third tensor are encoded in the bitstream, and wherein the parameters of the second tensor and the third tensor are encoded in a data unit header. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP § 2106.05(f).)
Considering the additional elements individually and in combination, and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. Therefore, the claim is not patent eligible.
With respect to claim(s) 41 and 45:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
transmitting/transmit the bitstream to a decoder. (Adding insignificant extra-solution activity to the judicial exception – see MPEP § 2106.05(g).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
transmitting/transmit the bitstream to a decoder. (Simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception (WURC) - see MPEP § 2106.05(d)(ll)(i) - Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 26, 29-33, and 35-37 are rejected under 35 U.S.C. 103 as being unpatentable over SAINATH (US 20170076196 A1) in view of MINEZAWA (US 20200184318 A1) and CRICI (US 20230209092 A1), hereafter SAINATH, MINEZAWA, and CRICI respectively.
Regarding Claim 26:
SAINATH teaches:
[…] a first tensor of a Deep Neural Network is decomposed into a second tensor and a third tensor […] the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor […] (SAINATH [0026] and [0037] teaches an uncompressed recurrent parameter matrix m*n (i.e., a first tensor) of a deep LSTM layer (i.e., of a Deep Neural Network) being compressed by replacing (i.e., decomposed) the uncompressed recurrent parameter matrix with a compressed recurrent parameter matrix m*r (i.e., second tensor) and a projection matrix r*n (i.e., third tensor). Further, the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor can be interpreted as the dimensions m*r and r*n from the parameter matrix and projection matrix respectively.)
SAINATH is not relied upon for teaching:
responsive to a determination that a […] tensor […] is decomposed […], decoding parameters in a data unit header from a bitstream, […]
[…] the parameters comprising one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; and
decoding the second tensor and the third tensor based on the one or more decoded sizes and based on the one or more decomposition ranks to obtain the decoded second tensor and a decoded third tensor.
However, MINEZAWA teaches: responsive to a determination that a […] tensor […] is decomposed […], decoding parameters […] from a bitstream, […] (MINEZAWA [0040] teaches: “The network configuration information (i.e., parameters) is information indicating a configuration of the neural network, and includes, for example, the number of network layers, the number of nodes for each of the layers, edges that link nodes, weight information assigned to each of the edges, activation functions representing outputs from the nodes, and type information for each of the layers (e.g., a convolutional layer, a pooling layer, or a fully-connected layer).” MINEZAWA [0049] teaches: “The encoding unit 103 encodes the network configuration information including the parameter data quantized by the data processing unit 101 and the quantization information generated by the compression controlling unit 102, to generate compressed data.” MINEZAWA [0050] teaches: “Note that the network configuration information inputted to the encoding unit 103 from the data processing unit 101 is network configuration information including the parameter data which is quantized by the data processing unit 101 using the quantization steps determined by the compression controlling unit 102.” MINEZAWA [0053] teaches: “The decoding unit 201 decodes quantization information and network configuration information from the compressed data (i.e., decoding parameters […] from a bitstream) encoded by the encoding unit 103 as described above.” Examiner’s note: MINEZAWA [FIG. 2] teaches decoding unit 201 receiving compressed data. Under BRI, responsive to a determination that a […] tensor […] is decomposed […] can be interpreted as the decoding unit receiving previously compressed data to be decoded.)
decoding the second tensor and the third tensor based on the one or more decoded sizes […] to obtain the decoded second tensor and a decoded third tensor. (MINEZAWA [0040] teaches that some of the information included in the neural network configuration information is the number of network layers, the number of nodes for each of the layers (i.e., one or more decoded sizes), edges that link nodes, weight information assigned to each of the edges, activation functions representing outputs from the nodes, and type information for each of the layers (e.g., a convolutional layer, a pooling layer, or a fully-connected layer). MINEZAWA [0050] teaches encoding quantization information and neural network configuration information to generate compressed data. MINEZAWA [0053], [0095], and [0172-0175] teaches inversely quantizing (i.e., to obtain the decoded second tensor and a decoded third tensor) the quantization information and neural network configuration information to construct the neural network on the decoding side using the decoded network configuration information (i.e., decoding the second tensor and the third tensor based on the one or more decoded sizes).)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH and MINEZAWA before them, to include MINEZAWA's neural network configuration information encoding and compressed data decoding into SAINATH's neural network compression method. One would have been motivated to make such a combination in order to optimize a neural network on the encoding side for construction on the decoding side (MINEZAWA [0015]).
SAINATH in view of MINEZAWA is not relied upon for teaching, but CRICI teaches: […] parameters in a data unit header […] (CRICI [0061] teaches: “A draft of the NNR Standard specification (may also be referred to as the draft) has been prepared during the MPEG NNR meetings. The HLS included in the draft comprises a basic structure for the organization of the bitstream. According to this structure, the NNR bitstream is splitted into elemental units termed NNR Units. The NNR Unit represents a basic high-level syntax structure, and contains three syntax elements: NNR Unit Size, NNR Unit Header, NNR Unit Payload. A bitstream is formed by concatenating several NNR Units. NNR Units may contain different types of data. The type of data that is contained in the payload of an NNR Unit defines the NNR Unit’s type. This type maybe further indicated in the NNR Unit Header. The following table specifies the NNR unit header types and their identifiers.” CRICI [0062] teaches: “However, no detailed structure was decided regarding the content and bitstream syntax of each of these NNR Units. The examples described herein, propose bitstream syntax definitions for some of these NNR Units in order to achieve, for example, interoperability between a sender and receiver of such information.”)
the parameters comprising one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; and (CRICI [0109-0110] teaches performing "Matrix Decomposition" as a step in a compression pipeline. CRICI [0123] teaches that "decoding_step_id" identifies the decoding process or step to be performed. CRICI [0175] teaches: "Tensor Dimensions. tensor_dimensions may be a field of the Layer Parameter Set and may specify the dimensions of the tensor to which the layer parameter set refers. In another embodiment, tensor_dimensions may be a field of the NNR compressed data unit’s header and may specify the dimensions of the tensor (i.e., one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor) carried in the payload of the same NNR compressed data unit." CRICI [0061] teaches: "A bitstream is formed by concatenating several NNR Units. NNR Units may contain different types of data. The type of data that is contained in the payload of an NNR Unit defines the NNR Unit’s type." CRICI [0109-0110] and [0175-0176] teaches the pipeline that applies quantization and entropy coding to the decomposed tensor dimensions carried in the payload in a bitstream.)
decoding the second tensor and the third tensor […] and based on the one or more decomposition ranks to obtain the decoded second tensor and a decoded third tensor. (CRICI [0057] teaches: “The decoder 505 uses a decoder or decompression algorithm, for example, to perform the neural network decoding 506 to decode the compressed data 509 (for example, compressed video) which was encoded by the encoder 503. The decoder 505 produces decompressed data 510 (for example, reconstructed data) (i.e., the second tensor and the third tensor).” CRICI [0174] teaches: “data_size may indicate the number of parameters or weights belong to this id when the compressed N data unit is uncompressed. In another embodiment, this value may indicate the byte size which corresponds to such parameters or weights.” CRICI [0175] teaches: “Extension 9: Tensor Dimensions. tensor_dimensions may be a field of the Layer Parameter Set and may specify the dimensions of the tensor to which the layer parameter set refers.” CRICI [0192] teaches: “In an embodiment, ONNX message identifier types may be signalled in the corresponding NNR unit headers so that corresponding NNR unit payloads could be parsed and processed correctly.” CRICI [0061] teaches: “A bitstream is formed by concatenating several NNR Units.” Examiner’s note: NNR stands for Neural Network Representation (see CRICI [0024]). Under broadest reasonable interpretation, the one or more decomposition ranks can be interpreted as the tensor dimensions field for the several NNR units in the compressed data unit’s header. Additionally, the second tensor and the third tensor can be interpreted as the reconstructed data from several NNR units. Therefore, decoding the compressed data, which includes the tensor dimensions, teaches decoding […] based on the one or more decomposition ranks to obtain the decoded second tensor and a decoded third tensor.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH, MINEZAWA, and CRICI before them, to include CRICI’s payload decoding tensor dimensions in SAINATH and MINEZAWA's neural network compression method. One would have been motivated to make such a combination in order to address many missing aspects of an interoperable information exchange mechanism, carriage of configuration and parameters related to the exchanged data of compressed neural networks (CRICI [0086]).
Regarding Claim 29:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 26 as outlined above. MINEZAWA further teaches:
further comprising reconstructing the first tensor based on the decoded second tensor and the decoded third tensor. (MINEZAWA [0015] teaches constructing (i.e., reconstructing) a neural network (i.e., the first tensor) on the decoding side based on the quantization information and network configuration information decoded from the compressed data.)
Regarding Claim 30:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 26 as outlined above. MINEZAWA further teaches:
storing one or more of the decoded second tensor and the decoded third tensor in a decoded tensor buffer. (MINEZAWA [0059], [0079], [0082], [0093-0096], and [0119] teaches decoding from the compressed data and outputting the decoding results from the decoding unit 201 to the data processing unit 202. The processor 301 implements the functions of the decoding unit 201 and data processing unit 202, and constructs the neural network using the decoded data. Additionally, Fig. 3B shows the processor 301 and the memory 302 connected to each other by a signal bus, which transmits the data. A person having ordinary skill in the art would recognize that while neural network construction occurs, the decoded data required for the neural network construction must be stored in memory (i.e., decoded tensor buffer), because constructing the neural network requires a large memory size as disclosed in MINEZAWA.)
Regarding Claim 31:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 30 as outlined above. CRICI further teaches:
determining if one or more of the decoded second tensor and the decoded third tensor is in the decoded tensor buffer by looking for a tensor associated with an identifier, the identifier comprising a same layer as the one or more of the decoded second tensor and the decoded third tensor. (CRICI [0160], [0166-0167], and [0171]-[0186] teaches identifying a compressed NN data unit, such as a tensor, in the same layer by providing an id_name unique identifier (i.e., associated with an identifier) in the Layer Parameter Set's lps_id_list. It uses context_mode and context_id to select previously decoded symbols as the context for decoding, which tells the decoder whether the current tensor being processed has already been decoded. The decoded second and third tensors in the tensor buffer are taught by MINEZAWA [0059], [0079], [0082], [0093-0096], and [0119] as outlined in claim 30 above.)
Regarding Claim 32:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 26 as outlined above. MINEZAWA further teaches:
The method of claim 26, wherein the bitstream includes additional parameters associated with the first tensor. (MINEZAWA [0015] teaches additional parameters associated with the first tensor as the quantization information, which is encoded along with the network configuration in the compressed data (i.e., bitstream). The first tensor is taught by SAINATH [0026] and [0037] as outlined above in claim 26.)
Regarding Claim 33:
The claim recites similar limitations as corresponding claim 26 and is rejected for similar reasons as claim 26 using similar teachings and rationale. Additionally, MINEZAWA teaches:
An apparatus comprising one or more processors, the one or more processors configured to: (MINEZAWA [0067] teaches: “The processor 301 implements the functions of the data processing unit 101, the compression controlling unit 102, and the encoding unit 103, by reading and executing the programs stored in the memory 302. Namely, the data processing device 100 includes the memory 302 for storing programs that when executed by the processor 301, cause the processes at step ST1 to ST3 shown in FIG. 4 to be consequently performed.”)
Regarding Claim 35:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 33 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 29 and is rejected for similar reasons as claim 29 using similar teachings and rationale.
Regarding Claim 36:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 33 as outlined above. Additionally, the claim recites similar limitations as corresponding claims 30 and 31 and is rejected for similar reasons as claims 30 and 31 using similar teachings and rationale.
Regarding Claim 37:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 33 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 32 and is rejected for similar reasons as claim 32 using similar teachings and rationale.
Claims 28 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over SAINATH in view of MINEZAWA and CRICI as applied to claims 26 and 33 respectively above, and further in view of CHOE (KR 20200064348 A), hereafter CHOE.
Regarding Claim 28:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 26 as outlined above. MINEZAWA further teaches:
[…] one or more decoded sizes; (MINEZAWA [0040] and [0053] teaches decoding neural network configuration information from the compressed data as outlined in claim 26 above.)
decoding one or more of the second tensor and the third tensor based on the one or more […] sizes. (MINEZAWA [0053], [0095], and [0172-0175] teaches decoding compressed data and inversely quantizing the quantization information and neural network configuration information to construct the neural network on the decoding side.)
SAINATH in view of MINEZAWA and CRICI is not relied upon for teaching but CHOE teaches: deriving one or more sizes of one or more of the second tensor or the third tensor […] (CHOE [33], [40], and equation (6) teaches calculating (i.e., deriving) a tensor rank by using the tensor width, tensor height (i.e., one or more sizes), and number of dimensions of the input tensor (i.e., one or more […] tensor). A person having ordinary skill in the art could apply the rank calculation from CHOE to the decomposed tensors of the combination of SAINATH, MINEZAWA, and CRICI.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH, MINEZAWA, CRICI, and CHOE before them, to include CHOE's rank calculation in SAINATH, MINEZAWA, and CRICI’s neural network information compression method. One would have been motivated to make such a combination because by applying the first rank and the second rank determined through the lower limit, it is possible to minimize the time required in the compression process while providing the same compression rate (CHOE [43]).
Regarding Claim 34:
SAINATH in view of MINEZAWA and CRICI teaches the elements of claim 33 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 28 and is rejected for similar reasons as claim 28 using similar teachings and rationale.
Claims 38, 40-42, and 44-45 are rejected under 35 U.S.C. 103 as being unpatentable over SAINATH in view of CHOE, MINEZAWA, and CRICI.
Regarding Claim 38:
SAINATH teaches:
decomposing a first tensor of a Deep Neural Network into a second tensor and a third tensor; (SAINATH [0026] and [0037] teaches an uncompressed recurrent parameter matrix m*n (i.e., a first tensor) of a deep LSTM layer (i.e., of a Deep Neural Network) being compressed by replacing (i.e., decomposing) the uncompressed recurrent parameter matrix with a compressed recurrent parameter matrix m*r (i.e., second tensor) and a projection matrix r*n (i.e., third tensor).)
[…] the second tensor and the third tensor and parameters of the second tensor and the third tensor […] the parameters comprising the one or more sizes […] (SAINATH [0026] and [0037] teaches an uncompressed recurrent parameter matrix m*n of a deep LSTM layer being compressed by replacing the uncompressed recurrent parameter matrix with a compressed recurrent parameter matrix m*r (i.e., second tensor) and a projection matrix r*n (i.e., third tensor). Further, the parameters comprising one or more sizes corresponding to at least one or more of the second tensor and the third tensor can be interpreted as the dimensions m*r and r*n from the parameter matrix and projection matrix respectively.)
SAINATH is not relied upon for teaching:
deriving one or more sizes corresponding to at least one or more of the second tensor and the third tensor; and
deriving one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor;
encoding […] in a bitstream, […] the parameters comprising the one or more decomposition ranks,
wherein the one or more sizes corresponding to at least one or more of the second tensor and the third tensor are encoded in the bitstream, and
wherein the parameters of the second tensor and the third tensor are encoded in a data unit header.
However, CHOE teaches: deriving one or more sizes corresponding to at least one or more of the second tensor and the third tensor; (CHOE [33], [40], and equation (6) teaches calculating (i.e., deriving) a tensor rank by using the tensor width, tensor height (i.e., one or more sizes), and number of dimensions of the input tensor.)
deriving one or more decomposition ranks corresponding to at least one or more of the second tensor and the third tensor; (CHOE [33], [40], and equation (6) teaches calculating a tensor rank (i.e., deriving one or more decomposition ranks) by using the tensor width, tensor height, and number of dimensions of the input tensor.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH and CHOE before them, to include CHOE's rank calculation in SAINATH’s neural network information compression method. One would have been motivated to make such a combination because by applying the first rank and the second rank determined through the lower limit, it is possible to minimize the time required in the compression process while providing the same compression rate (CHOE [43]).
SAINATH in view of CHOE is not relied upon for teaching:
encoding […] in a bitstream, […] the parameters comprising the one or more decomposition ranks,
wherein the one or more sizes corresponding to at least one or more of the second tensor and the third tensor are encoded in the bitstream, and
wherein the parameters of the second tensor and the third tensor are encoded in a data unit header.
However, MINEZAWA teaches: wherein the one or more sizes corresponding to at least one or more of the second tensor and the third tensor are encoded in the bitstream, (MINEZAWA [0049] teaches encoding the network configuration information to generate compressed data (i.e., bitstream). SAINATH teaches decomposing the neural network layer matrix m*n (i.e., a first tensor) into m*r (i.e., second tensor) and r*n (i.e., third tensor), which correspond to the sizes of each matrix respectively. Therefore, the combination of SAINATH and MINEZAWA teaches encoding of neural network configuration information to generate compressed data.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH, CHOE, and MINEZAWA before them, to include MINEZAWA's neural network configuration information encoding into SAINATH and CHOE’s neural network compression method. One would have been motivated to make such a combination in order to optimize a neural network on the encoding side for construction on the decoding side (MINEZAWA [0015]).
SAINATH in view of CHOE and MINEZAWA is not relied upon for teaching, but CRICI teaches: encoding […] in a bitstream, […] the parameters comprising the one or more decomposition ranks, […] wherein the parameters of the second tensor and the third tensor are encoded in a data unit header. (CRICI [0056] teaches: “The encoder 503 has the goal of compressing input data 507 (for example, an input video) to compressed data 509 (for example, a bitstream) (i.e., encoding […] in a bitstream) […].” CRICI [0175] teaches: “In another embodiment, tensor dimensions may be a field of the NNR compressed data unit’s header (i.e., wherein the parameters of the second tensor and the third tensor are encoded in a data unit header) and may specify the dimensions of the tensor (i.e., the parameters comprising the one or more decomposition ranks) carried in the payload of the same NNR compressed data unit.” CRICI [0061] teaches: “A bitstream is formed by concatenating several NNR Units.” Examiner’s note: A rank and size are tensor dimensions.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of SAINATH, CHOE, MINEZAWA, and CRICI before them, to include CRICI’s payload encoding tensor dimensions in SAINATH, CHOE, and MINEZAWA's neural network compression method. One would have been motivated to make such a combination in order to address many missing aspects of an interoperable information exchange mechanism, carriage of configuration and parameters related to the exchanged data of compressed neural networks (CRICI [0086]).
Regarding Claim 40:
SAINATH in view of CHOE, MINEZAWA, and CRICI teaches the elements of claim 38 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 30 and is rejected for similar reasons as claim 30 using similar teachings and rationale.
Regarding Claim 41:
SAINATH in view of CHOE, MINEZAWA, and CRICI teaches the elements of claim 38 as outlined above. MINEZAWA further teaches:
transmitting the bitstream to a decoder (MINEZAWA [Fig. 1] and [Fig. 2] teaches the data processing device 100 that includes an encoding unit 103 that sends (i.e., transmitting) the compressed data (i.e., a bitstream) to the decoding unit 201 (i.e., to a decoder).)
Regarding Claim 42:
The claim recites similar limitations as corresponding claim 38 and is rejected for similar reasons as claim 38 using similar teachings and rationale. Additionally, MINEZAWA teaches:
An apparatus comprising one or more processors, the one or more processors configured to: (MINEZAWA [0067] teaches: “The processor 301 implements the functions of the data processing unit 101, the compression controlling unit 102, and the encoding unit 103, by reading and executing the programs stored in the memory 302. Namely, the data processing device 100 includes the memory 302 for storing programs that when executed by the processor 301, cause the processes at step ST1 to ST3 shown in FIG. 4 to be consequently performed.”)
Regarding Claim 44:
SAINATH in view of CHOE, MINEZAWA, and CRICI teaches the elements of claim 42 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 30 and is rejected for similar reasons as claim 30 using similar teachings and rationale.
Regarding Claim 45:
SAINATH in view of CHOE, MINEZAWA, and CRICI teaches the elements of claim 42 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 41 and is rejected for similar reasons as claim 41 using similar teachings and rationale.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alvaro S Laham Bauzo whose telephone number is (571) 272-5650. The examiner can normally be reached Mon-Fri 7:30 AM - 11:00 AM | 1:00 PM - 5:30 PM ET.
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/A.S.L./Examiner, Art Unit 2146
/USMAAN SAEED/Supervisory Patent Examiner, Art Unit 2146
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