Prosecution Insights
Last updated: May 29, 2026
Application No. 18/012,823

SUBSTRATE FOR MANUFACTURING DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY APPARATUS USING SAME

Non-Final OA §103
Filed
Dec 23, 2022
Priority
Jun 26, 2020 — nonprovisional of PCTKR2020008316
Examiner
LEE, NATHANIEL J.
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Electronics Inc.
OA Round
3 (Non-Final)
63%
Grant Probability
Moderate
3-4
OA Rounds
0m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 63% of resolved cases
63%
Career Allowance Rate
516 granted / 816 resolved
-4.8% vs TC avg
Strong +22% interview lift
Without
With
+22.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
857
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
88.9%
+48.9% vs TC avg
§102
5.6%
-34.4% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 816 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 17 March 2026 has been entered. Response to Amendment The amendment filed on 17 March 2026 has been entered. Response to Arguments Applicant's arguments filed 17 March 2026 have been fully considered but they are not persuasive. Applicant argues that while Martin discloses general dielectrophoresis principles and generating a repulsive force between the nanowires themselves, Martin completely fails to teach or suggest inducing N- DEP characteristics to create a repulsive force relative to the pair electrodes. The examiner disagrees. None of the claims require inducing N- DEP characteristics to create a repulsive force relative to the pair electrodes. By applicant’s own admission Martin discloses general dielectrophoresis principles and generating a repulsive force between the nanowires themselves, thus meeting the requirement of inducing N- DEP characteristics; in this case generating repulsive dialectrophoresis between nanowires. Additionally, Martin states that in when the particular frequencies of an associated phase is used, the nanowires exhibit P-DEP with respect to the electrodes (paragraph 121), while the different frequencies used in the alignment phase cause these same nanowires to migrate (paragraph 122) and, if unsuited to the electrode, leave the electrode entirely (paragraph 222; “NWs not matched to the electrode geometry (e.g., short NWs), curly NWs, crossed NWs or branched NWs are observed to be released from the electrodes during the "NW release" process step 1412”). Applicant argues that Martin fails to teach or suggest applying voltages having different frequencies to respective pair electrodes. The examiner disagrees. Martin applies different frequencies to electrode pairs 1802, 1808, in Fig. 18, and thereby generates a dielectrophoretic force in the direction indicated by the block arrows in Fig. 18 (paragraph 193). Note that one of the block arrows indicating the dielectrophoresis force is approaching the electrodes (P-DEP) and the other is going away (N-DEP). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-4, 6-7, 9-10, 13-18 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/0203321 A1) in view of Teraguchi et al. (US 2017/0338372 A1), and Martin et al. (US 2011/0284380 A1).. With respect to claim 1: Choi teaches “a substrate (261) for manufacturing a display apparatus (100) having an electric field gradient (generated by electrodes 261c), the substrate comprising: a base portion (261a); pair electrodes (261c (311, 312)) extending in one direction (see Figs. 10-14) disposed on the base portion (see Figs. 6-9) and forming a pair with each other (see Figs. 10-14); a dielectric layer (261b) disposed on the base portion to cover the pair electrodes (see Fig. 9a); a partition wall portion (261e) disposed on the dielectric layer (see Figs. 9a); and cells (261d) defined by the partition wall portion (see Fig. 6), and arranged to overlap the pair electrodes along the one direction of the pair electrodes (see Fig. 6), wherein the substrate further comprises: an electrode pad configured to apply a voltage to the pair electrodes (341, 342), wherein the electrode pad comprises: a first electrode pad (341) connected to either one electrode of the pair electrodes to apply a first signal thereto (see Fig. 13); and a second electrode pad (342) connected to the other electrode of the pair electrodes to apply a second signal thereto (see Fig. 13)”. Choi does not specifically teach “pair electrodes arranged at different intervals”. However, Teraguchi teaches “pair electrodes (12a, 12b, 12c) arranged at different intervals an interval (d1, d2, d3; see paragraphs 35-37)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify the substrate of Choi by having the pair electrodes arranged at different intervals as taught by Teraguchi in order to arrange different types of light emitting devices in prescribed locations by matching the length of the type of light emitting device desired in a particular location with the electrode interval at that location (Teraguchi paragraphs 35-37). Choi does not specifically teach “wherein the voltage is a plurality of different alternating voltages having different frequencies that are respectively applied to the pair electrodes, and wherein the plurality of different alternating voltages are configured for semiconductor light-emitting devices that are formed to exhibit either P-DEP or N-DEP characteristics for voltage signals of different frequency ranges”. However, Martin teaches “wherein the voltage is a plurality of different alternating voltages (paragraph 121, 122, 188) having different frequencies (paragraphs 121, 122, 188) that are respectively applied to the pair electrodes (paragraphs 121, 122, 188), and wherein the plurality of different alternating voltages are configured for semiconductor light-emitting devices that are formed to exhibit either P-DEP or N-DEP characteristics for voltage signals of different frequency ranges (paragraph 193; see Fig. 18). it would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify Choi’s substrate by applying different voltages to different pair electrodes as suggested by Martin in order to manipulate the semiconductors in desired directions (Martin paragraph 193). With respect to claim 2: Choi in view of Teraguchi and Martin teaches “the substrate of claim 1 (see above)”. Choi further teaches “wherein the pair electrodes comprise: first pair electrodes (311a, 312a) disposed at first intervals (see Fig. 10); second pair electrodes (311b, 312b) disposed at second intervals (see Fig. 10); and third pair electrodes (311c, 312c) disposed at third intervals (see Fig. 10)”. With respect to claim 3: Choi in view of Teraguchi and Martin teaches “the substrate of claim 2 (see above)”. Choi further teaches “wherein the cells comprise: first cells (cell into which 250 is introduced) having a first shape to overlap the first pair electrodes (see Figs. 8); second cells (cell into which 250a is introduced) having a second shape to overlap the second pair electrodes (see Figs. 8); and third cells (cell into which 250b is introduced) having a third shape to overlap the third pair electrodes (see Figs. 8)”. With respect to claim 4: Choi in view of Teraguchi and Martin teaches “the substrate of claim 2 (see above)”. Choi further teaches “wherein the first pair electrodes, the second pair electrodes, and the third pair electrodes are alternately disposed on the base portion (see Figs. 6, 10)”. With respect to claim 6: Choi in view of Teraguchi and Martin teaches “the substrate of claim 1 (see above)”. Choi further teaches “wherein the pair electrodes comprise first pair electrodes disposed at first intervals (see Fig. 10), second pair electrodes disposed at second intervals (see Fig. 10), and third pair electrodes disposed at third intervals (see Fig. 10), and wherein the first pair of electrodes, the second pair electrodes, and the third pair electrodes are respectively connected to different first and second electrode pads (331a+332a, 331b+332b, and 331c+332c, respectively; see Fig. 13)”. With respect to claim 7: Choi teaches a method for manufacturing a display apparatus (method of making 100), the method comprising: placing semiconductor light-emitting devices (250) into a chamber (162) containing a fluid (paragraph 83), and transferring a substrate (261) comprising cells(261d) on which the semiconductor light-emitting devices are to be seated (see Figs. 8e-8g) to an assembly position (Fig. 8a); applying a magnetic force (using magnet 163 (Fig. 8b)) to the semiconductor light-emitting devices to move the semiconductor light-emitting devices in one direction (Figs. 8b-8c); and forming an electric field on the substrate to allow the moving semiconductor light- emitting devices to be seated on the cells (paragraph 110 (Fig. 8d)), wherein the substrate comprises first pair electrodes (261c (311a, 312a)) disposed at first intervals (see Fig. 10), second pair electrodes (261c (311b, 312b)) disposed at second intervals (see Fig. 10), and third pair electrodes (262c (311c, 312c)) disposed at third intervals (see Fig. 10)”. Choi is silent about whether or not the voltages applied to the first, second, and third pair electrodes are the same or different from each other. Teraguchi, as mentioned above, teaches wherein the pair electrodes (12) are arranged at different intervals (d1, d2, d3) according to sizes (R1, R2, R3) of semiconductor light-emitting devices (11) to be seated in the cells (see Fig. 2). It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify the substrate of Choi by having the pair electrodes arranged at different intervals as taught by Teraguchi in order to arrange different types of light emitting devices in prescribed locations by matching the length of the type of light emitting device desired in a particular location with the electrode interval at that location (Teraguchi paragraphs 35-37). However, Martin teaches a dielectrophoretic process for aligning and depositing elements onto a substrate that explains that the dielectrophoretic force is dependent upon on the gradient of the quadratic electric field magnitude, electric field frequency, conductivity and permittivity of the element being deposited, solvent permittivity and the shape of the element being deposited (radius r and length L) (paragraph 91). In particular the alignment force produced by the applied voltage frequency is shown to vary depending on said frequency and also on the length of the deposited element (see Fig. 6). Based on the equations Martin gives in paragraphs 90-91, the force applied to the semiconductor light emitting devices of Choi is different for semiconductor light emitting devices of different sizes, unless compensated for by modulating the frequency or magnitude of the voltage. Therefore, it would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify the frequency or magnitude of the voltage applied to the pair electrodes of Choi as suggested by Martin when the electrodes are used for semiconductor light emitting devices of different sizes as taught by Teraguchi in order to compensate for the change in dielectrophoretic force caused by the different sizes of the different semiconductor light emitting devices (Martin paragraphs 90-91; see also Fig. 6). Choi does not specifically teach “wherein the voltage is a plurality of different alternating voltages having different frequencies that are respectively applied to the pair electrodes, and wherein the plurality of different alternating voltages are configured for semiconductor light-emitting devices that are formed to exhibit either P-DEP or N-DEP characteristics for voltage signals of different frequency ranges”. However, Martin teaches “wherein the voltage is a plurality of different alternating voltages (paragraph 121, 122, 188) having different frequencies (paragraphs 121, 122, 188) that are respectively applied to the pair electrodes (paragraphs 121, 122, 188), and wherein the plurality of different alternating voltages are configured for semiconductor light-emitting devices that are formed to exhibit either P-DEP or N-DEP characteristics for voltage signals of different frequency ranges (paragraph 193; see Fig. 18). it would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify Choi’s substrate by applying different voltages to different pair electrodes as suggested by Martin in order to manipulate the semiconductors in desired directions (Martin paragraph 193). With respect to claim 9: Choi in view of Teraguchi, and Martin teaches “the method of claim 7 (see above)”. Choi further teaches “wherein the cells comprises first cells having a first shape to overlap the first pair electrodes, second cells having a second shape to overlap the second pair electrodes, and third cells having a third shape to overlap the third pair electrodes (see Fig. 9a)”. With respect to claim 10: Choi in view of Teraguchi, and Martin teaches “the method of claim 7 (see above)”. Choi further teaches “wherein the semiconductor light- emitting devices comprise first semiconductor light-emitting devices having a first shape (250), second semiconductor light-emitting devices having a second shape (250a), and third semiconductor light- emitting devices having a third shape (250b)”. With respect to claim 13: Choi in view of Teraguchi, and Martin teaches “the method of claim 8 (see above)”. Choi further teaches wherein the different frequencies that are respectively applied to the first pair electrodes, the second pair electrodes, and the third pair electrodes induce the semiconductor light-emitting devices to have a p-DEP characteristic (paragraph 157). Choi does not teach frequencies to alternately provide a n-DEP characteristic. However, Martin teaches applying different frequencies to alternate between inducing p-DEP and n-DEP (paragraphs 117, 122, 193). It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by modulating between frequencies that induce p-DEP and n-DEP characteristics as taught by Martin in order to permit badly positioned semiconductors to reposition in a better alignment (Martin paragraph 122, 193). With respect to claim 14: Choi in view of Teraguchi, and Martin teaches “the method of claim 13 (see above)”. Choi teaches “the cells comprises first cells, second cells and third cells (see Figs. 6-9)”. Choi does not specifically teach “wherein the different frequencies include a first frequency, a second frequency and a third frequency, and, and wherein, when a voltage having the first frequency is applied to the first pair electrodes, first semiconductor light-emitting devices among the semiconductor light-emitting devices have the p-DEP characteristic so as to be seated on the first cells, and second and third semiconductor light-emitting devices among the semiconductor light-emitting devices have the n-DEP characteristic so as not to be seated on the first cells”. However, Martin suggests “wherein the different frequencies include a first frequency, a second frequency and a third frequency (paragraphs 117-122), and, and wherein, when a voltage having the first frequency is applied to the first pair electrodes, first semiconductor light-emitting devices among the semiconductor light-emitting devices have the p-DEP characteristic so as to be seated on the first cells (paragraph 117), and second and third semiconductor light-emitting devices among the semiconductor light-emitting devices have the n-DEP characteristic so as not to be seated on the first cells (paragraphs 122, 193)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by modulating between frequencies that induce p-DEP and n-DEP characteristics as taught by Martin in order to permit badly positioned semiconductors to reposition in a better alignment (Martin paragraph 122, 193). With respect to claim 15: Choi in view of Teraguchi, and Martin teaches “the method of claim 14 (see above)”. Choi teaches “wherein when a voltages having a second frequency and a third frequency are applied to the second pair electrodes and the third pair electrodes, respectively, the second and third semiconductor light-emitting devices have the p-DEP characteristic to be seated on the second cells and the third cells, respectively (paragraph 157)”. Choi does not teach “the first semiconductor light-emitting devices have the n-DEP characteristic so as not to be seated on the second and third cells”. However, Martin teaches “the first semiconductor light-emitting devices have the n-DEP characteristic so as not to be seated on the second and third cells (paragraph 122, 193)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by modulating between frequencies that induce p-DEP and n-DEP characteristics as taught by Martin in order to permit badly positioned semiconductors to reposition in a better alignment (Martin paragraph 122, 193). With respect to claim 16: Choi in view of Teraguchi, and Martin teaches “the method of claim 15 (see above)”. Choi does not specifically teach “wherein the first frequency includes a high-frequency band of 20 kHz or more, and the second and third frequencies include a low frequency band of 3 kHz or less”. However, Martin teaches “wherein the first frequency includes a high-frequency band of 20 kHz or more (paragraph 121), and the second and third frequencies include a low frequency band of 3 kHz or less (paragraph 122)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by modulating between frequencies that induce p-DEP and n-DEP characteristics as taught by Martin in order to permit badly positioned semiconductors to reposition in a better alignment (Martin paragraph 122, 193). With respect to claim 17: Choi in view of Teraguchi and Martin teaches “the substrate of claim 2 (see above)”. Choi does not specifically teach “wherein one electrode is shared between the first pair electrodes and the second pair electrodes, and wherein one electrode is shared between the second pair electrodes and the third pair electrodes”. However, Teraguchi teaches “wherein one electrode is shared between the first pair electrodes and the second pair electrodes, and wherein one electrode is shared between the second pair electrodes and the third pair electrodes (see Fig. 1)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to modify the substrate of Choi by having adjacent pair electrodes sharing electrodes as taught by Teraguchi so that the method step of applying the voltage to the electrode pairs to align the light emitting elements can be performed simultaneously for many light emitting elements (Teraguchi paragraph 72). With respect to claim 18: Choi in view of Teraguchi and Martin teaches “a display apparatus (Choi 100) comprising: the substrate of claim 1 (see above); and semiconductor light-emitting devices (Choi 250) disposed in the cells, respectively (Choi Figs. 9)”. Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Choi in view of Teraguchi, and Martin as applied to claim 7 above, and further in view of Kim et al. (KR 20200021966). Note: Kim et al. (US 2023/0084381 A1) is cited as an English language version of Kim. With respect to claim 11: Choi in view of Teraguchi, and Martin teaches “the method of claim 7 (see above)”. Choi does not specifically teach “wherein the semiconductor light- emitting devices comprise first semiconductor light-emitting devices having a higher electrical conductivity and a lower dielectric constant than the fluid, and second semiconductor light- emitting devices having a lower electrical conductivity and a higher dielectric constant than the fluid”. However, Kim teaches “wherein the semiconductor light- emitting devices (350) comprise first semiconductor light-emitting devices (410) having a higher electrical conductivity and a lower dielectric constant than the fluid (paragraphs 124, 132-133), and second semiconductor light- emitting devices (420) having a lower electrical conductivity and a higher dielectric constant than the fluid (paragraphs 127, 132-133, 136)”. It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by using devices having a higher electrical conductivity and a lower dielectric constant than the fluid and devices having a lower electrical conductivity and a higher dielectric constant than the fluid as taught by Kim in order to align the light emitting devices (Kim paragraph 140). With respect to claim 12: Choi in view of Teraguchi and Martin teaches “the method of claim 7 (see above)”. Choi further teaches “wherein the semiconductor light- emitting devices comprise a passivation layer (270) disposed to cover surfaces of the semiconductor light-emitting devices (see Fig. 9e)”. Choi does not specifically teach “wherein the semiconductor light-emitting devices comprise semiconductor light-emitting devices in which at least one of a thickness and a material of the passivation layer is different than that of other semiconductor light-emitting devices”. However, Kim teaches a passivation layer 390. The material of Choi’s passivation layer is a polymer (Choi paragraph 134) while Kim’s is made from silica (Kim paragraphs 152, 127). It would have been obvious at the time the application was effectively filed for one of ordinary skill in the art to further modify the method of Choi by using the different materials of the passivation layers taught by Choi and Kim due to the art recognized suitability of these materials for the purpose of passivation (Choi paragraph 134, Kim paragraphs 152, 127). Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHANIEL J. LEE whose telephone number is (571)270-5721. The examiner can normally be reached 9-5 EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ABDULMAJEED AZIZ can be reached at (571)270-5046. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATHANIEL J LEE/ Examiner, Art Unit 2875 /ABDULMAJEED AZIZ/ Supervisory Patent Examiner, Art Unit 2875
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Prosecution Timeline

Dec 23, 2022
Application Filed
Jun 11, 2025
Non-Final Rejection mailed — §103
Sep 11, 2025
Response Filed
Dec 17, 2025
Final Rejection mailed — §103
Mar 17, 2026
Request for Continued Examination
Mar 18, 2026
Response after Non-Final Action
Apr 01, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
63%
Grant Probability
85%
With Interview (+22.0%)
2y 6m (~0m remaining)
Median Time to Grant
High
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