Prosecution Insights
Last updated: May 29, 2026
Application No. 18/013,944

Full-color silicon-based organic light-emitting diode (OLED) display device and method

Non-Final OA §103
Filed
Dec 30, 2022
Priority
Oct 20, 2020 — CN 202011122344.1 +1 more
Examiner
SHEKER, RHYS PONIENTE
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Anhui Semiconductor Integrated Display Technology Co. Ltd.
OA Round
2 (Non-Final)
85%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
45 granted / 53 resolved
+16.9% vs TC avg
Moderate +10% lift
Without
With
+9.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
33 currently pending
Career history
99
Total Applications
across all art units

Statute-Specific Performance

§103
95.4%
+55.4% vs TC avg
§102
2.9%
-37.1% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 53 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This Office Action is in response to Applicant’s Remarks filed on 10/30/2025. Currently, claims 1-9 are pending in the application. Currently, claims 4-9 are withdrawn. Response to Amendments Applicant' s arguments with respect to claim(s) 1-3 have been considered but are moot because the new ground of rejection does not rely on the same combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Objections Claim 1 is objected to because of the following informality: In claim 1, line 7, “the second ITO anode layer is disposed only under green sub-pixel” should read “the second ITO anode layer is disposed only under a green sub-pixel”. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 are rejected under 35 U.S.C. 103 as being obvious over MATSUDA et al. (US Pub. No. 2006/0232202) in view of JOO et al. (US Pub. No. 2015/0014661) and further in view of SEO et al. (US Pub. No. 2017/0179435). Regarding independent claim 1, Matsuda teaches a full-color silicon-based organic light-emitting diode (OLED) display device (Fig. 1A), comprising a base plate (Fig. 1A, 1, ¶ [0041] teaches that Matsuda’s substrate can be silicon), a metal anode (Fig. 1A, 20A + 20b), an organic functional layer (Fig. 1A, 10R + 10B + 10G, ¶ [0040]), a metal cathode (Fig. 1A, 3, ¶ [0049]), and a color filter layer (Fig. 1A, 4, ¶ [0057]), wherein the base plate, the metal anode, the organic functional layer, the metal cathode, and the color filter layer are sequentially stacked from bottom to top (Fig. 1A); wherein the metal anode comprises a first indium tin oxide (ITO) anode layer (Fig. 1A, 20a, ¶ [0044] teaches that 20a can be ITO) and a second ITO anode layer (Fig. 1A, 20b, ¶ [0044] teaches that 20b can be ITO), and the first ITO anode layer and the second ITO anode layer have different thicknesses (Fig. 1A, ¶ [0045]); wherein the first ITO anode layer is disposed only under a red sub-pixel (Figs. 1A & 2, EL1/EL-R, ¶ [0032] teaches that EL1 can correspond to a red organic element) and a blue sub- pixel (Figs. 1A & 2, EL2/EL-B, ¶ [0032] teaches that EL2 can correspond to a blue organic element), and the second ITO anode layer is disposed only under a green sub-pixel (Figs. 1A & 2, EL3/EL-G, ¶ [0032] teaches that EL3 can correspond to a green organic element), wherein the color filter layer comprises a red (R) filter (Figs. 1A & 2, 41/4R, ¶ [0057] teaches a red color filter. The Examiner notes that Matsuda does not appear to include a written description of 41. However, it would be obvious that 4R in the embodiment of Fig. 2 corresponds to 41 in the embodiment of Fig. 1A) and a blue (B) filter (Figs. 1A & 2, 42/4B, ¶ [0057] teaches a blue color filter. The Examiner notes that Matsuda does not appear to include a written description of 42. However, it would be obvious that 4B in the embodiment of Fig. 2 corresponds to 42 in the embodiment of Fig. 1A); and wherein a light-emitting region (Fig. 1A, area of EL1 and EL2) corresponds to the first ITO anode layer (Fig. 1A). However, Matsuda does not explicitly teach a thin film encapsulation (TFE) layer, the TFE layer and the color filter layer are sequentially stacked, wherein the color filter layer comprises a red (R) filter and a blue (B) filter and does not comprise a green (G) filter, and the R filter and the B filter are respectively coated on a light-emitting region of the TFE layer, and no color filter is present over the light-emitting region corresponding to the second ITO anode layer. However, Joo is a pertinent art that teaches a thin film encapsulation (TFE) layer (Fig. 3, 170, ¶ [0042]), the TFE layer and the color filter layer (Fig. 3, 300R + 300G + 300B, ¶ [0059]) are sequentially stacked, and the R filter (Fig. 3, 300R, ¶ [0059]) and the B filter (Fig. 3, 300B, ¶ [0059]) are respectively coated on a light-emitting region (Fig. 3, area of 170 in P1 and P3, ¶ [0060]) of the TFE layer. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Matsuda’s device to further include filling layers in-between their color filter and upper electrode according to the teaching of Joo (Fig. 3) in order to protect the organic display device (Joo ¶ [0042]). However, Matsuda modified by Joo does not explicitly teach the color filter layer comprises a red (R) filter and a blue (B) filter and does not comprise a green (G) filter, and no color filter is present over the light-emitting region corresponding to the second ITO anode layer. However, Seo is a pertinent art that teaches that the color filter layer comprises a red (R) filter (Fig. 9, 124R, ¶¶ [0109] & [0267] teaches that 124R can be a red color filter) and a blue (B) filter (Fig. 9, 124B, ¶¶ [0109] & [0267] teaches that 124B can be a blue color filter) and does not comprise a green (G) filter (Fig. 9, ¶ [0177]), and no color filter is present over the light-emitting region corresponding to the second ITO anode layer (Fig. 9, ¶ [0177] teaches that a green color filter can be omitted, which would correspond to the area of Matsuda modified by Joo’s green organic light emitting device (Matsuda Fig. 1A, EL3) and would therefore fulfill this limitation). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Matsuda modified by Joo’s display device to not include a green color filter according to the teaching of Seo (Fig. 9) in order to lower power consumption (Seo ¶ [0177]). Regarding claim 2, Matsuda modified by Joo modified by Seo teaches the full-color silicon-based OLED display device according to claim 1. However, Matsuda does not explicitly teach that the organic functional layer comprises a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, and the hole injection layer, the hole transport layer, the light-emitting layer, the electron transport layer, and the electron injection layer are sequentially arranged from bottom to top; and wherein the light-emitting layer comprises an R light-emitting unit, a B light-emitting unit, and a green (G) light-emitting unit (the Examiner notes that Matsuda does teach that their function layers can be a structure that emits white light (Matsuda Figs. 1A & 1D, ¶ [0036]) but does not provide a corresponding description for this embodiment). However, Joo is a pertinent art that teaches that the organic functional layer (Fig. 3, 120 + 140, ¶ [0036]) comprises a hole injection layer (Fig. 3, 141, ¶ [0036]), a hole transport layer (Fig. 3, 142, ¶ [0036]), a light-emitting layer (Fig. 3, 120, ¶ [0036] ), an electron transport layer (Fig. 3, 143, ¶ [0036]), and an electron injection layer (Fig. 3, 144, ¶ [0036]), and the hole injection layer, the hole transport layer, the light-emitting layer, the electron transport layer, and the electron injection layer are sequentially arranged from bottom to top (Fig. 3); and wherein the light-emitting layer comprises an R light-emitting unit (Fig. 3, 121, ¶ [0048]), a B light-emitting unit (Fig. 3, 123, ¶ [0050]), and a green (G) light-emitting unit (Fig. 3, 122, ¶ [0049]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Matsuda’s functional layers to have a similar structure to Joo’s organic light emitting structures (Joo Fig. 3) in order to implement a full color display using a micro-cavity effect (Joo ¶ [0006], Matsuda ¶¶ [0029] & [0053]). Regarding claim 3, Matsuda modified by Joo modified by Seo teaches the full-color silicon-based OLED display device according to claim 1. However, Matsuda modified by Joo does not explicitly teach that the base plate is a single-crystal silicon chip. However, Seo teaches that the base plate is a single-crystal silicon chip (Fig. 1, 102, ¶¶ [0232]-[0233] teaches a substrate 102 used as a support for Seo’s light emitting elements. ¶ [0233] teaches that Seo’s substrate can be single crystal silicon). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Matsuda’s substrate to be single crystal silicon according to the teaching of Seo (Fig. 1) in order to enable manufacture of small sized transistors, thereby achieving higher circuit integration (Seo ¶ [0233]). Cited Prior Art The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RHYS P. SHEKER whose telephone number is (703)756-1348. The examiner can normally be reached Monday - Friday 7:30 am to 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.P.S./ Examiner, Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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Prosecution Timeline

Dec 30, 2022
Application Filed
Oct 01, 2025
Non-Final Rejection mailed — §103
Oct 17, 2025
Interview Requested
Oct 29, 2025
Applicant Interview (Telephonic)
Oct 29, 2025
Examiner Interview Summary
Oct 30, 2025
Response Filed
Dec 23, 2025
Final Rejection mailed — §103
Jan 13, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+9.8%)
3y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 53 resolved cases by this examiner. Grant probability derived from career allowance rate.

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