Prosecution Insights
Last updated: April 19, 2026
Application No. 18/015,164

METHOD FOR REDUCING IN-RUSH CURRENTS IN BATTERY CHARGING APPLICATIONS

Final Rejection §103§112§DP
Filed
Jan 09, 2023
Examiner
MCFARLAND, DANIEL PATRICK
Art Unit
2859
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hella GmbH & Co. KGaA
OA Round
2 (Final)
50%
Grant Probability
Moderate
3-4
OA Rounds
3y 4m
To Grant
-50%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allow Rate
1 granted / 2 resolved
-18.0% vs TC avg
Minimal -100% lift
Without
With
+-100.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
48 currently pending
Career history
50
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
45.1%
+5.1% vs TC avg
§102
14.7%
-25.3% vs TC avg
§112
30.4%
-9.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2 resolved cases

Office Action

§103 §112 §DP
Status of Claims In the communication filed on 12/23/2025, claims 1, 4, 7, 9-11, and 15 are pending. Claims 1 and 9-10 are amended. No claims are new. Claims 2-3, 5-6, 8, and 12-14 are presently cancelled. Response to Arguments The prior objections to the Drawings and Specification are withdrawn due to the amendments. The prior rejections under U.S.C. 112(b) are withdrawn due to the amendments. The prior action included provisional nonstatutory double patenting rejections of claims 1, 4, 7, 9-11, and 15 over the copending application number 17/630,603 in view of prior art. The application 17/630,603 has since been allowed and U.S. Patent 12,490,344 issued. The applicant argues the claim amendments distinguish the instant application’s claims over the claims of U.S. Patent 12,490,344, alone or as modified by the prior art. Regarding claims 1, 4, 7, and 9, the examiner respectfully disagrees and provides detailed claim item mapping, included infra, to support the examiner’s position with respect to the amended subject matter. Regarding claims 10-11 and 15, the applicant’s arguments have been considered but are moot because the arguments do not apply to the combination of references being used in the current rejection. Applicant’s arguments with respect to the prior art rejections of amended claims 1, 4, 7, 9-11, and 15 have been considered but are moot because the arguments do not apply to the combination of references being used in the current rejection. Claim Rejections - 35 USC § 112 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 4, 7, and 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1, line 7 recites “the current in the load path”. There is insufficient antecedent basis for this claim limitation. Claims 4, 7, and 9 are further rejected for their dependency on other rejected claims. Double Patenting Claims 1, 4, and 7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of the issued U.S. patent Mondal (US 12,490,344 B2) in view of Lee (US 2012/0256568 A1). The following table compares the claims of the instant application and Mondal. The patentably indistinct claim language is identified with bold text. Instant Application 18/015,164 Mondal (US 12,490,344 B2) Claim 1 A method comprising: providing a battery module including a first battery cell that is series connected with a load path of a power MOSFET, such that a current flows to the first battery cell during activation of the power MOSFET; activating the power MOSFET with a PWM gate voltage, the PWM gate voltage having a variable frequency and a variable duty cycle; measuring the current in the load path of the power MOSFET during activation of the power MOSFET; and alternating between frequency modulation and duty cycle modulation of the PWM gate voltage to reduce in rush-currents in the battery module by varying each of the frequency and the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET below a current limit value, wherein alternating between frequency modulation and duty cycle modulation includes the following modulation sequence: decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value, reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value, increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value. Claim 1 A method for pulse-width-modulated (PWM) control of a power MOSFET having a load path, the method comprising: (a) providing an electrical load that is series connected with the load path of the power MOSFET; (not explicitly claimed) (b) activating the power MOSFET with a PWM gate voltage, the PWM gate voltage having a frequency and a duty cycle; (c) measuring the current in the load path of the power MOSFET during activation of the power MOSFET; (infra: step (e)) (not explicitly claimed) (infra: step (e)) (d) comparing the measured current in the load path of the power MOSFET with a current limit value; (e) iteratively decreasing a frequency of the PWM gate voltage and increasing a duty cycle of the PWM gate voltage until the measured current in the load path is determined to exceed the current limit value; and (f) if the measured current in the load path is not less than the current limit value, reverting to an immediately previous frequency or duty cycle of the PWM gate voltage. Regarding independent claim 1, Mondal does not claim the limitation “providing a battery module including a first battery cell that is series connected with a load path of a power MOSFET, such that a current flows to the first battery cell during activation of the power MOSFET”. Though Mondal claims patentably indistinct subject matter to “alternating between frequency modulation and duty cycle modulation of the PWM gate voltage”, Mondal further does not claim the modulation of the PWM gate voltage is performed “to reduce in rush-currents in the battery module”. Lee further teaches (see detailed claim item mapping included infra in the prior art rejection) providing a battery module including a first battery cell that is series connected with a load path of a power MOSFET such that a current flows to the first battery cell during activation of the power MOSFET. Lee further teaches (see detailed claim item mapping included infra in the prior art rejection) modulating the PWM gate voltage to reduce in rush-currents in the battery module. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method claimed by Mondal to provide a battery module including a first battery cell that is series connected with the load path, as taught by Lee, to provide a power source for the load. It further would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method’s modulation of the PWM gate voltage claimed by Mondal to reduce in rush-currents in the battery module, as taught by Lee, to avoid exceeding the current ratings of the battery during recharging (Lee ¶ [101]) and thus improve battery life (Lee ¶ [162]). Regarding dependent claim 4, the copending application does not claim “the battery module includes a second battery cell having a series connection with the first battery cell, wherein activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell.” Lee teaches (see detailed claim mapping included infra in prior art rejection) the battery module includes a second battery cell having a series connection with the first battery cell, wherein activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell. Lee teaches this to enable the capability to charge and discharge through variable electrical loads (¶ [21]) by reconfiguration to output a wider range of voltage levels (¶ [22-24]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method claimed by Mondal to incorporate a battery module with two battery cells such that activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell, as taught by Lee, to output a wider range of voltage levels, which enables the capability to charge and discharge through variable electrical loads. Regarding dependent claim 7, Mondal does not claim “the current through the first battery cell is less than the current limit value when the first and second battery cells are connected in parallel.” However, the combination of the copending application’s claim 1 and the teachings of Lee teach the current through the first battery cell is less than the current limit value when the first and second battery cells are connected in parallel. NOTE: The combination of the copending application’s claim 1 and Lee teaches the current in the load path is controlled to be less than the current limit value. Lee further discloses the parallel battery cells are evenly charged (¶ [171]). When the first and second battery cells are connected in parallel (see annotated Lee Fig. 5b, V02, included supra), the sum of currents through the parallel battery cells is equivalent to the current in the load path per the well-known Kirchhoff’s current law. Official notice is taken that a reference for Kirchoff’s current law can be provided upon request. Thus, each of the parallel battery cells conducts less than the current limit value. Thus, it is inherent per Kirchhoff’s current law that the combination of the copending application’s claim 1 and Lee teaches the current through the first battery cell is less than the current limit value when the first and second battery cells are connected in parallel. Claim 9 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of the issued U.S. patent Mondal (US 12,490,344 B2) in view of Lee (US 2012/0256568 A1) and Eguchi et al. (JP 3312422 B2; hereinafter “Egu”). Regarding dependent claim 9, Mondal does not claim “measuring the current in the load path is performed by a controller based on the output of a voltage sensor.” Egu teaches (see detailed claim mapping included infra in prior art rejection) measuring the current in the load path is performed by a controller based on the output of a voltage sensor. Egu further teaches this method of measuring the current in the load path with a controller and a voltage sensor to improve detection of light load and no-load current levels (page 7, first paragraph). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method claimed by Mondal to measure the load current by a controller based on the output of a voltage sensor, as taught by Egu, to improve detection of light load and no-load current levels. Claims 10 and 11 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of the issued U.S. patent Mondal (US 12,490,344 B2) in view of Lee (US 2012/0256568 A1), Thenus et al. (US 2016/0111061 A1), and Karlin et al. (US 5,192,905 A). The following table compares the claims of the instant application and Mondal. The patentably indistinct claim language is identified with bold text. Instant Application 18/015,164 Mondal (US 12,490,344 B2) Claim 10 A system comprising: a battery module including a first battery cell; a power MOSFET, the first battery cell being series connected with a load path of the power MOSFET; (see claim 15, included infra) and a controller adapted to provide a PWM gate voltage to the power MOSFET by alternating between frequency modulation and duty cycle modulation of the PWM gate voltage to reduce in rush-currents in the battery module, wherein the PWM gate voltage includes a variable frequency and a variable duty cycle, the controller including machine readable instructions that, when executed, cause the controller to (i) measure a current in the load path of the power MOSFET during activation of the power MOSFET and (ii) vary the frequency and the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET below a current limit value, wherein varying the frequency and the duty cycle of the PWM gate voltage includes the following: decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value, reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value, increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value. Claim 6 A system for pulse-width-modulated (PWM) control of a power MOSFET, the system comprising: a power MOSFET having a load path; an electrical load that is series connected with the load path of the power MOSFET; a current sensor adapted to measure a current value in the load path of the power MOSFET; a voltage source adapted to provide a variable PWM gate voltage to the power MOSFET, (see note included infra regarding “controller” vs. “voltage source”) (infra: “iteratively decrease a frequency … and iteratively increase a duty cycle”) (not explicitly claimed) (supra: “a current sensor adapted to measure a current value in the load path of the power MOSFET”) wherein the voltage source is operable to iteratively decrease a frequency of the PWM gate voltage and iteratively increase a duty cycle of the PWM gate voltage until a measured current in the load path is determined to exceed a current limit value based on the output of the current sensor. (not explicitly claimed) Regarding independent claim 10, Mondal does not claim the limitations “a battery module including a first battery cell”, “the first battery cell being series connected with a load path of the power MOSFET”, and “the controller including machine readable instructions”. NOTE: The “controller” of the instant application is interpreted to be not patentably distinct from the “voltage source” of the copending application. Both are voltage sources that output the PWM gate voltage. Though Mondal claims patentably indistinct subject matter to “alternating between frequency modulation and duty cycle modulation of the PWM gate voltage”, Mondal further does not claim the modulation of the PWM gate voltage is performed “to reduce in rush-currents in the battery module”. Mondal further does not claim “decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value, reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value, increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value.” However, Mondal very closely claims this operational sequence with the claim 6 language “the voltage source is operable to iteratively decrease a frequency of the PWM gate voltage and iteratively increase a duty cycle of the PWM gate voltage until a measured current in the load path is determined to exceed a current limit value”. Lee teaches (see detailed claim mapping included infra in prior art rejection) a battery module including a first battery cell, the first battery cell being series connected with a load path of the power MOSFET, and the controller including machine readable instructions. Lee teaches this for the advantage of providing a power source for the load (¶ [30]) using machine readable instructions (¶ [162]: “software”) for control, which configures system to accomplish the tasks most effectively (¶ [163]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the system claimed by Mondal to incorporate a battery module including a first battery cell in series with the load path and for the controller to include machine readable instructions, as taught by Lee, to provide a power source for the load and for the system to accomplish the tasks most effectively. Thenus teaches (see detailed claim item mapping included infra in the prior art rejection) decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value and reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value. Thenus further teaches controlling the frequency based on a comparison of the load path current with the current limit value to minimize switching power consumption and improve efficiency at low load currents (¶ [2-3, 24]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the system’s frequency adjustments claimed by Mondal to control the frequency based on a comparison of the current in the load path with the current limit value, as taught by Thenus, to minimize switching power consumption and improve efficiency at low load current. Karlin teaches (see detailed claim item mapping included infra in the prior art rejection) increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value. Karlin further teaches controlling the duty cycle based on comparing the load current with the current limit value to reduce component stress during start up (col. 7, lines 3-10). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the system’s duty cycle adjustments claimed by Mondal to control the duty cycle based on a comparison of the current in the load path with the current limit value, as taught by Karlin, to reduce component stress during start up. Regarding dependent claim 11, Mondal does not claim “the battery module includes a second battery cell having a series connection with the first battery cell, wherein activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell”. Lee teaches (see detailed claim mapping included infra in prior art rejection) wherein the battery module includes a second battery cell having a series connection with the first battery cell, wherein activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell. Lee teaches this to enable the capability to charge and discharge through variable electrical loads (¶ [21]) by reconfiguration to output a wider range of voltage levels (¶ [22-24]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the system claimed by Mondal to incorporate a second battery cell such that activating the power MOSFET converts the series connection into a parallel connection for charging the first battery cell, as taught by Lee, to output a wider range of voltage levels, which enables the capability to charge and discharge through variable electrical loads. Claim 15 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of the issued U.S. patent Mondal (US 12,490,344 B2) in view of Lee (US 2012/0256568 A1), Thenus et al. (US 2016/0111061 A1), Karlin et al. (US 5,192,905 A), and Eguchi et al. (JP 3312422 B2; hereinafter “Egu”). The following table compares the claims of the instant application and Mondal. The patentably indistinct claim language is identified with bold text. Instant Application 18/015,164 Mondal (US 12,490,344 B2) Claim 15 The system of claim 10, wherein the controller is coupled to the output of a voltage sensor to indirectly measure the current in the load path of the power MOSFET. Claim 6 excerpt: measure a current value in the load path of the power MOSFET Regarding dependent claim 15, Mondal does not claim “the controller is coupled to the output of a voltage sensor to indirectly measure the current in the load path of the power MOSFET” Egu teaches (see detailed claim mapping included infra in prior art rejection) the controller is coupled to the output of a voltage sensor to indirectly measure the current in the load path of the power MOSFET. Egu further teaches the voltage sensor to indirectly measure the current in the load path to improve detection of light load and no-load current levels (page 7, first paragraph). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify system claimed by Mondal to incorporate a voltage sensor to indirectly measure the current in the load path, as taught by Egu, to improve detection of light load and no-load current levels. Claim Rejections - 35 USC § 103 Claims 1, 4, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2012/0256568 A1) in view of Vanin et al. (US 2019/0157975 A1), Thenus et al. (US 2016/0111061 A1), and Karlin et al. (US 5,192,905 A). Regarding Claim 1, Lee discloses a method (¶ [21]: “methods for reconfiguring a battery for charging and discharging through variable electrical loads”) comprising the following. Lee further discloses (see annotated Fig. 5b, V01, included infra) providing a battery module (“battery 42”; Figs. 4-6) including a first battery cell (“battery cell 52”) that is series connected with a load path (from “52”, through power MOSFET “57” and load “46”; see annotated Fig. 5b, V01) of a power MOSFET (“switching means 57”; Figs. 5a-5c, 6; also referred to as a “power MOSFET” in ¶ [168]). Lee further discloses that a current flows to the first battery cell (52) during activation of the power MOSFET (57). PNG media_image1.png 880 1425 media_image1.png Greyscale Lee further discloses activating the power MOSFET (57) with a PWM gate voltage (gate voltage of “57” is PWM’d per ¶ [110, 115]; considering embodiment per ¶ [115] wherein “57” takes on the PWM functionality of “speed control switch 59”; PWM gate voltage is controlled by “controller 50”), the PWM gate voltage having a variable duty cycle (¶ [129]: “50 may be a PWM control system adapted to adjust the on-off duty cycle of the PWM switch”). Lee further discloses measuring the current (¶ [108]: “current sensor 49 could be used to monitor the current through the motor”; ¶ [111, 125, 129]) in the load path (through “57” + “46”) of the power MOSFET during activation of the power MOSFET (57). Lee further discloses using duty cycle modulation (¶ [111]: “50 … to adjust the on-off duty cycle of the PWM switch 59”; per ¶ [115], power MOSFET “57” is used for PWM speed control functionality instead of “59”) of the PWM gate voltage (voltage on gate of “57”, received from “50”) to reduce in rush-currents (the current spikes into the battery are reduced by the duty cycle regulation of “57”) in the battery module (42). Lee further discloses varying the duty cycle (¶ [111]: “50 … to adjust the on-off duty cycle of the PWM switch 59”; per ¶ [115], power MOSFET “57” is used for PWM speed control functionality instead of “59”) of the PWM gate voltage (voltage on gate of “57”, received from “50”) to iteratively increase the current (¶ [10]: “speed controller regulates both the drive and braking current via PWM”; current through load “46” increases during each on-state of the PWM’d “57”) in the load path (through “57” + “46”) of the power MOSFET (57) while maintaining the current (¶ [10]: “speed controller regulates both the drive and braking current via PWM”; ¶ [104]: “controller 50 may be adapted to control the current supplied to the motor 46 from the battery 42”) in the load path (through “57” + “46”) of the power MOSFET (57). As addressed supra, Lee discloses activating the power MOSFET with a PWM gate voltage, the PWM gate voltage having a variable duty cycle. However, Lee does not disclose “activating the power MOSFET with a PWM gate voltage, the PWM gate voltage having a variable frequency and a variable duty cycle”. As also addressed supra, Lee discloses a controller adapted to provide a PWM gate voltage to the power MOSFET by using duty cycle modulation of the PWM gate voltage to reduce in rush-currents in the battery module. However, Lee does not disclose “alternating between frequency modulation and duty cycle modulation”. As also addressed supra, Lee discloses varying the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET. However, Lee further does not disclose “varying each of the frequency and the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET below a current limit value”. Lee further does not disclose that “alternating between frequency modulation and duty cycle modulation includes the following modulation sequence: decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value, reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value, increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value.” Vanin teaches activating the power MOSFET (“high-side transistor THS”; Fig. 1; ¶ [20]: “implemented as … MOSFETs”) with a PWM gate voltage (“switching signal SPWM”; Fig. 1). PNG media_image2.png 845 1585 media_image2.png Greyscale Vanin further teaches the PWM gate voltage (SPWM; operated with each of “pulse frequency modulation (PFM)” and “pulse width modulation (PWM)” per Figs. 3-4) having a variable frequency (¶ [3]: “when using PFM, the switching frequency is adjusted”) and a variable duty cycle (¶ [3]: “when using PWM, the duty cycle of the switching signal is adjusted”). Vanin further teaches alternating (Fig. 4 illustrates that the system switches between PWM and PFM modes based on the “input voltage VIN”; ¶ [37]: “mode switch from PWM-CCM to PFM-CCM”) between frequency modulation (PFM) and duty cycle modulation (PWM) of the PWM gate voltage (SPWM) to reduce output currents (per ¶ [24-30], the “first (inner) control loop” uses the “current set-point” to limit the “peak value of the inductor current iL”; see note 1-1, included infra). NOTE 1-1: Though Vanin’s teachings are not explicitly for in-rush currents in the battery module as claimed, one of ordinary skill in the art understands that the output currents from Vanin’s system are analogous to a battery’s input currents, established infra by Lee. Lee’s battery input currents are regulated by a PWM’d power MOSFET in the load path, as are the output currents from Vanin’s system. PNG media_image3.png 920 963 media_image3.png Greyscale Vanin further teaches varying each of the frequency (PFM) and the duty cycle (PWM) of the PWM gate voltage (SPWM) to iteratively increase the current (“inductor current iL” through “inductor LO” increases each time the high-side power MOSFET “THS” is turned on, which occurs during the on-period of each cycle during each of PFM and PWM modes) in the load path (annotated Fig. 1, included supra, depicts the load path through “THS” and “LO”) of the power MOSFET (THS), maintaining the current in the load path (iL) of the power MOSFET (THS) below a current limit value (per ¶ [24-30], the “first (inner) control loop” uses the “current set-point” to limit the “peak value of the inductor current iL”). Vanin further teaches alternating between frequency modulation (PFM) and duty cycle modulation (PWM) includes a modulation sequence including: decreasing the frequency (fSW) of the PWM gate voltage (¶ [37]: “switching frequency fSW monotonously decreases with increasing voltage VIN”; Fig. 4), reverting to a previous frequency of the PWM gate voltage (any time the switching frequency “fSW” increases as “VIN” decreases, after “fSW” previously decreased, the switching frequency would be reverting to a previous frequency; any frequency previously operated can be interpreted as a “previous frequency”), increasing the duty cycle of the PWM gate voltage (¶ [23]: “on-time TON is adjusted in each switching cycle”; this is interpreted as both increasing and decreasing), and reverting to a previous duty cycle of the PWM gate voltage (any duty cycle previously operated can be interpreted as a “previous duty cycle”; reverting to a previous duty cycle is inevitable during normal adjusting of “TON” based on “inductor current iL”). Vanin further teaches alternating between PWM and PFM based on input voltage to allow the system to operate and maintain stability across a greater range of operating points (¶ [31, 37-38]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method disclosed by Lee to alternate between frequency modulation and duty cycle variation, as taught by Vanin, to operate and maintain stability across a broader range of input voltages to the system. Though Vanin’s alternating between modulation modes is not explicitly taught “to reduce in-rush currents in the battery module” as claimed, it was already established supra that the base reference Lee’s duty cycle modulation is performed to reduce in-rush currents. Thus, Lee’s switching modulation reduces in rush currents already, regardless of the incorporation of frequency modulation. Further, each time the power MOSFET of either Lee or Vanin is turned off, the current in the load path (i.e., the in-rush current) reduces because the voltage supplied decreases. Thenus teaches (see annotated Fig. 7B, included infra) decreasing the frequency (Fig. 7B shows the PFM-controlled frequency decreases at low load currents) of the PWM gate voltage in response to the current in the load path (“load current”) being below the current limit value (when “load current” is below the threshold corresponding to the “high load case”). Thenus further teaches reverting to a previous frequency (Fig. 7b shows the PFM-controlled frequency maxes out at “peak frequency” when load current is in the “high load case”) of the PWM gate voltage in response to the current in the load path (“load current”) being greater than or equal to the current limit value (when above the threshold corresponding to the “high load case”). PNG media_image4.png 781 1579 media_image4.png Greyscale Thenus further teaches controlling the frequency based on a comparison of the load path current with the current limit value to minimize switching power consumption and improve efficiency at low load currents (¶ [2-3, 24]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the frequency modulation disclosed by the combo of Lee & Vanin to control the frequency based on a comparison of the current in the load path with the current limit value, as taught by Thenus, to minimize switching power consumption and improve efficiency at low load current. Karlin teaches increasing the duty cycle (Abstract: “step-wise increased output voltage below the predetermined value of charging current”; this increasing output voltage is accomplished by increasing the “variable duty cycle”; col. 7, lines 36-39: “the duty cycle on line 22 is varied to supply the output charging current necessary to support the output charging voltage VO called-for on line 64”; col. 8, line 38: “the pulse output width on line 22 widens) of the PWM gate voltage (col. 7, lines 29-30: “46 operates in a forward current PWM mode with a variable duty cycle”) in response to the current in the load path (“output charging current”) being below the current limit value (“predetermined value of charging current”). Karlin further teaches reverting to a previous duty cycle (per col. 9, lines 1-12, “current limiting foldback” is performed anytime the output current exceeds the “predetermined value of charging current”, wherein the pulse width is reduced; reducing the pulse width results inevitably results in reaching a previous pulse width) of the PWM gate voltage in response to the current in the load path (“output charging current”) being greater than or equal to the current limit value (“predetermined value of charging current”). Karlin further teaches controlling the duty cycle based on comparing the load current with the current limit value to reduce component stress during start up (col. 7, lines 3-10). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the duty cycle modulation disclosed by the combo of Lee, Vanin, & Thenus to control the duty cycle based on a comparison of the current in the load path with the current limit value, as taught by Karlin, to reduce component stress during start up. Regarding Claim 4, the combo of Lee, Vanin, Thenus, & Karlin teaches the method of claim 1. Lee discloses (see annotated Fig. 5a, included infra) the battery module (42) includes a second battery cell (another “52”) having a series connection with the first battery cell (52). PNG media_image5.png 875 1465 media_image5.png Greyscale Lee further discloses (see annotated Fig. 5b, V02, included infra) activating the power MOSFET (57) converts the series connection (configuration of Fig. 5a) into a parallel connection (configuration of Fig. 5b) for charging the first battery cell (“52” is charged per ¶ [114]: “controller 50 … may configure the battery cells 52 in a parallel configuration during recharging … as shown in Fig. 5b”). PNG media_image6.png 874 1379 media_image6.png Greyscale Regarding Claim 7, the combo of Lee, Vanin, Thenus, & Karlin teaches the method of claim 4. The combo of Lee, Vanin, Thenus, & Karlin (as set forth prior) teaches the current through the first battery cell (Lee: “52”; Vanin equivalent: load path current “iL”; Thenus equivalent: “load current”; Karlin equivalent: “output charging current”) is less than the current limit value (Vanin: “current set-point”; Thenus: threshold for the “high load case”; Karlin: “predetermined value of charging current”) when the first and second battery cells (Lee: two “52”, as shown in annotated Fig. 5b, V02) are connected in parallel (see note infra). NOTE: The combo of Lee, Vanin, Thenus, & Karlin teaches the current in the load path is controlled to be less than the current limit value. Lee further discloses the parallel battery cells are evenly charged (¶ [171]). When the first and second battery cells are connected in parallel (see annotated Lee Fig. 5b, V02, included supra), the sum of currents through the parallel battery cells is equivalent to the current in the load path per the well-known Kirchhoff’s current law. Official notice is taken that a reference for Kirchoff’s current law can be provided upon request. Thus, each of the parallel battery cells conducts less than the current limit value. Thus, it is inherent per Kirchhoff’s current law that the combo of Lee, Vanin, Thenus, & Karlin teaches the current through the first battery cell is less than the current limit value when the first and second battery cells are connected in parallel. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2012/0256568 A1) in view of Vanin et al. (US 2019/0157975 A1), Thenus et al. (US 2016/0111061 A1), Karlin et al. (US 5,192,905 A), and Eguchi et al. (JP 3312422 B2; hereinafter “Egu”). Regarding Claim 9, the combo of Lee, Vanin, Thenus, & Karlin teaches the method of claim 1. Lee discloses measuring the current (via “current sensor 49”; Figs. 5a-5c, 6; ¶ [108]) in the load path (through “57” + “46”; see annotated Fig. 5, V01, included supra) is performed by a controller (“controller 50”; Fig. 4; ¶ [108]: “49 and 58 could relay the … current information needed to … controller 50”). Lee does not disclose “measuring the current in the load path is performed by a controller based on the output of a voltage sensor”. Egu teaches measuring the current (page 5, 5th paragraph: “3 detects the magnitude of the load current and controls the control pulse generating circuit 43, for example, to limit the load current”) in the load path (through outputs “Eb+” and “Eb-”) is performed in a controller (“output control unit 2”, including “AND gate 61”; Fig. 2; “61” compares measured voltage to a reference voltage from “13”) based on the output of a voltage sensor (“current detecting section 3”; Fig. 2; drawn as a differential voltage sensor across shunt resistor “R”). Egu further teaches this method of measuring the current in the load path with digital logic and a voltage sensor to improve detection of light load and no-load current levels (page 7, first paragraph). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of measuring the current in the load path disclosed by the combo of Lee, Vanin, Thenus, & Karlin to be based on the output of a voltage sensor, as further taught by Egu, to improve detection of light load and no-load current levels. Claims 10-11, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2012/0256568 A1) in view of Vanin et al. (US 2019/0157975 A1), Thenus et al. (US 2016/0111061 A1), and Karlin et al. (US 5,192,905 A). Regarding Claim 10, Lee discloses a system (Figs. 4-6; see annotated Fig. 5b, V01, included supra) comprising the following features. Lee further discloses (“battery 42”; Figs. 4-6) including a first battery cell (“battery cell 52”). Lee further discloses a power MOSFET (“switching means 57”; Figs. 5a-5c, 6; also referred to as a “power MOSFET” in ¶ [168]). Lee further discloses the first battery cell (52) being series connected with a load path (from “52”, through power MOSFET “57” and load “46”; see annotated Fig. 5b, V01) of the power MOSFET (57). Lee further discloses a controller (“controller 50”; Fig. 4) adapted to provide a PWM gate voltage (gate voltage of “57” is PWM’d per ¶ [110, 115]; considering embodiment per ¶ [115] wherein “57” takes on the PWM functionality of “speed control switch 59”) to the power MOSFET (57). Lee further discloses using duty cycle modulation (¶ [111]: “50 … to adjust the on-off duty cycle of the PWM switch 59”; per ¶ [115], power MOSFET “57” is used for PWM speed control functionality instead of “59”) of the PWM gate voltage (voltage on gate of “57”, received from “50”) to reduce in rush-currents (the current spikes into the battery are reduced by the duty cycle regulation of “57”) in the battery module (42). Lee further discloses the PWM gate voltage includes a variable duty cycle (¶ [129]: “controller 50 may be a PWM control system adapted to adjust the on-off duty cycle of the PWM switch”). Lee further discloses to measure a current (¶ [108]: “current sensor 49 could be used to monitor the current through the motor”; ¶ [111, 125, 129]) in the load path (through “57” + “46”) of the power MOSFET during activation of the power MOSFET (57). As addressed supra, Lee discloses a controller adapted to provide a PWM gate voltage to the power MOSFET by using duty cycle modulation of the PWM gate voltage to reduce in rush-currents in the battery module. However, Lee does not disclose “alternating between frequency modulation and duty cycle modulation”. As also addressed supra, Lee discloses the PWM gate voltage includes a variable duty cycle. However, Lee does not disclose “the PWM gate voltage includes a variable frequency and a variable duty cycle”. As also addressed supra, Lee discloses to vary the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET. However, Lee further does not disclose to “vary the frequency and the duty cycle of the PWM gate voltage to iteratively increase the current in the load path of the power MOSFET while maintaining the current in the load path of the power MOSFET below a current limit value”. Lee further does not disclose that “varying the frequency and the duty cycle of the PWM gate voltage includes the following: decreasing the frequency of the PWM gate voltage in response to the current in the load path being below the current limit value, reverting to a previous frequency of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value, increasing the duty cycle of the PWM gate voltage in response to the current in the load path being below the current limit value, and reverting to a previous duty cycle of the PWM gate voltage in response to the current in the load path being greater than or equal to the current limit value.” Vanin teaches (see annotated Figs. 1 & 4, included supra) a controller (“switching controller 10”; Figs. 1-2, 5-6) adapted to provide a PWM gate voltage (“switching signal SPWM”; Fig. 1) to the power MOSFET (“high-side transistor THS”; Fig. 1; ¶ [20]: “implemented as … MOSFETs”) by alternating (Fig. 4 illustrates that the system switches between PWM and PFM modes based on the “input voltage VIN”; ¶ [37]: “mode switch from PWM-CCM to PFM-CCM”) between frequency modulation (“pulse frequency modulation (PFM)”) and duty cycle modulation (“pulse width modulation (PWM)”) of the PWM gate voltage (SPWM) to reduce output currents (per ¶ [24-30], the “first (inner) control loop” uses the “current set-point” to limit the “peak value of the inductor current iL”; see note 10-1, included infra). NOTE 10-1: Though Vanin’s teachings are not explicitly for in-rush currents in the battery module as claimed, one of ordinary skill in the art understands that the output currents from Vanin’s system are analogous to a battery’s input currents, established infra by Lee. Lee’s battery input currents are regulated by a PWM’d power MOSFET in the load path, as are the output currents from Vanin’s system. Vanin further teaches the PWM gate voltage (SPWM; operated with each of “pulse frequency modulation (PFM)” and “pulse width modulation (PWM)” per Figs. 3-4) includes a variable frequency (¶ [3]: “when using PFM, the switching frequency is adjusted”) and a variable duty cycle (¶ [3]: “when using PWM, the duty cycle of the switching signal is adjusted”). Vanin further teaches to vary the frequency (PFM) and the duty cycle (PWM) of the PWM gate voltage (SPWM) to iteratively increase the current (“inductor current iL” through “inductor LO” increases each time the high-side power MOSFET “THS” is turned on, which occurs during the on-period of each cycle during each of PFM and PWM modes) in the load path (annotated Fig. 1, included supra, depicts the load path through “THS” and “LO”) of the power MOSFET (THS) while maintaining the current in the load path (iL) of the power MOSFET (THS) below a current limit value (per ¶ [24-30], the “first (inner) control loop” uses the “current set-point” to limit the “peak value of the inductor current iL”). Vanin further teaches varying the frequency (PFM) and the duty cycle (PWM) of the PWM gate voltage (SPWM) includes the following: decreasing the frequency (fSW) of the PWM gate voltage (¶ [37]: “switching frequency fSW monotonously decreases with increasing voltage VIN”; Fig. 4), reverting to a previous frequency of the PWM gate voltage (any time the switching frequency “fSW” increases as “VIN” decreases, after “fSW” previously decreased, the switching frequency would be reverting to a previous frequency; any frequency previously operated can be interpreted as a “previous frequency”), increasing the duty cycle of the PWM gate voltage (¶ [23]: “on-time TON is adjusted in each switching cycle”; this is interpreted as both increasing and decreasing), and reverting to a previous duty cycle of the PWM gate voltage (any duty cycle previously operated can be interpreted as a “previous duty cycle”; reverting to a previous duty cycle is inevitable during normal adjusting of “TON” based on “inductor current iL”). Vanin further teaches alternating between PWM and PFM based on input voltage to allow the system to operate and maintain stability across a greater range of operating points (¶ [31, 37-38]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the system and controller disclosed by Lee to alternate between frequency modulation and duty cycle variation, as taught by Vanin, to operate and maintain stability across a broader range of input voltages to the system. Though Vanin’s alternating between modulation modes is not explicitly taught “to reduce in-rush currents in the battery module” as claimed, it was already established supra that the base reference Lee’s duty cycle modulation is performed to reduce in-rush currents. Thus, Lee’s switching modulation reduces in rush currents already, regardless of the incorporation of frequency modulation. Further, each time the power MOSFET of either Lee or Vanin is turned off, the current in the load path (i.e., the in-rush current) reduces because the voltage supplied decreases. Thenus teaches (see annotated Fig. 7B, included supra) decreasing the frequency (Fig. 7B shows the PFM-controlled frequency decreases at low load currents) of the PWM gate voltage in response to the current in the load path (“load current”) being below the current limit value (when “load current” is below the threshold corresponding to the “high load case”). Thenus further teaches reverting to a previous frequency (Fig. 7b shows the PFM-controlled frequency maxes out at “peak frequency” when load current is in the “high load case”) of the PWM gate voltage in response to the current in the load path (“load current”) being greater than or equal to the current limit value (when above the threshold corresponding to the “high load case”). Thenus further teaches controlling the frequency based on a comparison of the load path current with the current limit value to minimize switching power consumption and improve efficiency at low load currents (¶ [2-3, 24]). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the frequency modulation disclosed by the combo of Lee & Vanin to control the frequency based on a comparison of the current in the load path with the current limit value, as taught by Thenus, to minimize switching power consumption and improve efficiency at low load current. Karlin teaches increasing the duty cycle (Abstract: “step-wise increased output voltage below the predetermined value of charging current”; this increasing output voltage is accomplished by increasing the “variable duty cycle”; col. 7, lines 36-39: “the duty cycle on line 22 is varied to supply the output charging current necessary to support the output charging voltage VO called-for on line 64”; col. 8, line 38: “the pulse output width on line 22 widens) of the PWM gate voltage (col. 7, lines 29-30: “46 operates in a forward current PWM mode with a variable duty cycle”) in response to the current in the load path (“output charging current”) being below the current limit value (“predetermined value of charging current”). Karlin further teaches reverting to a previous duty cycle (per col. 9, lines 1-12, “current limiting foldback” is performed anytime the output current exceeds the “predetermined value of charging current”, wherein the pulse width is reduced; reducing the pulse width results inevitably results in reaching a previous pulse width) of the PWM gate voltage in response to the current in the load path (“output charging current”) being greater than or equal to the current limit value (“predetermined value of charging current”). Karlin further teaches controlling the duty cycle based on comparing the load current with the current limit value to reduce component stress during start up (col. 7, lines 3-10). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the duty cycle modulation disclosed by the combo of Lee, Vanin, & Thenus to control the duty cycle based on a comparison of the current in the load path with the current limit value, as taught by Karlin, to reduce component stress during start up. Regarding Claim 11, the combo of Lee, Vanin, Thenus, & Karlin teaches the system of claim 10. Lee discloses (see annotated Fig. 5a, included supra) the battery module (42) includes a second battery cell (another “52”) having a series connection with the first battery cell (52). Lee further discloses (see annotated Fig. 5b, V02, included supra) activating the power MOSFET (57) converts the series connection (configuration of Fig. 5a) into a parallel connection (configuration of Fig. 5b) for charging the first battery cell (“52” is charged per ¶ [114]: “controller 50 … may configure the battery cells 52 in a parallel configuration during recharging … as shown in Fig. 5b”). Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2012/0256568 A1) in view of Vanin et al. (US 2019/0157975 A1), Thenus et al. (US 2016/0111061 A1), Karlin et al. (US 5,192,905 A), and Eguchi et al. (JP 3312422 B2; hereinafter “Egu”). Regarding Claim 15, the combo of Lee, Vanin, Thenus, & Karlin teaches the system of claim 10. Lee discloses the controller (50) is coupled to the output of a current sensor (“current sensor 49”; Figs. 5a-5c, 6; ¶ [108]) to measure the current in the load path (through “57” + “46”; see annotated Fig. 5, V01, included supra) of the power MOSFET (“57”; see annotated Fig. 5b, V01). Lee does not disclose “the controller is coupled to the output of a voltage sensor to indirectly measure the current in the load path of the power MOSFET”. Egu teaches the controller (combo of “13”, “61”, “72”; Fig. 2) is coupled to the output of a voltage sensor (“current detecting section 3”; Fig. 2; drawn as a differential voltage sensor across shunt resistor “R”) to indirectly measure the current (page 5, 5th paragraph: “3 detects the magnitude of the load current and controls the control pulse generating circuit 43, for example, to limit the load current”) in the load path (through outputs “Eb+” and “Eb-”) of the power MOSFET (22). Egu further teaches the voltage sensor to indirectly measure the current in the load path to improve detection of light load and no-load current levels (page 7, first paragraph). It would have been obvious to one of ordinary skill in the art to modify the system disclosed by the combo of Lee, Vanin, Thenus, & Karlin to incorporate a voltage sensor to indirectly measure the current in the load path, as taught by Egu, to improve detection of light load and no-load current levels. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Daniel P McFarland whose telephone number is (571)272-5952. The examiner can normally be reached Monday-Friday, 7:30 AM - 4:00 PM Eastern. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL P MCFARLAND/ Examiner, Art Unit 2859 /DREW A DUNN/ Supervisory Patent Examiner, Art Unit 2859
Read full office action

Prosecution Timeline

Jan 09, 2023
Application Filed
Sep 29, 2025
Non-Final Rejection — §103, §112, §DP
Dec 23, 2025
Response Filed
Mar 20, 2026
Final Rejection — §103, §112, §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12534119
STACKABLE CHARGING DEVICE FOR SHOPPING CARTS WITH ONBOARD COMPUTING SYSTEMS
2y 5m to grant Granted Jan 27, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
50%
Grant Probability
-50%
With Interview (-100.0%)
3y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 2 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month