DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is made in response to applicant’s amendment filed on 07/01/2026. Claims 21-28, 31 and 32 are currently pending in this application. Claims 21-26 and 31 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species as indicated by the applicant in the RESPONSE TO ELECTION REQUIREMENT, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 08/28/2025. Claims 27, 28 and 32 are considered. An action follows below.
Response to Arguments
In response to the rejections of claims 27, 28 and 32 under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2019/0197949 A1) in the previous Office action dated 04/03/2026, Applicant has amended claim 27 and provided on pages 6-10 of the amendment arguments. In order to best respond, Examiner respectfully directs the applicant to the below new ground of rejection necessitated by the amendment of claim 27.
In response to the request for rejoining and considering the withdrawn claims when the application is in condition for allowance, on page 11 of the amendment, Examiner notes that the withdrawn claims can be considered only when the withdrawn claims including all exact limitations of the allowable claim. For instance, even if claim 27 is assumably allowed, claim 21 and its dependent claims would not be considered for allowance as claim 21 does not include all exact limitations of claim 27.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 27, 28 and 32 are rejected under 35 U.S.C. 112(a), as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, at the time the application was filed, had possession of the claimed invention.
Note that, in order to satisfy its burden under the written description requirement, a patent application must disclose the full scope of the claim. Univ. of Rochester v. G.D. Searle & Co., 358 F.3d 916, 920 (Fed. Cir. 2004) (The purpose of the written description requirement is to “ensure that the scope of the right to exclude, as set forth in the claims, does not overreach the scope of the inventor’s contribution to the field of art as described in the patent specification.”.)
Further, in order to easily recognize the claimed limitations with respect to the original disclosure, the following discussion is directed to the original disclosure corresponding to the elected species III illustrated by Figs. 4 and 6 because the Applicant has indicated claims 27, 28 and 32 read on the elected species III.
As per claim 27, this claim recites a limitation, “the plurality of first GOA units being coupled to the plurality of rows of pixels in a one-to-one correspondence” in lines 6-7. This limitation includes at least feature, “each of the plurality of first GOA units being coupled to only one row of the plurality of rows of pixels in a one-to-one correspondence,” which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. The original disclosure, specifically Fig. 4 of the elected species III, explicitly discloses two first GOA units [031(1), 031(2)] coupled to a first row of pixels, two first GOA units [031(2), 031(3)] coupled to a second row of pixels, two first GOA units [031(3), 031(4)] coupled to a third row of pixels and etc. However, the original disclosure, specifically Fig, 4 of the elected species III, does not explicitly discuss in detail the above feature of the above underlined limitation, so as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. Further, see the above bolded note.
In addition to claim 27, this claim recites a limitation, “the plurality of first GOA units being configured to respectively transmit gate drive signals to the plurality of rows of pixels” in lines 6-8. This limitation includes at least features, (i) “the plurality of first GOA units being configured to respectively transmit a [[first]] gate drive signal to all of the plurality of rows of pixels, the plurality of first GOA units being configured to respectively transmit a [[second]] gate drive signal to the plurality of rows of pixels, the plurality of first GOA units being configured to respectively transmit a [[third]] gate drive signal to the plurality of rows of pixels, and more;” (ii) “the plurality of first GOA units being configured to respectively transmit two [[first and second]] gate drive signals to the plurality of rows of pixels, the plurality of first GOA units being configured to respectively transmit two [[third and fourth]] gate drive signals to the plurality of rows of pixels, and more;” (iii) “the plurality of first GOA units being configured to respectively transmit three [[first, second and third]] gate drive signals to the plurality of rows of pixels, the plurality of first GOA units being configured to respectively transmit three [[fourth, fifth and sixth]] gate drive signals to the plurality of rows of pixels, and more;” and (iv) “a first one of the plurality of first GOA units being configured to respectively transmit two, three, or all of gate drive signals to a first row of the plurality of rows of pixels, a second one of the plurality of first GOA units being configured to respectively transmit two, three, or all of gate drive signals to a second row of the plurality of rows of pixels, a third one of the plurality of first GOA units being configured to respectively transmit two, three, or all of gate drive signals to a third row of the plurality of rows of pixels, and more,” which were not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention.
The original disclosure, specifically Fig, 4 of the elected species III, explicitly discloses each of the plurality of first GOA units [031] configured to transmit only a corresponding gate drive signal to only a corresponding row of the plurality of rows of pixels. However, the original disclosure, specifically Fig, 4 of the elected species III, does not explicitly discuss in detail the above features of the above underlined limitation, so as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. Further, see the above bolded note.
In addition to claim 27, this claim recites a limitation, “the plurality of second GOA units being configured to respectively transmit light emission control signals to the plurality of groups of pixels” in lines 11-13. This limitation includes at least features, (i) “the plurality of second GOA units being configured to respectively transmit a [[first]] light emission control signal to all of the plurality of groups of pixels, the plurality of second GOA units being configured to respectively transmit a [[second]] light emission control signal to the plurality of groups of pixels, the plurality of second GOA units being configured to respectively transmit a [[third]] light emission control signal to the plurality of groups of pixels, and more;” (ii) “the plurality of second GOA units being configured to respectively transmit two [[first and second]] light emission control signals to the plurality of groups of pixels, the plurality of second GOA units being configured to respectively transmit two [[third and fourth]] light emission control signals to the plurality of groups of pixels, and more;” (iii) “the plurality of second GOA units being configured to respectively transmit three [[first, second and third]] light emission control signals to the plurality of groups of pixels, the plurality of second GOA units being configured to respectively transmit three [[fourth, fifth and sixth]] light emission control signals to the plurality of groups of pixels, and more;” and (iv) “a first one of the plurality of first GOA units being configured to respectively transmit two, three, or all of gate drive signals to a first group of the plurality of groups of pixels, a second one of the plurality of second GOA units being configured to respectively transmit two, three, or all of light emission control signals to a second group of the plurality of groups of pixels, a third one of the plurality of second GOA units being configured to respectively transmit two, three, or all of light emission control signals to a third group of the plurality of groups of pixels, and more,” which were not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention.
The original disclosure, specifically Fig, 4 of the elected species III, explicitly discloses each of the plurality of second GOA units [041] configured to transmit only a corresponding light emission control signal to only a corresponding group of the plurality of groups of pixels. However, the original disclosure, specifically Fig, 4 of the elected species III, does not explicitly discuss in detail the above features of the above underlined limitation, so as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. Further, see the above bolded note.
As per claims 28 and 32, these claims are therefore rejected for at least the reasons set forth in claim 27.
Notice to Applicant(s)
Examiner notes that the specification is not the measure of invention. Therefore, limitations contained therein can’t be read into the claims for the purpose of avoiding the prior art. See In re Sporck, 55 CCPA 743, 386 F.2d 924, 155 USPQ 687 (1968).
Further, the names/ terms of the features/elements used in the instant application or instant claims may be different from the names/terms of the matching features/ elements of the prior arts; however, the matching features/ elements of the prior arts contain all characteristics/ functions of the features/elements DEFINED by the pending claims.
Note that in order to avoid confusion, the below citations in the below rejection(s) are mere one or more places in the reference to disclose the "claimed" limitation(s) and/or are directed to one or more of embodiments disclosed by the cited reference(s). In other words, the “claimed” features/limitations may be read in other places in the reference or other embodiments of the reference. In order to better understand how the claimed limitations are taught by the reference(s), a review of the entire reference(s) is suggested by the examiner. Applicant is reminded a prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention as not all relevant paragraphs may have been cited in the rejection. W.L. Gore & Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 220 USPQ 303 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 27, 28 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2019/0197949 A1; hereinafter Kim.)
As per claim 27, Kim discloses a display panel (100; see at least Fig. 16) comprising:
a substrate [101], comprising a display region [DA/AA3] and a gate-driver-on-array (GOA) region [NA1, NA2] partially surrounding the display region (see at least Fig. 16;)
a plurality of rows of pixels [PXL3] disposed in the display region (see at least Fig. 16, disclosing a plurality of rows of pixels [PXL3] disposed in the display region AA3 and comprising a first row of pixels connected to the scan line S31 and the emission control line E31; a second row of pixels connected to the scan line S32 and the emission control line E32; and etc.;)
a first GOA circuit [110a, 110b] disposed in the GOA region and comprising a plurality of cascaded GOA units [SST31, SST32, SST33, SST34 …] being coupled to the plurality of rows of pixels in the display region [AA3] and being configured to respectively transmit gate drive signals to the plurality of rows of pixels (see at least Fig. 16;) and
a second GOA circuit [120a, 120b] disposed in the GOA region (see at least Figs. 16, 19, 20; ¶¶ 111- 112,) wherein the second GOA circuit comprises a plurality of cascaded second GOA units [EST31, EST32 …], the plurality of second GOA units being coupled to a plurality of groups of pixels in a one-to-one correspondence and being configured to respectively transmit light emission control signals to the plurality of groups of pixels, and each of the plurality of groups of pixels comprising two adjacent rows of pixels (see at least Figs. 16, 19, 20; ¶¶ 114-115, disclosing the rows of pixels [PXL3] in the display region AA3 grouped into a plurality of groups, a first group comprising two adjacent rows of pixels [the above-construed first and second rows of pixels], a second group comprising two adjacent rows of pixels [the above-construed third and fourth rows of pixels] and etc.; the second GOA circuit comprises a plurality of cascaded second GOA units [EST31, EST32 …]; a second GOA unit [EST31 in Fig. 19] disposed on the left side, coupled to the first group of pixels, and configured to transmit a light emission control signal [E31/E32] to the first group of pixels; a second GOA unit [EST32 in Fig. 20] disposed on the right side, coupled to the second group of pixels, and configured to transmit a light emission control signal [E33/E34] to the second group of pixels; a second GOA unit [EST33 in Fig. 19] disposed on the left side, coupled to the third group of pixels, and configured to transmit a light emission control signal [E35/E36] to the third group of pixels, a second GOA unit [EST34 in Fig. 20] disposed on the right side, coupled to the fourth group of pixels, and configured to transmit a light emission control signal [E37/E38] to the fourth group of pixels; note that the above-discussed elements [EST31, EST32, EST33, EST34 …] correspond to the claimed second GOA units and some of others of the elements [EST31, EST32, EST33, EST34 …] do not correspond to the claimed second GOA units,)
wherein the plurality of rows of pixels have a first/left side and a second/right side that are opposite in a row direction (see the above discussion or see at least Fig. 16,) in the plurality of GOA units [SST31, SST32, SST33, SST34 …], some of the GOA units [SST31, SST32, SST33, SST34 …] correspondingly coupled to even rows of pixels are disposed on the first/left side (see at least Figs. 16, 17,) and some of the GOA units correspondingly coupled to odd rows of pixels are disposed on the second side (see the above discussion; or see at least Figs. 16, 18,) and in the plurality of second GOA units, second GOA units correspondingly coupled to odd groups of pixels are disposed on the first side (see the above discussion; or see at least Figs. 16, 19,) and second GOA units correspondingly coupled to even groups of pixels are disposed on the second/right side (see the above discussion; or see at least Figs. 16, 20.)
Kim, as discussed above, discloses the first GOA circuit [110a, 110b] comprising the plurality of GOA units [SST31, SST32, SST33, SST34 …], instead of a plurality of first GOA units, as claimed.
Kim further discloses each of the GOA units [SST31, SST32, SST33, SST34 …] connected to two rows of pixels and transmitting the same gate drive signal to the two rows of pixels (see Figs. 16 and 18, disclosing that: on the right side of the display area [DA], the GOA unit [SST31] is connected to first and second rows of pixels and transmits the same gate drive signal [S31] to the first and second rows of pixels and the GOA unit [SST32] is connected to the second and third rows of pixels and transmits the same gate drive signal [S32] to the second and third rows of pixels; see Figs. 16 and 18, disclosing that: on the left side of the display area [DA], the GOA unit [SST31] is connected to first and second rows of pixels and transmits the same gate drive signal [S31] to the first and second rows of pixels and the GOA unit [SST32] is connected to the second and third rows of pixels and transmits the same gate drive signal [S32] to the second and third rows of pixels.) In other words, Kim discloses each of the GOA units comprising a common circuit/element for transmitting the same gate drive signal to the two rows of pixels, instead of each GOA unit comprising two same circuits/elements, each separately transmitting a gate drive signal to a row of pixels. For instance, Kim, as discussed above or at least Figs. 16 and 18, discloses the GOA unit [SST31] on the right side of the display area [DA] connected to the first and second rows of pixels and transmitting the same gate drive signal [S31] to the first and second rows of pixels, but is silent to the GOA unit [SST31] on the right side of the display area [DA] comprising two same circuits/elements, one separately transmitting a gate drive signal to the first row of pixels and another separately transmitting the same gate drive signal to the second row of pixels.
Furthermore, a modification which would have involved a mere change in the duplication of parts for a multiple effect was judicially recognized as being within the level of ordinary skill in the art, see In St. Regis Paper Co. v. Bemis Co., Inc., 193 USPQ 8, 11 (7th Cir. 1977).
Therefore, while Kim may not exemplify a duplication of each of the above-discussed GOP units so as to obtain the same predictable result of transmitting the same gate drive signal to two rows of pixels, one of ordinary skill in the art at the time before the effective filing date of invention of the pending application would have readily duplicated each of the above-discussed GOP units of Kim to obtain two separate same GOP units for the same predictable result of transmitting the same gate drive signal to two rows of pixels.
The above modified Kim obviously renders: a first GOA circuit [110a, 110b] disposed in the GOA region (see at least Fig. 16,) wherein the first GOA circuit comprises a plurality of cascaded GOA units, each GOA unit [SST31/ SST32 SST33/ SST34 …] being duplicated to form two GOA elements, e.g., the GOA unit [SST31 of 110b shown in Fig. 18] forming two GOA elements [assumed SST31a and SST31b], the GOA element [SST31a] [[this element corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S31 to the first row of pixels and the GOA element [SST31b] [[this element not corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S31 to the second row of pixels (see Figs. 16, 18 in light of the above modification/ duplication); the GOA unit [SST32 of 110b shown in Fig. 18] forming two GOA elements [assumed SST32a and SST32b], the GOA element [SST32a] [[this element not corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S32 to the second row of pixels and the GOA element [SST32b] [[this element corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S32 to the third row of pixels (see Figs. 16, 18 in light of the above modification/ duplication); the GOA unit [SST31 of 110a shown in Fig. 17] forming two GOA elements [assumed SST31a and SST31b], the GOA element [SST31a] [[this element not corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S31 to the first row of pixels and the GOA element [SST31b] [[this element not corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S31 to the second row of pixels (see Figs. 16, 17 in light of the above modification/duplication); the GOA unit [SST32 of 110a shown in Fig. 17] forming two GOA elements [assumed SST32a and SST32b], the GOA element [SST32a] [[this element corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S32 to the second row of pixels and the GOA element [SST32b] [[this element not corresponding to one of the claimed first GOA units]] connected and transmitting the gate drive signal S32 to the third row of pixels (see Figs. 16, 17 in light of the above modification/duplication).
Accordingly, the above modified Kim, as discussed above, obviously renders the plurality of first GOA units, as claimed, and specifically, the limitations, “wherein the first GOA circuit comprises a plurality of cascaded first GOA units, each of the plurality of first GOA units being coupled to the plurality of rows of pixels in a one-to-one correspondence and being configured to respectively transmit gate drive signals to the plurality of rows of pixels” and “wherein the plurality of rows of pixels have a first side and a second side that are opposite in a row direction, in the plurality of first GOA units, first GOA units correspondingly coupled to even rows of pixels are disposed on the first side, and first GOA units correspondingly coupled to odd rows of pixels are disposed on the second side”
As per claim 28, Kim discloses: wherein the first GOA units and the second GOA units that are disposed on the first side are successively arranged in a column direction in an order of one second GOA unit followed by two first GOA units (see the discussion in the rejection of claim 27; further Figs. 16, 17 and 19 further showing, on the first/left side, the second GOA unit [EST31] successively followed by two first GOA units in a column direction;) and the first GOA units and the second GOA units that are disposed on the second side are successively arranged in the column direction in an order of two first GOA units followed by one second GOA unit (see the discussion in the rejection of claim 27; further Figs. 16, 18 and 20 further showing, on the right/left side, two first GOA units successively followed by the second GOA unit [EST32] the column direction.)
As per claim 32, Kim discloses a display device (see at least Abstract, ¶ 4) comprising: a power supply component (see at least ¶¶ 51, 72, 77, disclosing a power supply component providing various driving power sources including at least a first power source ELVDD, a second power source ELVSS, and an initialization power source Vint) and the display panel as defined in claim 27 (see the rejection of claim 27,) wherein the power supply component is coupled to the display panel and is configured to supply power to the display panel (see at least ¶¶ 51, 72, 77.)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jimmy H Nguyen whose telephone number is (571) 272-7675. The examiner can normally be reached on Monday-Friday 8:30AM-6PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae, can be reached at (571) 272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Jimmy H Nguyen/
Primary Examiner, Art Unit 2626
Prosecution Insights