DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/18/2026 has been entered.
Claims 21-28, 31 and 32 are currently pending in this application. Claims 21-26 and 31 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species as indicated by the applicant in the RESPONSE TO ELECTION REQUIREMENT, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 08/28/2025. Claims 27, 28 and 32 are considered. An action follows below.
Response to Arguments
The rejection of claims 27, 28 and 32 under 35 U.S.C. 112(a) in the previous Office action dated 12/18/2025 has been withdrawn in light of the amendment to claim 27.
In response to the rejections of claims 27, 28 and 32 under 35 U.S.C. 102(a(1) as being anticipated by Kim et al. (US 2019/0197949 A1) in the previous Office action, Applicant has amended claim 27 and provided on pages 7-10 of the amendment arguments, which have been fully considered but they are not persuasive as follows:
(i) The argument, “On one hand … Kim discloses that the first GOA circuits (110a, 110b) disposed on both sides jointly drive the pixels through the first GOA units, but does not disclose, teach, or suggest that the first GOA units (SST11, SST12, SST31, SST32 included in the first GOA circuit 110a as shown in Fig. 17 of Kim) on the first side are correspondingly coupled to even rows of pixels, and that the first GOA units (SST21, SST22, SST31, SST32 included in the first GOA circuit 110b as shown in Fig. 18 of Kim) on the second side disposed are correspondingly coupled to odd rows of pixels” on page 8 of the amendment, is not persuasive because the current claim 27 does not require each row of pixels only coupled to only a corresponding one of the cascaded first GOA units, each of all of the cascaded first GOA units on the first/left side correspondingly coupled to only a corresponding one of the even rows of pixels, and each of all of the cascaded first GOA units on the second/right side correspondingly coupled to only a corresponding one of odd rows of pixels. Examiner notes that the claimed first GOA units are mapped to the elements [SST31, SST32, SST33, SST34 …] associated with the pixels [PXL3] in the [[third]] region [AA3], but not to the elements [SST11, SST12, SST21, SST22 …] associated with the pixels [PXL1, PXL2] in the regions [AA1, AA2]. See the below detailed rejection.
(ii) The argument, “On the other hand … Kim discloses that the second GOA circuits (120a, 120b) disposed on both sides jointly drive the pixels through the second GOA units, but does not disclose, expressly or inherently, that the second GOA units (EST 11, EST12, EST31, EST32 included in the second GOA circuit 120a as shown in Fig. 19 of Kim) on the first side are correspondingly coupled to odd groups of pixels, and that the second GOA units (EST21, EST22, EST31, EST32 included in the second GOA circuit 120b as shown in Fig. 20 of Kim) on the second side are correspondingly coupled to even groups of pixels” on pages 8-9 of the amendment, is not persuasive because the current claim 27 does not require each group of pixels only coupled to only a corresponding one of the cascaded second GOA units, each of all of the cascaded second GOA units on the first/left side correspondingly coupled to only a corresponding one of odd groups of pixels, and each of all of the cascaded second GOA units on the second/right side correspondingly coupled to only a corresponding one of even groups of pixels. Examiner notes that the claimed second GOA units are mapped to the elements [EST31, EST32, EST33, EST34 …] associated with the pixels [PXL3] in the [[third]] region [AA3], but not to the elements [EST11, EST12, EST21, EST22 …] associated with the pixels [PXL1, PXL2] in the regions [AA1, AA2]. See the below detailed rejection.
Notice to Applicant(s)
Examiner notes that the specification is not the measure of invention. Therefore, limitations contained therein can’t be read into the claims for the purpose of avoiding the prior art. See In re Sporck, 55 CCPA 743, 386 F.2d 924, 155 USPQ 687 (1968).
Further, the names/ terms of the features/elements used in the pending application or pending claims may be different from the names/terms of the matching features/ elements of the prior arts; however, the matching features/ elements of the prior arts contain all characteristics/ functions of the features/elements DEFINED by the pending claims.
Note that in order to avoid confusion, the below citations in the below rejection(s) are mere one or more places in the reference to disclose the "claimed" limitation(s) and/or are directed to one or more of embodiments disclosed by the cited reference(s). In other words, the “claimed” features/limitations may be read in other places in the reference or other embodiments of the reference. In order to better understand how the claimed limitations are taught by the reference(s), a review of the entire reference(s) is suggested by the examiner. Applicant is reminded a prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention as not all relevant paragraphs may have been cited in the rejection. W.L. Gore & Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 220 USPQ 303 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 27, 28 and 32 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2019/0197949 A1; hereinafter Kim.)
As per claim 27, Kim discloses a display panel (100; see at least Fig. 16) comprising:
a substrate [101], comprising a display region [DA/AA3] and a gate-driver-on-array (GOA) region [NA1, NA2] partially surrounding the display region (see at least Fig. 16;)
a plurality of rows of pixels [PXL3] disposed in the display region (see at least Fig. 16, disclosing a plurality of rows of pixels [PXL3] disposed in the display region AA3 and comprising a first row of pixels connected to the scan line S31 and the emission control line E31; a second row of pixels connected to the scan line S32 and the emission control line E32; and etc.;)
a first GOA circuit [110a, 110b] disposed in the GOA region (see at least Fig. 16,) wherein the first GOA circuit comprises a plurality of cascaded first GOA units (see at least Figs. 16-18, disclosing the first GOA circuit comprises a plurality of cascaded first GOA units [SST31, SST32, SST33, SST34 …],) each of the plurality of first GOA units being coupled to one row of pixels and being configured to transmit a gate drive signal to the one row of pixels (see at least Figs. 16-18, disclosing each of the first GOA units [SST31, SST32 …] being coupled to one row of the pixels and being configured to transmit a gate drive signal [a scan signal] to the one row of the pixels, e.g., a first GOA unit [SST31 of the element 110b on the right side of the rows of pixels; see Fig. 18] being coupled to a first row of the pixels in the display region [AA3] and being configured to transmit a gate drive signal [a scan signal S31] to the first row of the pixels in the display region [AA3]; a first GOA unit [SST32 of the element 110a on the left side of the rows of pixels; see Fig. 17] being coupled to a second row of the pixels in the display region [AA3] and being configured to transmit a gate drive signal [a scan signal S32] to the [[second]] row of the pixels in the display region [AA3]; a first GOA unit [SST33 of the element 110b on the right side of the rows of pixels; see Fig. 18] being coupled to a third row of the pixels in the display region [AA3] and being configured to transmit a gate drive signal [a scan signal S33] to the third row of the pixels in the display region [AA3]; a first GOA unit [SST34 of the element 110a on the left side of the rows of pixels; see Fig. 17] being coupled to a fourth row of the pixels in the display region [AA3] and being configured to transmit a gate drive signal [a scan signal S34] to the fourth row of the pixels in the display region [AA3]; and etc.;) and
a second GOA circuit [120a, 120b] disposed in the GOA region (see at least Figs. 16, 19, 20; ¶¶ 111- 112,) wherein the second GOA circuit comprises a plurality of cascaded second GOA units [EST31, EST32 …], each of the plurality of second GOA units being coupled to a group of pixels and being configured to transmit a light emission control signal to the group of pixels, and the group of pixels comprising two adjacent rows of pixels (see at least Figs. 16, 19, 20; ¶¶ 114-115, disclosing the rows of pixels [PXL3] in the display region AA3 grouped into a plurality of groups, a first group comprising two adjacent rows of pixels [the above-construed first and second rows of pixels], a second group comprising two adjacent rows of pixels [the above-construed third and fourth rows of pixels] and etc.; the second GOA circuit comprises a plurality of cascaded second GOA units [EST31, EST32 …]; a second GOA unit [EST31 in Fig. 19] disposed on the left side, coupled to the first group of pixels, and configured to transmit a light emission control signal [E31/E32] to the first group of pixels; a second GOA unit [EST32 in Fig. 20] disposed on the right side, coupled to the second group of pixels, and configured to transmit a light emission control signal [E33/E34] to the second group of pixels; a second GOA unit [EST33 in Fig. 19] disposed on the left side, coupled to the third group of pixels, and configured to transmit a light emission control signal [E35/E36] to the third group of pixels, a second GOA unit [EST34 in Fig. 20] disposed on the right side, coupled to the fourth group of pixels, and configured to transmit a light emission control signal [E37/E38] to the fourth group of pixels,)
wherein the plurality of rows of pixels have a first/left side and a second/right side that are opposite in a row direction (see the above discussion or see at least Fig. 16,) in the plurality of first GOA units, first GOA units correspondingly coupled to even rows of pixels are disposed on the first/left side (see the above discussion; or see at least Figs. 16, 17,) and first GOA units correspondingly coupled to odd rows of pixels are disposed on the second side (see the above discussion; or see at least Figs. 16, 18,) and in the plurality of second GOA units, second GOA units correspondingly coupled to odd groups of pixels are disposed on the first side (see the above discussion; or see at least Figs. 16, 19,) and second GOA units correspondingly coupled to even groups of pixels are disposed on the second/right side (see the above discussion; or see at least Figs. 16, 20.)
As per claim 28, Kim discloses: wherein the first GOA units and the second GOA units that are disposed on the first side are successively arranged in a column direction in an order of one second GOA unit followed by two first GOA units (see the discussion in the rejection of claim 27; further Figs. 16, 17 and 19 further showing, on the first/left side, the second GOA unit [EST31] successively followed by two first GOA units [SST32, SST34] in a column direction;) and the first GOA units and the second GOA units that are disposed on the second side are successively arranged in the column direction in an order of two first GOA units followed by one second GOA unit (see the discussion in the rejection of claim 27; further Figs. 16, 18 and 20 further showing, on the right/left side, two first GOA units [SST31, SST33] successively followed by the second GOA unit [EST32] the column direction.)
As per claim 32, Kim discloses a display device (see at least Abstract, ¶ 4) comprising: a power supply component (see at least ¶¶ 51, 72, 77, disclosing a power supply component providing various driving power sources including at least a first power source ELVDD, a second power source ELVSS, and an initialization power source Vint) and the display panel as defined in claim 27 (see the rejection of claim 27,) wherein the power supply component is coupled to the display panel and is configured to supply power to the display panel (see at least ¶¶ 51, 72, 77.)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jimmy H Nguyen whose telephone number is (571) 272-7675. The examiner can normally be reached on Monday-Friday 8:30AM-6PM.
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/Jimmy H Nguyen/
Primary Examiner, Art Unit 2626