Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed by the Applicant on 3/13/26 is acknowledged.
Specification
The amendment filed 3/13/26 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows, from claim 1:
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The recitation is broken down as:
plurality of third signal lines comprise data lines
two fourth signal lines-comprise first and second power supply line
orthographic projection of first power supply line covers/overlapped with plurality of data lines
orthographic projection of second power supply line is not overlapped with data lines
The disclosure indicates the overlapped/not overlapped feature of the power line with respect to the data line as claimed, in the following paragraphs (Applicant’s US Publication US 20240258327 A1) in:
[0122] The orthographic projection of the data line DL1 to data line DL3 and the initial signal line INIT located in the third conductive layer on the substrate may overlap with the orthographic projection of the light emitting control line EML(n), the first scan line SL1(n), the second scan line SL2(n), the first power connection line 601 and the second power connection line 602 located in the first conductive layer on the substrate.
[0165] In some examples, as shown in FIG. 15 and FIG. 16, the orthographic projection of a fourth signal line 122 (e.g., a first power supply line) on the substrate may cover the orthographic projection of a plurality of third signal lines (e.g., a plurality of data lines electrically connected to the three pixel units P) on the substrate, and the orthographic projection of another fourth signal line 122 (e.g., a second power supply line) on the substrate may not overlap with the orthographic projection of a plurality of third signal lines on the substrate. However, this embodiment is not limited thereto. In some other examples, the orthographic projections of the two fourth signal lines on the substrate may both overlap with the orthographic projection of the plurality of third signal lines on the substrate.
[0174] In some examples, as shown in FIGS. 17 and 18, the orthographic projection of one of the fourth signal lines 122 (e.g., the first power supply line) of each set of second traces 12 on the substrate may cover the orthographic projection of a plurality of third signal lines (e.g., a plurality of data lines electrically connected to a pixel unit P) on the substrate , and the orthographic projection of another fourth signal line 122 (e.g., the second power supply line) on the substrate may not overlap with the orthographic projection of the plurality of third signal lines on the substrate, and the orthographic projection of the fourth signal line 122 (e.g., the second power supply line) on the substrate may overlap with the orthographic projection of the second line segments of the plurality of first signal lines 111 on the substrate. However, this embodiment is not limited thereto. In other examples, the orthographic projection of each fourth signal line on the substrate may each overlap with the orthographic projection of the plurality of third signal lines on the substrate.
Therefore, none of the above paragraphs explicitly disclose: item 4. above that is, orthographic projection of second power supply line is not overlapped with data lines
Plurality of third signal lines comprise data lines but disclosure does not explicitly disclose, that those signal lines that are data lines fulfill item 4. above, that is orthographic projection of second power supply line is not overlapped with data lines
Applicant is required to cancel the new matter in the reply to this Office Action.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-5, 7, 9-12, 15-19 and 21-22 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
In claim 1, the limitation of:
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is not supported by the original disclosure is as follows:
Plurality of third signal lines comprise data lines
two fourth signal lines-comprise first and second power supply line
orthographic projection of first power supply line covers/overlapped with plurality of data lines
orthographic projection of second power supply line is not overlapped with data lines
The disclosure indicates the overlap/not overlap of the power line with respect to the data line as claimed, in the following paragraphs (Applicant’s US Publication US 20240258327 A1) in:
[0122] The orthographic projection of the data line DL1 to data line DL3 and the initial signal line INIT located in the third conductive layer on the substrate may overlap with the orthographic projection of the light emitting control line EML(n), the first scan line SL1(n), the second scan line SL2(n), the first power connection line 601 and the second power connection line 602 located in the first conductive layer on the substrate.
[0165] In some examples, as shown in FIG. 15 and FIG. 16, the orthographic projection of a fourth signal line 122 (e.g., a first power supply line) on the substrate may cover the orthographic projection of a plurality of third signal lines (e.g., a plurality of data lines electrically connected to the three pixel units P) on the substrate, and the orthographic projection of another fourth signal line 122 (e.g., a second power supply line) on the substrate may not overlap with the orthographic projection of a plurality of third signal lines on the substrate. However, this embodiment is not limited thereto. In some other examples, the orthographic projections of the two fourth signal lines on the substrate may both overlap with the orthographic projection of the plurality of third signal lines on the substrate.
[0174] In some examples, as shown in FIGS. 17 and 18, the orthographic projection of one of the fourth signal lines 122 (e.g., the first power supply line) of each set of second traces 12 on the substrate may cover the orthographic projection of a plurality of third signal lines (e.g., a plurality of data lines electrically connected to a pixel unit P) on the substrate , and the orthographic projection of another fourth signal line 122 (e.g., the second power supply line) on the substrate may not overlap with the orthographic projection of the plurality of third signal lines on the substrate, and the orthographic projection of the fourth signal line 122 (e.g., the second power supply line) on the substrate may overlap with the orthographic projection of the second line segments of the plurality of first signal lines 111 on the substrate. However, this embodiment is not limited thereto. In other examples, the orthographic projection of each fourth signal line on the substrate may each overlap with the orthographic projection of the plurality of third signal lines on the substrate.
Therefore, none of the above paragraphs explicitly disclose: item 4. above that is, orthographic projection of second power supply line is not overlapped with data lines
Plurality of third signal lines comprise data lines but disclosure does not explicitly disclose, that those signal lines that are data lines fulfill item 4. above, that is orthographic projection of second power supply line is not overlapped with data lines.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the Proir art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 7,9,12,17-18 and 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over Hong (US 20220165836 A1, cited by Applicant) in view of Ikeda et al (US 12087894 B2)
Regarding claim 1, Hong teaches a transparent display panel 100 (Fig.1), comprising: a substrate 111 (Fig.1-3), a plurality of repeating units (the entire sections that are repeated in and around pixels P1,P2) arranged in an array on said substrate, wherein, a repeating unit comprises a non-transmissive region (pixels P1 and P2) and a plurality of transmissive sub-regions (regions external to P1,P2 and the central portion indicated by TA), adjacent transmissive sub-regions are spaced apart by a non-transmissive region,
said non-transmissive region comprises at least one pixel unit (unit pixels UP1) and N sets of first traces SL1 (first signal line portion [0048]-[0052]) extending in a first direction and M sets of second traces SL2 (second signal line portion SL2 in [0048]) extending in a second direction electrically connected to said at least one pixel unit , said first direction intersects said second direction, both N and M are positive integers, and N and M are not both greater than 1 (such as SL1-1 of SL1 maybe just one in [0064]-[0065]; also see [0050] For example, the first signal line portion SL1 may include a sensing scan line, also further, it is optional for SL1 to be single or multiple lines such as disclosed in [0051]; therefore it is a design choice in the number of wiring lines in the first and second traces).
Hong does not teach:
at least one set of first traces comprises a plurality of first signal lines and two second signal lines, the two second signal lines comprise a first power supply line and a second power supply line, an orthographic projection of the second power supply line on the substrate covers orthographic projections of the plurality of first signal lines on the substrate, and an orthographic projection of the first power supply line on the substrate is not overlapped with the orthographic projections of the plurality of first signal lines on the substrate;
( - -or, at least one set of second traces comprises a plurality of third signal lines and two fourth signal lines, the plurality of third signal lines comprises a plurality of data lines connected with the at least one pixel unit, the two fourth signal lines comprise a first power supply line and a second power supply line; an orthographic projection of the first power supply line on the substrate covers orthographic projections of the plurality of data lines on the substrate; and an orthographic projection of the second power supply line is not overlapped with the orthographic projections of the plurality of data lines - -; see Objection and 112 rejection above).
Ikeda discloses in its claim 9:
A display device comprising: a substrate; pixels including a first pixel and a second pixel disposed on the substrate; inorganic light emitting elements provided in the respective pixels; signal lines configured to supply a signal to the pixels, the signal lines including a first signal line and a second signal line; and power supply lines configured to supply a power supply potential to the pixels, the power supply lines including a first power supply line and a second power supply line, wherein the first signal line is provided in a layer different from a layer of the first power supply line in the first pixel, the second signal line and the second power supply line are provided in the same layer in the second pixel, the first signal line is provided overlapping the first power supply line in planar view seen from a direction perpendicular to the substrate in the first pixel and extends in a same direction in which the first power supply line extends, and the second signal line and the second power supply line are provided side by side in the planar view in the second pixel;
(note that “side by side” and “layer different from a layer of …” refer to not overlapping as claimed).
(also see claims 9 and 10 of Ikeda)
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use the configuration as disclosed in Ikeda, in the device of Anh, in order to prevent color mixture (from teachings of Ikeda).
Regarding claim 7, with the various design options provided (in Hong: wiring lines SL1 and SL2 in [0048]-[0059]) in Hong in view of Ikeda wherein multiple design options are provided and it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to form the wiring lines in the device of Hong in view of Ikeda wherein both N and M are 1; in order to optimize the space management.
Regarding claim 9, Hong in view of Ikeda teaches a transparent display panel, wherein said plurality of first signal lines of said set of first traces comprise a scan line, a light emitting control line, a first power connection line, and a second power connection line, said first power connection line is electrically connected to said first power supply line of the two fourth signal lines, and said second power connection line is electrically connected to said second power supply line ([0059] in Hong and scan line, light emission control line, pixel power line, common power line, sensing scan lines corresponding to the power lines and emitting control line in the claim).
Regarding claim 12, Hong in view of Ikeda teaches a transparent display panel, wherein said plurality of first signal lines comprise at least one scan line ([0059] in Hong) and at least one light emitting control line that are electrically connected to said at least one pixel unit ([0059] in Hong).
Regarding claim 17, Hong in view of Ikeda teaches a transparent display panel, wherein a first voltage signal provided by said first power supply line of the two fourth signal lines is greater than a second voltage signal provided by said second power supply line of the two fourth signal lines, wherein the first and second voltage is drawn to the intended use and a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations.
Regarding claim 18, Hong in view of Ikeda teaches a transparent display panel, wherein said repeating unit is a quadrilateral (see 4 quadrant segments below).
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Regarding claim 21, Hong in view of Ikeda teaches a transparent display panel, wherein said at least one pixel unit comprises a plurality of sub-pixels emitting different colors, each sub-pixel comprises a light emitting element and a pixel circuit electrically connected to said light emitting element, and an orthographic projection of the light emitting element of said sub-pixel on said substrate overlaps with an orthographic projection of the electrically connected pixel circuit on said substrate (claim 6 of Hong; and [0021],[0022],[0136]-[0138],[0168]).
Regarding claim 22, Hong in view of Ikeda teaches a display apparatus, comprising the transparent display panel (Title of Hong).
Claims 10, 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Hong in view of Ikeda and further in view of Hwang (US 20170345877 A1, cited previously)
Regarding claim 10, Hong in view of Ikeda teaches the invention set forth in claim 8 above, but is silent regarding a shift-scan circuit, wherein an orthographic projection of said at least two fourth signal lines on said substrate overlaps with an orthographic projection of said shift-scan circuit on said substrate.
Hwang teaches a shift-scan circuit ([0067] and Fig.1) wherein it discloses:
As shown in FIG. 2, the scan driver 200 may include a plurality of scan shift registers 220 and a plurality of clock signal lines CLK connected to the plurality of scan shift registers 220. In an embodiment, the plurality of clock signal lines CLK may be disposed to overlap the scan shift registers 220. When the plurality of clock signal lines CLK are disposed to overlap the plurality of scan shift registers 220, the bezel area of the display device 1000 may be reduced.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to form the shift can circuits, as disclosed in Hwang, in the device of Hong in view of Ikeda in order to reduce the area of the device (see in Hwang: the bezel area of the display device 1000 may be reduced).
Regarding claim 16, Hong in view of Ikeda and Hwang teaches a transparent display panel, wherein said at least one pixel unit comprises a plurality of sub-pixels emitting different colors, each sub-pixel comprises a light emitting element and a pixel circuit electrically connected to said light emitting element, a first electrode of said light emitting element is electrically connected to said pixel circuit via an anode pad, a second electrode of said light emitting element is electrically connected to a cathode pad, and said cathode pad and said second power supply line of the two fourth signal lines are an integrated structure (see in Hwang: Abstract, [0015],[0023] and [0068]).
Regarding claim 19, Hong in view of Ikeda teaches: said non-transmissive region comprises two pixel units (EA1, EA3 in Fig.5 of Hong), a set of first traces and two sets of second traces (DL1,DL2 in Fig.11, at least one first signal line of the plurality of first signal lines comprises a first line segment (EML1 in Fig.11 of Hong) extending in said first direction and a second line segment (EML2) extending in said second direction that are connected sequentially,
each of two sets of second traces comprises a plurality of third traces and at least one fourth trace, an orthographic projection of said at least one fourth trace on said substrate overlaps with an orthographic projection of second line segments of said plurality of first signal lines on said substrate but does not teach and said two-pixel units are arranged in said first direction and are misaligned.
Hwang teaches non-transmissive region comprises two-pixel units (Fig.3), two pixel units are arranged in said first direction and are misaligned (pixels SP1 in the horizontal direction).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to form the misaligned pixels, as disclosed in Hwang, in the device of Hong in view of Ikeda in order to minimize crosstalk ([0118] in Hwang).
Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Hong in view of Ikeda and further in view of Shi (US 20210408203 A1)
Regarding claim 2, Hong in view of Ikeda teaches the invention set forth in claim 1 above, but is silent regarding: a width of said two second signal line in said second direction is larger than a width of said plurality of first signal lines in said second direction.
Shi discloses: a width of said two second signal line in said second direction is larger than a width of said plurality of first signal lines in said second direction ([0174]) and it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use the widths, as disclosed in Shi, in the device of Hong in view of Ikeda, in order to facilitate the transmission of the driving voltage ([0174] in Shi).
Regarding claim 3, Hong in view of Ikeda and Shi teaches a transparent display panel, wherein at least one second signal line of the two second signal lines is located on a side of said plurality of first signal lines away from said substrate ([0014],[0046],[0101] and [0179] in Shi).
Regarding claim 4, from the teachings of Hong in view of Ikeda and Shi (see rejection in claim 2 above), it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use the widths, in the device of Hong in view of Ikeda and Shi (from the teachings of Shi), in order to facilitate the transmission of the driving voltage ([0174] in Shi).
Regarding claim 5, Hong in view of Ikeda and Shi teaches a transparent display panel, wherein said .
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Hong in view of Ikeda and Hwang and further in view of Kwon (US 20210320228 A1, cited previously)
Regarding claim 11, Hong in view of Ikeda and Hwang teaches the invention set forth in claim 8 above, but is silent regarding the non-transmissive region of said repeating unit comprises three-pixel units arranged sequentially in said first direction, said set of second traces are adjacent to a second pixel unit.
Kwon teaches a display device where in a repeating unit comprises three-pixel units arranged sequentially in said first direction, said set of second traces are adjacent to a second pixel unit (pixels DA in Fig.1).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to form the arrangement disclosed in Kwon, in the device of Hong in view of Ikeda and Hwang, in order to achieve higher transmittance and aperture ratio ([0053]).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Hong in view of Ikeda and further in view of Li (US 20220013067 A1)
Regarding claim 15, Hong in view of Ikeda teaches:
an orthographic projection of said
second power supply line of the two fourth signal lines on said substrate
overlaps with an orthographic projection of said at least one pixel unit on said substrate (Abstract, Fig.4 and [0045] in Hong),
but does not teach: said first power supply line of the two fourth signal lines is located on a side of said second power supply line of the two fourth signal lines away from said pixel unit.
Li teaches said first power supply line of the two fourth signal lines is located on a side of said second power supply line of the two fourth signal lines away from said pixel unit (Abstract and claim 1) and it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to use the configuration, as disclosed in Li, in the device of Hong in view of Ikeda, in order to achieve a better display effect (in Li)
Other art
US 20210183983 A1:
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Response to Arguments
The arguments filed by the Applicant on 3/13/26 is acknowledged, however it is moot in light of new grounds of rejection for the amended claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Fatima Farokhrooz whose telephone number is (571)-272-6043. The examiner can normally be reached on Monday- Friday, 9 am - 5 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece can be reached on (571) 270-3711. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http;//pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/Fatima N Farokhrooz/
Examiner, Art Unit 2875
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