DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claims 1 and 3-11 are pending. Claim 2 is canceled. Claims 1 and 3-7 are amended. Claims 8-9 are previously presented. Claim 10 is original. Claim 11 is new.
Response to Arguments
Applicant's arguments filed 2/25/2026 have been fully considered but they are not persuasive.
In response to arguments regarding the amended subject matter of claim 1, although it was agreed in the interview held on 2/4/2026 that the amended subject matter would overcome the 102 rejection, upon further consideration of primary reference TILAK, it is submitted that the modification of the rejection to rely upon the connection between the “protection inductor” Ls and diode D3 of TILAK as the claimed “second node” would render claim 1 anticipated by TILAK.
A phone call was made to attorney of record Seth Kim on June 2, 2026 to explain the change in position from the prior interview (see attached interview summary), and to give Applicant the opportunity to file a supplemental amendment within about three business days. Mr. Kim declined to file a supplemental amendment, needing more time to consider the filing.
Applicant has not specifically commented on or argued against the interpretation of TILAK taken in the rejection below. In particular, the amendment to claim 1 includes the subject matter of canceled claim 2, with the addition of the word “directly” to describe the connection of the protection inductor, i.e., the claim was amended to recite “a protection inductor directly connected between the second node and the third node”. The previous office action relied on the node labeled ‘n2’ in Figure 1 of TILAK as the claimed “second node”, and with said interpretation, while the protection diode Ls would be directly connected to the third node ‘n1’, the protection diode Ls would not be directly connected to the second node ‘n2’ since diode D3 is placed between the protection diode Ls and the second node ‘n2’. This was the interpretation taken in the last office action and also relied upon in the interview held on 2/4/2026. However, the instant office action relies on a different interpretation of primary reference TILAK, i.e., the connection between the “protection inductor” Ls and diode D3 in Figure 1 is relied upon to teach the claimed “second node”. Based on this interpretation, TILAK teaches the recitation “a protection inductor directly connected between the second node and the third node”.
Furthermore, this interpretation of the connection between the “protection inductor” Ls and diode D3 as the “second node” still meets every other remaining limitation that contains the “second node”. For example, the claim recites “a buck diode connected between a second node and a ground”, and “a first protection capacitor connected between the first node and the second node”. Since the claim does not recite direct connections for the “buck diode” and the “first protection capacitor”, it is submitted that TILAK discloses the buck diode (D2) is connected between the second node (connection between Ls and D3) and ground (5); and the first protection capacitor (C2) between the first node (na) and the second node as shown in Figure 1. It is therefore respectfully submitted that TILAK anticipates claim 1 within the broadest reasonable interpretation of the claim language.
Drawings
The drawings were received on 2/25/2026. These drawings are acceptable.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 and 3-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by TILAK (JP2013135570A; cited on IDS with date 3/1/2023; cited in previous office action; English machine translation was included with previous office action).
Regarding claim 1, TILAK discloses a protection circuit (comprising elements D1, C1, C2, D3, and Ls, Figs. 1, 4, & 5) for a direct current-direct current (DC-DC) converter (¶ 0007: The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a DC-DC converter that can suppress switching loss, voltage stress, and EMI of semiconductor elements; ¶ 0025: FIG. 1 shows the configuration of a step-down DC-DC converter), the protection circuit comprising:
a buck switch (Qm, Figures 1, 4, & 5) connected between a voltage input terminal (1a) and a first node (na), the buck switch being controlled by a switching cycle and a duty cycle of a switching signal (¶ 0026: An N-channel MOSFET Qm (main switching element) and a main inductor Lm are connected in series across an intermediate node na in a first power supply line 4 extending from the input terminal 1a to the output terminal 1c; ¶ 0058: PWM control is performed… 11(a) and 11(b) show waveforms when the duty ratio is 33% and 50%, respectively);
a buck inductor (LM) connected between the first node (na) and a voltage output terminal (1c; ¶ 0026: see above);
a buck diode (D2) connected between a second node (node between Ls and D3 as shown in Fig. 1) and a ground (5; ¶ 0026: A second power supply line 5 extending from the input terminal 1b to the output terminal 1d is the ground line of this circuit; ¶ 0027: a second diode D2 connected in series across a second node n2 between the power supply lines 4 and 5); and
a buck capacitor (Co) connected between the voltage output terminal and the ground (¶ 0026: capacitor Co that performs a filtering function is connected between the output terminals 1c and 1d),
wherein the protection circuit is connected to the first node, the second node and the ground (the protection circuit comprises elements D1, C1, C2, D3, and Ls, and is connected to first node na, the second node between Ls and D3, and ground 5 as shown in Figures 1, 4, & 5),
wherein, when the buck switch is switched between an On state and an OFF state according to the switching signal (¶ 0028: As shown in FIG. 2, the control circuit 8 … performs hysteresis control by comparing the detected output voltage Vo(det) with the reference voltage Vref, and outputs a gate signal to the MOSFET Qm; ¶ 0046: When the detected output voltage Vo(det) becomes higher than the reference voltage Vref at time t5 and the output signal of the comparator 9 goes low, the control circuit 8 turns off the MOSFET Qm), the protection circuit is configured to supply a protection voltage between the first node and the ground so that voltage stress of the buck switch is smaller than an input voltage supplied between the voltage input terminal and the ground (¶ 0050: since the resonant circuit 6 is provided between the intermediate node na of the first power supply line 4 and the second power supply line 5, the MOSFET Qm can be turned off with ideal ZVS and ideal or approximate ZCS; ¶ 0052: despite the resonant operation, the voltages applied to the semiconductor elements (MOSFET Qm, diodes D1 to D3, Df) and passive elements are equal to or lower than the input voltage Vs, and no increase in voltage stress occurs), and
wherein the protection circuit includes:
a first protection capacitor (C2, Figures 1, 4, & 5) connected between the first node (na) and the second node (node between Ls and D3 as shown in Fig. 1);
a second protection capacitor (C1) connected between a third node (n1) and the ground (5);
a protection inductor (Ls) directly connected between the second node (node between Ls and D3 as shown in Fig. 1) and the third node (n1); and
a protection diode (D1) connected between the first node (na) and the third node (n1).
Regarding claim 3, TILAK discloses the protection diode is kept in the OFF state in a first period of time during which the buck switch is in the ON state, and is kept in the ON state in a second period of time during which the buck switch is in the OFF state (¶ 0015).
Regarding claim 4, TILAK discloses the protection voltage is equal to a voltage of a series circuit of the first protection capacitor and the buck diode (¶ 0050).
Regarding claim 5, TILAK discloses a voltage of a series circuit of the first protection capacitor, the protection inductor and the second protection capacitor is equal to a sum of a voltage of the buck inductor and an output voltage in a first period of time during which the buck switch is in the ON state, and wherein the output voltage is a voltage between the voltage output terminal and the ground (¶ 0031, 0038).
Regarding claim 6, TILAK discloses a voltage of the first protection capacitor is equal to a voltage of a series circuit of the protection inductor and the protection diode in the second period of time during which the buck switch is in the OFF state (¶ 0042, 0046).
Regarding claim 7, TILAK discloses a voltage of the second protection capacitor is equal to a voltage of a series circuit of the protection inductor and the buck diode in the second period of time during which the buck switch is in the OFF state (¶ 0042, 0046).
Regarding claim 8, TILAK discloses a DC-DC converter comprising the protection circuit according to claim 1 (¶ 0007, 0025).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over TILAK as applied to claims 1 and 3-8 above, and further in view of SHEU (US Pub. No. 2012/0313572; cited in previous office action).
Regarding claim 9, TILAK discloses the DC-DC converter as applied to claim 8 but fails to disclose a battery charger comprising the DC-DC converter according to claim 8.
SHEU discloses a battery charger comprising a DC-DC converter (¶ 0005-0006, 0025). It would be obvious to include the DC-DC converter of TILAK in place of the DC-DC converter in the battery charger of SHEU.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include the battery charger comprising the DC-DC converter in order to achieve high energy efficiency and precise control over the charging process.
Regarding claim 10, TILAK as modified by SHEU teaches the battery charger as applied to claim 9 but fails to teach an electric vehicle comprising the battery charger according to claim 9.
SHEU further discloses an electric vehicle comprising the battery charger (¶ 0005-0006, 0025).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include the electric vehicle comprising the battery charger in order to achieve high energy efficiency and precise control over the charging process.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over TILAK as applied to claims 1 and 3-8 above, and further in view of MYER (US Patent 3,537,023).
Regarding claim 11, TILAK discloses the protection circuit as applied to claim 1, but fails to disclose a cathode of the buck diode is directly connected to the protection inductor via the second node.
However, TILAK discloses the cathode of buck diode D2 is effectively directly connected to the second node/protection inductor Ls via diode D3 as shown in Fig. 1. As an example of a diode effectively providing a direct connection, MYER discloses two nodes effectively directly connected via a diode, and in addition, the diode may be omitted and the circuit would still successfully operate (col 1, ll. 59-63; col 2, ll. 39-42). Furthermore, the circuit arrangement of TILAK provides the functionality of a protection circuit configured to supply a protection voltage as recited, and providing the direction connection would not provide new or unexpected results.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include the cathode of the buck diode directly connected to the protection inductor as recited in order to provide a connection with minimal resistance and voltage drop.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANUEL HERNANDEZ whose telephone number is (571)270-7916. The examiner can normally be reached Monday-Friday 9a-5p ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at (571) 272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Manuel Hernandez/Examiner, Art Unit 2859
/DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859
Prosecution Insights