DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The claim set submitted on 30 DECEMBER 2025 is acknowledged and considered. In the claim set, Claim 1 is ‘Currently Amended’ ; Claims 2-20 are ‘Original’ or ‘Previously Presented’.
Current pending claims are Claims 1-20 and are considered on the merits below.
Response to Amendment/Arguments
Applicant’s arguments, see REMARKS, filed 30 DECEMBER 2025, with respect to the objection to the drawings have been fully considered and are persuasive. The objection to the drawings has been withdrawn.
Applicant's arguments filed 30 DECEMBER 2025 have been fully considered but they are not persuasive.
In the amendment to Claim 1, Applicant has attempted to further define the invention. However, the amendment to the claim only defines properties of the solution, which a material that is to be worked upon by the device. The claim language that has been added does not further define the device structurally. In addition, the language that has been added to Claim 1 adds language directed to how the solution is to act during its intended use.
The “[i]nclusion of the material or article worked upon by a structure being claimed does not impart patentability to the claims.” In re Otto, 312 F.2d 937, 136 USPQ 458, 459 (CCPA 1963); see also In re Young, 75 F.2d 996, 25 USPQ 69 (CCPA 1935).
In addition, “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-8 and 10-20 are rejected under 35 U.S.C. 103 as being unpatentable over CN 112892626 A, submitted on the Information Disclosure Statement on 24 AUGUST 2023, Foreign Patent Document, Cite No. 5, herein referred ‘ ‘626’’; and further in view of CN 107583692 A, submitted on the Information Disclosure Statement on 24 AUGUST 2023, Foreign Patent Document, Cite No. 1, herein referred ‘ ‘629’’.
English Translations of both CN documents above have been obtained from Google Patents. The translations have been provided on the PTO-892 and are used as the basis of the rejection below.
Applicant’s invention is directed towards a device.
Regarding Claim 1, the reference ‘626 discloses a microfluidic chip, comprising:
a substrate layer, abstract, microfluidic device, Figure 1, substrate 110, page 4-5, wherein the substrate layer comprises a substrate and a drive electrode layer disposed on the substrate, Figure 1, substrate and electrode 121, page 4-5; and
a cover plate layer, Figure 1, layer 200, page 4-5, arranged opposite the substrate layer, Figure 1, wherein:
a space between the cover plate layer and the substrate layer form a solution accommodating space, Figure 1, channel 210, page 4-5.
The ‘626 reference discloses the claimed invention, but is silent in regards to the structural characteristics of the cover plate layer.
The ‘676 reference discloses a microfluidic chip, abstract, Figure 2, comprising:
a substrate layer, page 4, wherein the substrate layer comprises a substrate and an electrode layer disposed on the substrate, page 5; and
a cover plate layer, Figure 6, cover plate 11, arranged opposite the substrate layer, Figure 6, page 9-10;
a space between the cover plate layer and the substrate layer form a solution accommodating space, Figure 2, channel 1, page 6;
the cover plate layer comprises: a solution inlet hole, Figure 2 and 6, page 6, port 3, penetrating a thickness direction of the cover plate layer, Figure 6; a solution outlet hole, Figure 2 and 6, port 4, page 6, penetrating the thickness direction of the cover plate layer, page 6, Figure 2 and 6; and a plurality of limiting recesses, Figure 2, channels which lead to/communication to chambers 2, page 6, arranged in an array on a side of the cover plate layer facing the substrate layer; wherein the solution inlet hole, the solution outlet hole and the plurality of limiting recesses are in communication with the solution accommodating space, Figure 2 and 6, page 6; and an end surface of the solution inlet hole adjacent to the substrate layer, an end surface of the solution outlet hole adjacent to the substrate layer, and opening surfaces of the plurality of limiting recesses are arranged substantially flush with one another, Figure 2 and 6.
It would be obvious to one having ordinary skill in the art before the effective filing date to modify the ‘626 reference with the structural characteristics of the cover plate layer of the ‘676 reference to allow use of pressure or gravity to fill the device of sample or target liquid, page 5-6.
The language which recites “wherein solution in the solution accommodating space directly contacts a side of the limiting recess facing the substrate layer, and the solution in the solution accommodating space further directly contacts a side of the substrate layer facing the cover plate layer” is directed towards material worked upon and how the material worked upon acts when the microfluidic chip is in use and when solution is added and used in the device.
The “[i]nclusion of the material or article worked upon by a structure being claimed does not impart patentability to the claims.” In re Otto, 312 F.2d 937, 136 USPQ 458, 459 (CCPA 1963); see also In re Young, 75 F.2d 996, 25 USPQ 69 (CCPA 1935).
In addition, “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Additional Disclosures Included by the combination are: Claim 2: wherein the microfluidic chip according to claim 1, wherein the cover plate layer further comprises a reaction recess, the reaction recess arranged on the side of the cover plate layer facing the substrate layer, ‘626, Figure 1, ‘676, Figure 6, and the reaction recess and the substrate layer form the solution accommodating space, ‘626, Figure 1, ‘676 Figure 6; and a bottom surface of the reaction recess is arranged substantially flush with the end surface of the solution inlet hole adjacent to the substrate layer, the end surface of the solution outlet, ‘676, Figure 6, hole adjacent to the substrate layer, and the opening surfaces of the plurality of limiting recesses, ‘676, Figure 6.; Claim 3: wherein the microfluidic chip according to claim 2, is suggested by the combination above, but is silent in regards to wherein the reaction recess and the plurality of limiting recesses are integrally injection molded. The instant claim is directed towards how the parts of the device are made, injection molded, and is considered product-by-process language and injection molding in microfluidic devices is well known in the art and conventional. Since the combination above suggest the invention to be obvious, there is no structure implied by the process and therefore it would be obvious to one having ordinary skill in the art before the effective filing date to modify the combination to have the reaction recess and the plurality of limiting recesses are integrally injection molded as manufacturing process step do not impart distinctive structural characteristics to the final product, In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985), and In re Larson, 340 F.2d 965, 968, 144 USPQ 347, 349 (CCPA 1965). ; Claim 4: wherein the microfluidic chip according to claim 1, wherein the cover plate layer further comprises a gas valve cavity independent from the plurality of limiting recesses, a gas inlet channel and a gas outlet channel, the gas inlet channel and the gas outlet channel are in communication with the gas valve cavity ; the gas valve cavity is arranged on a side of the plurality of limiting recesses facing away from the substrate layer; and an orthographic projection of the gas valve cavity on the substrate covers orthographic projections of the plurality of limiting recesses on the substrate,’676, Figure 5(d) , 5(e) page 9, paragraph starting with ‘Two ports…’.; Claim 5: wherein the microfluidic chip according to claim 4, wherein the gas valve cavity and the plurality of limiting recesses are integrally injection-molded; or a portion where the gas valve cavity is located and a portion where the plurality of limiting recesses are located are fixedly connected with each other through glue, The instant claim is directed towards how the parts of the device are made, injection molded, and is considered product-by-process language and injection molding in microfluidic devices is well known in the art and conventional. Since the combination above suggest the invention to be obvious, there is no structure implied by the process and therefore it would be obvious to one having ordinary skill in the art before the effective filing date to modify the combination to have the reaction recess and the plurality of limiting recesses are integrally injection molded as manufacturing process step do not impart distinctive structural characteristics to the final product, In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985).; Claim 6: wherein the microfluidic chip according to claim 1, wherein a volume of each of the limiting recesses is substantially a same, ‘676 uniformity of chambers and channel that lead to chamber 2 are uniform, Figure 2 and 6.; Claim 7: wherein the microfluidic chip according to claim l, wherein the drive electrode layer comprises: a first electrode; a second electrode; and a plurality of third electrodes arranged in an array, ‘626. Figure 4-7, electrode layer 120 is an array, abstract; wherein an orthographic projection of the first electrode on the substrate covers an orthographic projection of the solution inlet hole on the substrate; an orthographic projection of the second electrode on the substrate covers an orthographic projection of the solution outlet hole on the substrate; and orthographic projections of the plurality of third electrodes on the substrate and the orthographic projections of the plurality of limiting recesses on the substrate overlap each other, ‘626, Figure 4-7, Figure 11, ‘676, Figure 6.; Claim 8: wherein the microfluidic chip according to claim 7, wherein an orthographic projection of one of the plurality of limiting recesses on the substrate covers an orthographic projection of at least one of the third electrodes on the substrate, ‘626, Figure 4-7, ‘676, Figure 6.; Claim 10: wherein the microfluidic chip according to claim 7, wherein the drive electrode layer further comprises a plurality of first connection electrodes; and the plurality of first connection electrodes are arranged between the first electrode and the plurality of third electrodes; and the plurality of first connection electrodes are arranged between the second electrode and the plurality of third electrodes, ‘626, electrode array 120 includes plurality of drive electrodes 121, page 5. ; Claim 11: wherein the microfluidic chip according to claim 10, wherein a main channel region, a connection channel region, and at least one branch channel region are provided between the first electrode and the plurality of third electrodes, and between the second electrode and the plurality of third electrodes separately; and the at least one branch channel region is connected with the main channel region by means of the connection channel region; the main channel region is arranged adjacent to the first electrode and the second electrode; the branch channel region is arranged adjacent to the plurality of third electrodes; and each of the main channel region, the connection channel region, and the branch channel regions is provided with a plurality of the first connection electrodes separately ‘626, Figure 11.; Claim 12: wherein the microfluidic chip according to claim l, wherein the cover plate layer further comprises a first connection channel and at least one solution storage recess; an orthographic projection of the first connection channel on the substrate and an orthographic projection of the at least one solution storage recess on the substrate do not overlap an orthographic projection of the solution accommodating space on the substrate; the solution storage recess is concaved inwards from a surface of a side of the cover plate layer facing away from the substrate layer towards the cover plate layer; the first connection channel is arranged inside the cover plate layer; and the solution storage recess is in communication with the solution inlet hole through the first connection channel, ‘676, Figure 6, see vertical part of channel. ; Claim 13: wherein the microfluidic chip according to claim 12, wherein the cover plate layer further comprises a plurality of solution storage recesses, and a second connection channel enabling communication between the solution storage recesses; the second connection channel is arranged inside the cover plate layer; and an orthographic projection of the second connection channel on the substrate does not overlap the orthographic projection of the solution accommodating space on the substrate, ‘676, Figure 6, ‘626 Figure 9. ; Claim 14: wherein the microfluidic chip according to claim 13, wherein the drive electrode layer further comprises: a plurality of fourth electrodes corresponding one-to-one to the solution storage recesses; a plurality of second connection electrodes corresponding to the first connection channel and arranged in an array; and a plurality of third connection electrodes corresponding to the second connection channel and arranged in an array, ‘626, Figure 9, electrodes 121. ; Claim 15: wherein the microfluidic chip according to claim 12, wherein the solution storage recesses comprise at least one of a sample storage recess, a magnetic bead and lysis solution storage recess, a washing solution storage recess, an eluate storage recess, a lysis waste solution storage recess, a washing waste solution storage recess, a magnetic bead waste solution storage recess, or a product storage recess, Figure 11, at least on of subchannel 211 can be considered a storage recess, page 8. ; Claim 16: wherein the microfluidic chip according to claim l, wherein the substrate layer further comprises a hydrophobic layer arranged on an entire surface of a side of the drive electrode layer away from the substrate, ‘626, Figure 4-7, hydrophobic layer 130, page 5. ; Claim 17: wherein the microfluidic system, comprising the microfluidic chip according to claim l, ‘626 see all Figures, ‘676, Figure 6.; Claim 18: wherein the usage method for the microfluidic chip according to claim 1 , comprising: injecting a reaction solution into the solution accommodating space through the solution inlet hole; loading the drive electrode layer with an electric signal, to disperse the reaction solution into a plurality of droplets under a driving action of the drive electrode layer; applying pressure to the cover plate layer, to make each of the droplets enter a space defined by the limiting recesses and the substrate layer and isolated from each other; and after a reaction is completed, discharging a solution from the solution accommodating space through the solution outlet hole, ‘676, Claim 1-3, page 4-6, 8-9.; Claim 19: wherein the usage method according to claim 18, wherein the cover plate layer further comprises a gas valve cavity independent from the plurality of limiting recesses, a gas inlet channel and a gas outlet channel, the gas inlet channel and the gas outlet channel are in communication with the gas valve cavity; the gas valve cavity is arranged on a side of the plurality of limiting recesses facing away from the substrate layer; and an orthographic projection of the gas valve cavity on the substrate covers orthographic projections of the plurality of limiting recesses on the substrate; wherein the applying pressure to the cover plate layer, to make each of the droplets enter a space defined by the limiting recesses and the substrate layer and isolated from each other specifically comprises: inflating and pressurizing the gas valve cavity, to make the gas valve cavity drive the plurality of limiting recesses to move towards the substrate layer until the opening surfaces of the limiting recesses make contact with the substrate layer, so as to make each of the droplets enter the space defined by the limiting recesses and the substrate layer and isolated from each other, ‘676, Claims 1-5, page 4-6, 8-9.; Claim 20: wherein the usage method according to claim 18, wherein the applying pressure to the cover plate layer, to make each of the droplets enter a space defined by the limiting recesses and the substrate layer and isolated from each other specifically comprises: applying pressure to the cover plate layer by using a weight on the side of the cover plate layer facing away from the substrate layer until the opening surfaces of the limiting recesses make contact with the substrate layer, so as to make each of the droplets enter the space defined by the limiting recesses and the substrate layer and isolated from each other, ‘676, Claim 1-5, page 4-6, 8-9.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over CN 112892626 A, submitted on the Information Disclosure Statement on 24 AUGUST 2023, Foreign Patent Document, Cite No. 5, herein referred ‘ ‘626’’; and in view of CN 107583692 A, submitted on the Information Disclosure Statement on 24 AUGUST 2023, Foreign Patent Document, Cite No. 1, herein referred ‘ ‘629’’, and further in view of JOHNSON, US Patent 8,683,877 B2.
Regarding Claim 9, the combination above suggests the claimed invention, but is silent in regards to wherein the microfluidic chip according to claim 7, wherein the substrate layer further comprises: a plurality of transistors arranged between the substrate and the drive electrode layer, and the plurality of transistors are electrically connected with the third electrodes.
JOHNSON discloses a microfluidic chip, Figure 1-5, Column 8 line 1-45, comprising: a substrate layer, wherein the substrate layer comprises a substrate and a drive electrode layer disposed on the substrate, Column 4 line 62-67, Column 5 line 66-67, Figure 1-5, substate with HE on it; and a cover plate layer, arranged opposite the substrate layer, Figure 1-5, layer opposite HE with array of SE on it, wherein: a space between the cover plate layer and the substrate layer form a solution accommodating space, Figure 1-5, see space with circles; the cover plate layer comprises: a solution inlet hole, Figure 3; a solution outlet hole, Figure 3; and a plurality of limiting recesses, arranged in an array on a side of the cover plate layer facing the substrate layer, Figure 3, Column 8 line 39-45; wherein the solution inlet hole, the solution outlet hole and the plurality of limiting recesses are in communication with the solution accommodating space, Figure 3; and an end surface of the solution inlet hole adjacent to the substrate layer, an end surface of the solution outlet hole adjacent to the substrate layer, and opening surfaces of the plurality of limiting recesses are arranged substantially flush with one another, Figure 3; wherein the substrate layer further comprises: a plurality of transistors arranged between the substrate and the drive electrode layer, Column 2 line 61-64, Figure 9, Column 6 line 1-12, Columns 10-13, and the plurality of transistors are electrically connected with electrodes, Column 5 line 66-Column 6 line 8.
It would be obvious to one having ordinary skill in the art before the effective filing date to modify the combination above to include a plurality of transistors arranged between the substrate and the drive electrode layer as taught by JOHNSON to compensate variations of individual characteristics of local driving unit, Column 2 line 61-64, and create higher uniformity across the array, Column 11 line 59-62.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE T MUI whose telephone number is (571)270-3243. The examiner can normally be reached M-Th 5:30 -15:30 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LYLE ALEXANDER can be reached at (571) 272-1254. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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CTM
/CHRISTINE T MUI/Primary Examiner, Art Unit 1797