Remarks
Claims 1-16, 18, 23, 24, and 30 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed 3/28/2024 fails to comply with the provisions of 37 CFR 1.97, 1.98 and MPEP § 609 because a number of the NPL documents do not have dates noted. As stated in MPEP 609 and 37 CFR 1.98, a requirement is that “Each publication listed in an information disclosure statement must be identified by publisher, author (if any), title, relevant pages of the publication, date, and place of publication”. As dates have not been provided for all such documents, the IDS cannot been considered. It has been placed in the application file, but the information referred to therein has not been considered as to the merits. Applicant is advised that the date of any re-submission of any item of information contained in this information disclosure statement or the submission of any missing element(s) will be the date of submission for purposes of determining compliance with the requirements based on the time of filing the statement, including all certification requirements for statements under 37 CFR 1.97(e). See MPEP § 609.05(a).
Examiner’s Note
It is noted that the IDS filed 3/28/2024 contains a large number of references for consideration by the Examiner. If the applicant and/or applicant’s representative is aware of any particular reference or portion of a reference in the list which the examiner should pay particular attention to, it is requested that it be specifically pointed out in response to this office action.
Claim Interpretation
The claims include subject matter that has no bearing on the scope of the claims. For example, claim 12 states that the hidden hardware modifications comprise one or more maliciously inserted circuitries configured to compromise operations of the fabricated integrated circuits. This defines the malicious modification, which is not part of the claimed invention. It is nothing to do with identifying any hidden modifications. Thus, it does not have any effect on the scope of the claim.
Claim Objections
Claims 1 and 9 are objected to because of the following informalities: Claim 1 does not include a conjunction (e.g., “and” or “or”) at the end of the penultimate limitation. Thus, it is unclear whether just 1 or all steps are required. Claim 9 has the same issue. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-16, 18, 23, 24, and 30 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the plurality of fabricated integrated circuit" in the second limitation. There is insufficient antecedent basis for this limitation in the claim. All independent claims have the same issue and are rejected for the same reasons. All dependent claims are rejected at least based on their dependencies.
Claim 16 recites the limitation "the first group of the second group of fabricated integrated circuits" in the store limitation. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 4-6, 8-14, 18, 23, 24, and 30 are rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Keller (U.S. Patent Application Publication 2012/0226463).
Regarding Claim 1,
Keller discloses a method to identify hidden hardware modifications in circuitries of fabricated integrated circuits, the method comprising:
Wirelessly applying RF waveforms to a plurality of fabricated integrated circuits to evaluate for hidden hardware modifications (Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 107, 113, 120, 127, 128, and associated figures; using antenna, inductive coupling or the like to transfer oscillating signal including modulated RF, for example, to multiple ICs to determine if it is original or different in some fashion, such as by malicious modification, for example);
Wirelessly recording a plurality of signals of RF waveforms emanating from the plurality of fabricated integrated circuits, wherein each signal of the plurality of signals is recorded from a respective fabricated integrated circuit and is reflective of impedance characteristics of the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 57, 65, 78, 92, 113, 117, and associated figures; RF collection, storage, for later analysis, for example);
Generating, by a processor, a plurality of clusters of the plurality of signals based on harmonics of the plurality of signals (Exemplary Citations: for example, Abstract, Paragraphs 104-114 and associated figures; clusters based on harmonic signals, for example);
Adjusting, by the processor, the number of the plurality of clusters based on distances of centroids in the plurality of clusters to identify, at least, a first group of fabricated integrated circuits and a second group of fabricated integrated circuits, wherein the first group of fabricated integrated circuits has a different impedance characteristic profile to the second group of fabricated integrated circuits, wherein a difference in an impedance characteristic profile being present is indicative of a hidden hardware modification in the first group of fabricated integrated circuits or the second group of fabricated integrated circuits (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, and associated figures; Hierarchical Agglomerative Clustering, for example, does this, as described in paragraph 110, for example. The hidden hardware modification aspects are found in the above citations as well (e.g., Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 107, 113, 120, 127, 128, and associated figures), for example).
Regarding Claim 13,
Claim 13 is a system claim that corresponds to method claim 1 and is rejected for the same reasons. Claim 13 also includes a test call to identify hidden hardware modifications in circuitries of fabricated integrated circuits comprising a first antenna assembly and a second antenna assembly, as well as an analysis system, and discusses backscattering side channel signals, all found in Keller’s citations above in the systems that perform the steps in claim 1 above (e.g., the antennas that send and receive, test cell including such, and analysis system performing the clustering, as well as backscattering side channel signals, as rejected in claim 4, for example).
Regarding Claim 30,
Claim 30 is a method claim that corresponds to system claim 13 and is rejected for the same reasons. Claim 30 also includes a step of receiving, by a processor, the recorded plurality of backscattering side channel signals, met by the processor of claim 13 receiving this information, which is performed by any processor any time information is given to it, such as in signature comparison and matching means 24 of Keller receiving such information from the collection means.
Regarding Claim 4,
Keller discloses that each of the emanated RF waveforms comprises backscattering side-channel signals reflective of impedance characteristics of circuitries of the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 57, 65, 78, 92, 113, 117, and associated figures; side channels (e.g., RF, EM), reflective of impedance characteristics (e.g., variations in localized or distributed impedance) in ICs (as above), for example).
Regarding Claim 5,
Keller discloses that the plurality of clusters are defined by a plurality of clustered elements each associated with the respective fabricated integrated circuit, and wherein each of the plurality of the clustered elements is generated by a dimensionality reduction algorithm applied to harmonics-based data of a respective recorded signal for the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, and associated figures; this is in HAC, for example).
Regarding Claim 18,
Claim 18 is a system claim that corresponds to method claim 5 and is rejected for the same reasons.
Regarding Claim 6,
Keller disclose that each clustered element of the plurality of clusters are generated by:
Determining, by the processor, harmonic amplitudes of the given wirelessly recorded signal of the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures); and
Determining, by the processor, a singular value decomposition value of the harmonic amplitudes (Exemplary Citations: for example, Abstract, Paragraphs 104-117, 124, and associated figures; decompositions to coefficient, for example).
Regarding Claim 8,
Keller discloses that the adjusting of the number of plurality of clusters based on the distances of centroids comprises: determining if a distance among edges of cluster centroids is below a pre-defined threshold (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures; HAC keeps going until optimal (optimal may be determined based on SKLD, for example), for example).
Regarding Claim 9,
Keller discloses that the adjusting of the number of plurality of clusters based on the distances of centroids comprises:
Determining if a distance among edges of cluster centroids are below a threshold determined by (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures):
Determining, by the processor, distances among centroids of the plurality of clusters (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures);
Determining, by the processor, a plurality of distances of a predefined number of nearest clusters for each cluster of the plurality of clusters (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures);
Establishing, by the processor, the threshold as a statistically derived value of the determined distances (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures).
Regarding Claim 10,
Keller discloses that the adjusting of the number of plurality of clusters based on the distances of centroids comprises:
Grouping a first cluster and a second cluster of the plurality of clusters if a distance of an edge of the first cluster and an edge of the second cluster is below a threshold (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures); and
Grouping the first cluster and the second cluster if a path can be defined in a generated graph model comprising a first node associated with the first cluster and a second node associated with the second cluster (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures).
Regarding Claim 23,
Claim 23 is a system claim that corresponds to method claim 10 and is rejected for the same reasons.
Regarding Claim 11,
Keller discloses that the harmonics of the plurality of signals comprise measured backscattering side-channel harmonics of clock signals of the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 57, 60, 65, 78, 91-93, 107, 113, 117, 120, 127, 128, and associated figures).
Regarding Claim 14,
Claim 14 is a system claim that corresponds to method claim 11 and is rejected for the same reasons.
Regarding Claim 24,
Claim 24 is a system claim that corresponds to method claim 11 and is rejected for the same reasons.
Regarding Claim 12,
Keller discloses that the hidden hardware modifications comprise one or more maliciously inserted circuitries configured to compromise operations of the fabricated integrated circuits (Exemplary Citations: for example, Abstract, Paragraphs 57, 60, 65, 78, 91-93, 107, 113, 117, 120, 127, 128, and associated figures; malicious modified ICs, for example).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 3, 15, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Keller in view of Shaapur (U.S. Patent Application Publication 2017/0330201).
Regarding Claim 2,
Keller discloses selecting at least one of the first group of fabricated integrated circuits or the second group of fabricated integrated circuits for evaluation for the hidden hardware modification (Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 104-114, 107, 113, 117, 120, 127, 128, and associated figures);
But does not explicitly disclose that the evaluation is destructive evaluation.
Shaapur, however, discloses that the evaluation is destructive evaluation (Exemplary Citations: for example, Paragraphs 27, 44, 72, and associated figures; destructive analysis, for example); and
Selecting at least one of the first group of fabricated integrated circuits or the second group of fabricated integrated circuits for evaluation for the hidden hardware modification (Exemplary Citations: for example, Paragraphs 26, 27, 44, 72, and associated figures; destructive analysis of an IC/component thereof, for example. It is noted that this destructive analysis is performed after non-destructive means, which may be the clustering type techniques of Keller, for example). It would have been obvious to one of ordinary skill in the art at the time of applicant’s invention, which is before any effective filing date of the claimed invention, to incorporate the tiered analysis techniques of Shaapur into the counterfeit/modified electronics detection system of Keller in order to allow the system to go through a tiered set of evaluations, from the lease invasive to the most invasive, in order to detect modifications/counterfeits, to allow for absolute verification by destructive means, and/or to increase security in the system.
Regarding Claim 15,
Claim 15 is a system claim that corresponds to method claim 2 and is rejected for the same reasons.
Regarding Claim 3,
Keller as modified by Shaapur discloses the method of claim 2, in addition, Keller discloses storing cluster data for the first group of fabricated integrated circuits or the second group of fabricated integrated circuits (Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 104-114, 107, 113, 117, 120, 127, 128, and associated figures);
Comparing a subsequently generated plurality of clusters associated with a second plurality of fabricated integrated circuits to the cluster data (Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 104-114, 107, 113, 117, 120, 127, 128, and associated figures); and
Rejecting the second plurality of fabricated integrated circuits associated with the subsequently generated plurality of clusters based on the comparison (Exemplary Citations: for example, Abstract, Paragraphs 60, 91-93, 104-114, 107, 113, 117, 120, 127, 128, and associated figures).
Regarding Claim 16,
Claim 16 is a system claim that corresponds to method claim 3 and is rejected for the same reasons.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Keller in view of Piech (Piech, Chris, “K Means”, pp. 1-4, 2013, obtained from https://web.stanford.edu/~cpiech/cs221/handouts/kmeans.html).
Regarding Claim 7,
Keller discloses that the plurality of clusters comprise cluster elements each determined based on one or more harmonic amplitudes of a respective recorded signal for the respective fabricated integrated circuit (Exemplary Citations: for example, Abstract, Paragraphs 104-114, 117, 124, and associated figures);
But does not appear to explicitly disclose k-means based clustering.
Piech, however, discloses that the cluster elements are k-mean-based cluster elements (Exemplary Citations: for example, Pages 1-4; k-means clustering with elements of such an algorithm, for example). It would have been obvious to one of ordinary skill in the art at the time of applicant’s invention, which is before any effective filing date of the claimed invention, to incorporate the K-means based clustering techniques of Piech into the counterfeit/modified electronics detection system of Keller in order to make use of one of the most popular clustering algorithms, to increase extensibility of the system by allowing use of additional means of clustering, to ensure compatibility with clustering algorithms that have been used for many decades, and/or to increase security in the system.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeffrey D Popham whose telephone number is (571)272-7215. The examiner can normally be reached Monday through Friday 9:00-5:30.
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/Jeffrey D. Popham/Primary Examiner, Art Unit 2432
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