Prosecution Insights
Last updated: April 19, 2026
Application No. 18/027,730

OPTICAL SENSOR

Final Rejection §103
Filed
Mar 22, 2023
Examiner
CUTLER, ALBERT H
Art Unit
2637
Tech Center
2600 — Communications
Assignee
Hamamatsu Photonics K K
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
811 granted / 1024 resolved
+17.2% vs TC avg
Strong +21% interview lift
Without
With
+21.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
33 currently pending
Career history
1057
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
45.9%
+5.9% vs TC avg
§102
29.0%
-11.0% vs TC avg
§112
16.1%
-23.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1024 resolved cases

Office Action

§103
DETAILED ACTION This office action is responsive to communication filed on February 25, 2026. Response to Arguments Applicant’s arguments with respect to claim 1 have been considered but are moot in view of the new grounds of rejection. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The Information Disclosure Statement (IDS) filed on February 6, 2026 was received and has been considered by the Examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 10, 11 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over De Munck et al. (US 2014/0374867) in view Iida et al. (US 2013/0341683). Consider claim 1, De Munck et al. teaches: An optical sensor (figure 1) comprising: a charge generation region (p-type layer, 120, n-type layer, 130, n-type PPD implant, 170, paragraphs 0036 and 0037) that generates charges in response to incident light (i.e. in response to front illumination or back illumination, paragraphs 0046-0048); a charge collection region (n-type layer, 150, paragraph 0036) to which charges generated in the charge generation region (120, 130, 170) are transferred (see paragraphs 0039 and 0048); and at least one transfer gate electrode (transfer gate, 190) disposed on a transfer region between the charge generation region (120, 130, 170) and the charge collection region (150, see paragraph 0039, figure 1), wherein the charge generation region (120, 130, 170) includes, an avalanche multiplication region that causes avalanche multiplication (“an avalanche region 230 as indicated by the dotted lines” paragraphs 0041 and 0048), and a gradient potential energy formation region (130, 170) that forms gradient potential energy in the charge generation region (120, 130, 170), the gradient potential energy being gradient so that potential energy becomes lower as approaching the transfer region (The n-type layer (130) and n-type PPD (170) form a gradient potential energy region, as the n-type PPD (170) has a higher doping concentration (e.g. 1e18/cm3, paragraph 0037) than the doping concentration (e.g. 1e17/cm3, paragraph 0036) of the n-type layer (130). Because the n-type PPD (170) has the higher doping concentration, the potential energy becomes lower as approaching the transfer region under the transfer electrode (190) from the n-type layer (130), see figure 1. Paragraph 0048 details that the charges “directly diffuse towards the PPD 170 where the charge integration takes place”.), wherein the avalanche multiplication region (230) is formed in a layer shape along a predetermined plane (see figure 1), and when a side where the transfer gate electrode (190) is located with respect to the avalanche multiplication region (230) in a direction orthogonal to the plane is set as a first side (i.e. the front side “A” in figure 1), and a side opposite to the first side is set as a second side (i.e. the back side “B” in figure 1), the gradient potential energy formation region (170, 130) is located on the first side (A) with respect to the avalanche multiplication region (230, see figure 1). However, De Munck et al. does not explicitly teach that the gradient potential energy is formed to be a lateral gradient towards the transfer region along a direction along the predetermined plane. Iida et al. similarly teaches an optical element (figures 1 and 2) comprising a charge generation region (PD), a charge collection region (FD), at least one transfer gate (26), and a gradient potential energy formation region (21a, 21b, 21c) that forms gradient potential energy in the charge generation region (PD), the gradient potential energy being gradient so that potential energy becomes lower as approaching the transfer region (26, see figure 2C, paragraph 0017). However, Iida et al. additionally teaches that the gradient potential energy is formed to be a lateral gradient towards the transfer region (26) along a direction along the predetermined plane (As shown in figures 2A-2C, the gradient potential energy is a lateral gradient with the potential energy decreasing as the gradient potential energy formation region (21a, 21b, 21c) laterally approaches the transfer region (26), paragraph 0017. Such a configuration enables rapid and complete charge transfer, paragraph 0004.). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the gradient potential energy taught by De Munck et al. additionally be formed to be a lateral gradient as taught by Iida et al. for the benefit of enabling rapid and complete charge transfer (Iida et al., paragraph 0004). Consider claim 10, and as applied to claim 1 above, De Munck et al. further teaches that the gradient potential energy formation region (130, 170) includes a plurality of semiconductor regions (130, 170) arranged so that an impurity concentration becomes higher as approaching the transfer region (The n-type layer (130) and n-type PPD (170) form a gradient potential energy region, as the n-type PPD (170) has a higher doping concentration (e.g. 1e18/cm3, paragraph 0037) than the doping concentration (e.g. 1e17/cm3, paragraph 0036) of the n-type layer (130). Because the n-type PPD (170) has the higher doping concentration, the potential energy becomes lower as approaching the transfer region under the transfer electrode (190) from the n-type layer (130), see figure 1.). Iida et al. also teaches that the gradient potential energy formation region (21a, 21b, 21c) includes a plurality of semiconductor regions (21a, 21b, 21c) arranged so that an impurity concentration becomes higher as approaching the transfer region (see figures 2B and 2C, paragraph 0017). Consider claim 11, and as applied to claim 1 above, DeMunck et al. does not explicitly teach that the gradient potential energy formation region includes a first semiconductor region including a first portion and a second portion, and a second semiconductor region which has an impurity concentration higher than an impurity concentration of the first semiconductor region and is disposed between the first portion and the second portion, and of which a width increases as approaching the transfer region. However, Iida et al. additionally teaches that the gradient potential energy formation region includes a first semiconductor region (21a) including a first portion and a second portion (i.e. portions above and below line A-A’ in figure 2A), and a second semiconductor region (21c) which has an impurity concentration higher than an impurity concentration of the first semiconductor region (21a, see paragraph 0017) and is disposed between the first portion and the second portion (see figure 2A), and of which a width increases as approaching the transfer region (26, see figure 2A). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the gradient potential energy formation region taught by De Munck et al. be formed in the manner taught by Iida et al. for the benefit of enabling rapid and complete charge transfer (Iida et al., paragraph 0004). Consider claim 15, and as applied to claim 1 above, De Munck et al. further teaches that the charge generation region (120, 130, 170) has an embedded photodiode structure (n-type PPD implant, 170, paragraph 0037 and 0027). Claims 2-4 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over De Munck et al. (US 2014/0374867) in view Iida et al. (US 2013/0341683), as applied to claim 1 above, and further in view of Oda (US 7,619,196). Consider claim 2, and as applied to claim 1 above, the combination of De Munck et al. and Iida et al. does not explicitly teach that the at least one transfer gate electrode includes a first transfer gate electrode and a second transfer gate electrode disposed on a side of the charge generation region with respect to the first transfer gate electrode. Oda similarly teaches an optical sensor (figure 4) having a charge generation region (15) connected to a charge collection region (FD, 16) via a transfer gate (see figure 4, column 5, line 52 through column 6, line 35). However, Oda additionally teaches that the at least one transfer gate electrode includes a first transfer gate electrode (multiplication gate electrode, 13) and a second transfer gate electrode (transfer gate electrode, 12) disposed on a side of the charge generation region (15) with respect to the first transfer gate electrode (13, see figure 4, column 4, lines 9-20). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the at least one gate electrode taught by the combination of De Munck et al. and Iida et al. include first and second gate electrodes as taught by Oda for the benefit of enabling charge multiplication and device miniaturization (Oda, column 2, lines 64-67). Consider claim 3, and as applied to claim 2 above, the combination of De Munck et al. and Iida et al. does not explicitly teach that the at least one transfer gate electrode includes a first transfer gate electrode and a second transfer gate electrode disposed on a side of the charge generation region with respect to the first transfer gate electrode. However, Oda additionally teaches that in a charge transfer process of transferring the charges generated in the charge generation region (15) to the charge collection region (16, see figure 5), electric potentials are applied to the first transfer gate electrode (13) and the second transfer gate electrode (12) so that after first potential energy that is potential energy of a region immediately below the first transfer gate electrode (13), and second potential energy that is potential energy of a region immediately below the second transfer gate electrode (12) become lower than potential energy of a boundary portion with the transfer region in the charge generation region (15), the first potential energy and the second potential energy become higher than the potential energy of the boundary portion (i.e. such that the charge is transferred from the charge generation region (15), as shown in figure 5, see column 6, line 39 through column 7, line 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the at least one gate electrode taught by the combination of De Munck et al. and Iida et al. include first and second gate electrodes operated in the manner taught by Oda for the benefit of enabling charge multiplication and device miniaturization (Oda, column 2, lines 64-67). Consider claim 4, and as applied to claim 3 above, the combination of De Munck et al. and Iida et al. does not explicitly teach that the at least one transfer gate electrode includes a first transfer gate electrode and a second transfer gate electrode disposed on a side of the charge generation region with respect to the first transfer gate electrode. However, Oda additionally teaches that in the charge transfer process, electric potentials are applied to the first transfer gate electrode (13) and the second transfer gate electrode (12) so that the second potential energy becomes higher than the first potential energy (see figure 5, column 6, line 39 through column 7, line 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the at least one gate electrode taught by the combination of De Munck et al. and Iida et al. include first and second gate electrodes operated in the manner taught by Oda for the benefit of enabling charge multiplication and device miniaturization (Oda, column 2, lines 64-67). Consider claim 8, and as applied to claim 3 above, the combination of De Munck et al. and Iida et al. does not explicitly teach that the at least one transfer gate electrode includes a first transfer gate electrode and a second transfer gate electrode disposed on a side of the charge generation region with respect to the first transfer gate electrode. However, Oda additionally teaches that in the charge transfer process, after the second potential energy becomes higher than the potential energy of the boundary portion from a state in which the first potential energy and the second potential energy are equal to or lower than the potential energy of the boundary portion, the first potential energy becomes higher than the potential energy of the boundary portion (see figure 5, column 6, line 14, through column 7, line 14). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the at least one gate electrode taught by the combination of De Munck et al. and Iida et al. include first and second gate electrodes operated in the manner taught by Oda for the benefit of enabling charge multiplication and device miniaturization (Oda, column 2, lines 64-67). Allowable Subject Matter Claims 13, 14 and 16 are allowed. Claims 5-7 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 16 corresponds to previously objected-to claim 12, and is thus allowed for the reasons provided with respect to claim 12 on pages 11 and 12 of the Office Action filed November 28, 2025. Claims 13 and 14 are allowed as depending from an allowed claim 16. Consider claim 5, the prior art of record does not teach nor reasonably suggest that in a state in which an electric potential of the first transfer gate electrode and an electric potential of the second transfer gate electrode are equal to each other, the second potential energy is higher than the first potential energy, in combination with the other elements recited in parent claims 1-4. Claim 6 contains allowable subject matter as depending from claim 5. Consider claim 7, the prior art of record does not teach nor reasonably suggest that in a state in which the first potential energy and the second potential energy in the charge transfer process are equal to or lower than the potential energy of the boundary portion, the second potential energy is equal to the potential energy of the boundary portion and the first potential energy is lower than the potential energy of the boundary portion, in combination with the other elements recited in parent claims 1-3. Consider claim 12, and as applied to claim 1 above, De Munck et al. further teaches that the avalanche multiplication region (230) is formed in a layer shape along a predetermined plane (see figure 1), and when a side where the transfer gate electrode (190) is located with respect to the avalanche multiplication region (230) in a direction orthogonal to the plane is set as a first side (i.e. the front side “A” in figure 1), and a side opposite to the first side is set as a second side (i.e. the back side “B” in figure 1), the gradient potential energy formation region (170, 130) is located on the first side (A) with respect to the avalanche multiplication region (230, see figure 1). The prior art of record does not teach nor reasonably suggest that the gradient potential energy formation region is located on the second side with respect to the avalanche multiplication region, in combination with the other elements recited in claims 12 and 1. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Moussy (US 2019/0198701) teaches a SPAD (figure 3) with a lateral gradient in a region (301, see paragraph 0070). Dierickx (US 2011/0267505) teaches a photodiode (figure 10 or 12) with a lateral gradient (100-102 or 120-122) that changes in a direction toward a transfer gate (see figures 10 and 12, paragraph 0089). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALBERT H CUTLER whose telephone number is (571)270-1460. The examiner can normally be reached approximately Mon - Fri 8:00-4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at (571)272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALBERT H CUTLER/Primary Examiner, Art Unit 2637
Read full office action

Prosecution Timeline

Mar 22, 2023
Application Filed
Nov 18, 2025
Non-Final Rejection — §103
Feb 25, 2026
Response Filed
Mar 12, 2026
Final Rejection — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+21.3%)
2y 8m
Median Time to Grant
Moderate
PTA Risk
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