DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/29/2026 has been entered.
Response to Arguments
Applicant’s arguments, filed 05/08/2026, with respect to claim 1 and claim 26 have been fully considered and are persuasive. The 35 U.S.C 103 rejection of claims 1 and 26 have been withdrawn. However, a new rejection has been made in view of Kang et al. (US 2022/0059633 A1; hereinafter “Kang”).
Examiner acknowledges the title of the invention has been changed and is clearly indicative of the invention to which the claims are directed. Therefore the specification objection has been withdrawn.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 25 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 25 recites the limitation " a first display area and a second display area" in lines 1-2. It is unclear if the applicant is referring to a different or the same display areas or the same display areas, that were previously referred to in claim 1. This is due to neither claim 1 nor the specification giving evidence to multiple first and second display areas.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-7, 19, 26, and 28-29 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by in view of Kang et al. (US 2022/0059633 A1; hereinafter “Kang”).
In regard to claim 1, Kang teaches a display panel (a display panel 10) (Fig. 3A and paragraph 33), comprising a display area (a display area DA) (Fig. 1 and paragraph 49), wherein the display area comprises a normal display area (a main display area MDA) and an optical component area (a component area CA) (Fig. 1 and paragraph 49), and a light transmittance within the optical component area is greater than a light transmittance within the normal display area (the transmittance of the transmission area TA located in the component area CA would have a higher transmittance than the main display area MDA) (Fig. 2A and paragraph 52); wherein the optical component area comprises a substrate (a substrate 100) (Fig. 7 and paragraph 56), an insulating layer (a second gate insulating layer 113, an interlayer insulating layer 115, a first and second organic insulating layer 116 and 117) and a first electrode (a second pixel electrode 121′) (Fig. 7 and paragraphs 98, 108 and 127), wherein the insulating layer comprises a first insulating layer (the second gate insulating layer 113 and the interlayer insulating layer 115 form the first insulating layer) and a second insulating layer (the first and second organic insulating layer 116 and 117 form the second insulating layer) (Fig. 7), the second insulating layer is located on a side of the first insulating layer facing away from the substrate (the first organic insulating layer 116 is shown on the topside of the interlayer insulating layer 115 away from the substrate 100) (Fig. 7), and the first insulating layer comprises a first insulating sub-layer (the interlayer insulating layer 115) in contact with the second insulating layer (the interlayer insulating layer 115 is shown in contact with the first organic insulating layer 116 in Fig. 7); and wherein the first electrode is located on a side of the second insulating layer facing away from the substrate and the second insulating layer is in contact with the first electrode (the second pixel electrode 121′ is shown on the topside of the first and second organic insulating layer 116 and 117 and shown contacting the second organic insulating layer in Fig. 7); the first insulating sub-layer is provided with at least one first insulating opening (a first hole H1 and a hole for a source electrode S1 as shown in Fig. 4) (Fig. 4, Fig. 7, paragraphs 125 and 158); and in a thickness direction of the display panel, the second insulating layer covers the at least one first insulating opening (the first and second organic insulating layer 116 and 117 are shown over the first hole H1 in Fig. 7), and the first electrode and the at least one first insulating opening at least partially overlap (the second pixel electrode 121′ and the first hole H1 are shown overlapping in Fig. 7); wherein the display panel further comprises at least one thermal conductive bridge (a first gate insulating layer 112) in contact with the second insulating layer (the first gate insulating layer 112 acts a thermal conductive bridge due to its insulating properties and therefore does not conduct electricity or generate heat) (Fig. 7 and paragraph 111), and a first display area (a main display area MDA) and a second display area (a peripheral area DPA) (Fig. 4 and paragraph 49), the first display area surrounds at least part of the optical component area (the main display area MDA is shown surrounding the component area CA in Fig. 1), the second display area surrounds at least part of the first display area (the peripheral area DPA is shown surrounding the main display area MDA in Fig. 1), and in the thickness direction of the display panel, the thermal conductive bridge overlaps at least one of the first display area or the second display area (the first gate insulating layer 112 is shown overlapping both the main display area MDA and peripheral area DPA in Fig. 4).
In regard to claim 2, Kang teaches wherein the first insulating layer further comprises at least one second insulating sub-layer (the second gate insulating layer 113 ) located on a side of the first insulating sub-layer facing the substrate (the second gate insulating layer 113 is located on the bottom side of the interlayer insulating layer 115 as shown in Fig. 7);
wherein one second insulating sub-layer at least in contact with the first insulating sub-layer is provided with at least one second insulating opening (the second gate insulating layer 113 is shown in contact the interlayer insulating layer 115 and contains a hole H1) (Fig. 7 and paragraph 158), and in the thickness direction of the display panel, the at least one second insulating opening and the at least one first insulating opening at least partially overlap (the hole H1 of both layers is shown overlapping in Fig. 7); and
the second insulating layer fills the at least one first insulating opening and the at least one second insulating opening (the first organic insulating layer 116 is shown filling the hole H1 in both layers in Fig. 7) (Fig. 7 and paragraph 158).
In regard to claim 3, Kang teaches wherein one second insulating sub-layer of the at least one second insulating sub-layer is provided with at least one second insulating opening (the second gate insulating layer 113 is shown containing a hole H1) (Fig. 7 and paragraph 158).
In regard to claim 4, Kang teaches wherein in the thickness direction of the display panel, the first electrode covers the at least one first insulating opening (the second pixel electrode 121′ and the first hole H1 are shown overlapping in Fig. 7).
In regard to claim 6, Kang teaches further comprising: a pixel defining layer (a pixel-defining layer 119) located on the side of the second insulating layer facing away from the substrate (Fig. 7 and paragraph 131), wherein the pixel defining layer is provided with a first pixel opening (a second opening OP2) (Fig. 7 and paragraph 131), and the first pixel opening exposes the first electrode (the second opening OP2 is shown exposing the second pixel electrode 121’ in Fig. 7) (Fig. 7 and paragraph 131); and in the thickness direction of the display panel, the first pixel opening and the at least one first insulating opening do not overlap (the hole for the source electrode S1 is shown not overlapping the second opening OP2 in Fig. 4).
In regard to claim 7, Kang teaches further comprising: a pixel defining layer (a pixel-defining layer 119) located on the side of the second insulating layer facing away from the substrate (Fig. 7 and paragraph 131), wherein the pixel defining layer is provided with a second pixel opening (a second opening OP2) (Fig. 7 and paragraph 131), and the second pixel opening exposes the first electrode (the second opening OP2 is shown exposing the second pixel electrode 121’ in Fig. 7) (Fig. 7 and paragraph 131); and in the thickness direction of the display panel, the at least one first insulating opening covers the second pixel opening (the overlap of the hole H1 and the second opening OP2 is shown in Fig. 7).
In regard to claim 19, Kang teaches further comprising: a pixel circuit (a main thin-film transistor TFT and an auxiliary thin-film transistor TFT′ including the transparent connection line TWL) (Fig.4 and paragraph 97), wherein the pixel circuit comprises a second pixel circuit (the auxiliary thin-film transistor TFT′ including the transparent connection line TWL functions as the second pixel circuit) located in the optical component area and electrically connected to the first electrode (the transparent connection line TWL is shown located in the component area CA and electrically connected to second pixel electrode 121’) (Fig. 7 and paragraph 97); and in the thickness direction of the display panel, the second pixel circuit and the at least one first insulating opening at least partially overlap (the transparent connection line TWL is shown overlapping the hole H1 in Fig. 7).
In regard to claim 26, Kang teaches a display device (display apparatus 1) (Fig. 3 and paragraph 79), comprising:
a display panel (a display panel 10) (Fig. 3A and paragraph 33), comprising a display area (a display area DA) (Fig. 1 and paragraph 49), wherein the display area comprises a normal display area (a main display area MDA) and an optical component area (a component area CA) (Fig. 1 and paragraph 49), and a light transmittance within the optical component area is greater than a light transmittance within the normal display area (the transmittance of the transmission area TA located in the component area CA would have a higher transmittance than the main display area MDA) (Fig. 2A and paragraph 52); wherein the optical component area comprises a substrate (a substrate 100) (Fig. 7 and paragraph 56), an insulating layer (a second gate insulating layer 113, an interlayer insulating layer 115, a first and second organic insulating layer 116 and 117) and a first electrode (a second pixel electrode 121′) (Fig. 7 and paragraphs 98, 108 and 127), wherein the insulating layer comprises a first insulating layer (the second gate insulating layer 113 and the interlayer insulating layer 115 form the first insulating layer) and a second insulating layer (the first and second organic insulating layer 116 and 117 form the second insulating layer) (Fig. 7), the second insulating layer is located on a side of the first insulating layer facing away from the substrate (the first organic insulating layer 116 is shown on the topside of the interlayer insulating layer 115 away from the substrate 100) (Fig. 7), and the first insulating layer comprises a first insulating sub-layer (the interlayer insulating layer 115) in contact with the second insulating layer (the interlayer insulating layer 115 is shown in contact with the first organic insulating layer 116 in Fig. 7); and wherein the first electrode is located on a side of the second insulating layer facing away from the substrate and the second insulating layer is in contact with the first electrode (the second pixel electrode 121′ is shown on the topside of the first and second organic insulating layer 116 and 117 and shown contacting the second organic insulating layer in Fig. 7); the first insulating sub-layer is provided with at least one first insulating opening (a first hole H1) (Fig. 7 and paragraph 158); and in a thickness direction of the display panel, the second insulating layer covers the at least one first insulating opening (the first and second organic insulating layer 116 and 117 are shown over the first hole H1 in Fig. 7), and the first electrode and the at least one first insulating opening at least partially overlap (the second pixel electrode 121′ and the first hole H1 are shown overlapping in Fig. 7); wherein the display panel further comprises at least one thermal conductive bridge (a first gate insulating layer 112) in contact with the second insulating layer (a first gate insulating layer 112 acts a thermal conductive bridge due to its insulating properties and therefore does not conduct electricity or generate heat) (Fig. 7 and paragraph 111), and a first display area (a main display area MDA) and a second display area (a peripheral area DPA) (Fig. 4 and paragraph 49), the first display area surrounds at least part of the optical component area (the main display area MDA is shown surrounding the component area CA in Fig. 1), the second display area surrounds at least part of the first display area (the peripheral area DPA is shown surrounding the main display area MDA in Fig. 1), and in the thickness direction of the display panel, the thermal conductive bridge overlaps at least one of the first display area or the second display area (the first gate insulating layer 112 is shown overlapping both the main display area MDA and peripheral area DPA in Fig. 4).
In regard to claim 28, Kang teaches wherein the first insulating layer further comprises at least one second insulating sub-layer (the second gate insulating layer 113 ) located on a side of the first insulating sub-layer facing the substrate (the second gate insulating layer 113 is located on the bottom side of the interlayer insulating layer 115 as shown in Fig. 7);
wherein one second insulating sub-layer at least in contact with the first insulating sub-layer is provided with at least one second insulating opening (the second gate insulating layer 113 is shown in contact the interlayer insulating layer 115 and contains a hole H1 and a hole for a source electrode S1) (Fig. 4, Fig. 7 and paragraphs 125 and 158) , and in the thickness direction of the display panel, the at least one second insulating opening and the at least one first insulating opening at least partially overlap (the hole H1 of both layers is shown overlapping in Fig. 7); and
the second insulating layer fills the at least one first insulating opening and the at least one second insulating opening (the first organic insulating layer 116 is shown filling the hole H1 in both layers in Fig. 7) (Fig. 7 and paragraph 158).
In regard to claim 29, Kang teaches wherein in the thickness direction of the display panel, the first electrode covers the at least one first insulating opening (the second pixel electrode 121′ and the first hole H1 are shown overlapping in Fig. 7).
In regard to claim 30, Kang teaches further comprising: a pixel defining layer (a pixel-defining layer 119) located on the side of the second insulating layer facing away from the substrate (Fig. 7 and paragraph 131), wherein the pixel defining layer is provided with a first pixel opening a second opening OP2) (Fig. 7 and paragraph 131), and the first pixel opening exposes the first electrode (the second opening OP2 is shown exposing the second pixel electrode 121’ in Fig. 7) (Fig. 7 and paragraph 131); and in the thickness direction of the display panel, the first pixel opening and the at least one first insulating opening do not overlap (the hole for the source electrode S1 is shown not overlapping the second opening OP2 in Fig. 4).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over of Kang as applied to claim 1, and further in view of Park et al. (US 2014/0140019 A1; hereinafter “Park”)
In regard to claim 16, Kang teaches the display panel according to claim 1, wherein the first insulating layer further comprises a third insulating sub-layer (the top layer of the multiple layers of the second gate insulating layer 113) and a fourth insulating sub-layer (one of the multiple layers interlayer insulating layer 115) (Fig. 7, paragraphs 113 and 118), and at least the third insulating sub-layer and the fourth insulating sub-layer located between the third insulating sub-layer and the second insulating layer is provided with at least one insulating opening (both the second gate insulating layer 113 and the interlayer insulating layer 115 are shown to contain a first hole H1 in Fig. 7).
However, Kang doesn’t explicitly teach compactness of the third insulating sub-layer is greater than compactness of the fourth insulating sub-layer.
Park teaches a display panel (a display apparatus 1) (Fig.2A and paragraph 53), wherein compactness of the third insulating sub-layer (a first insulating layer 12) is greater than compactness of the fourth insulating sub-layer (a second insulating layer 14 is formed thicker than the first insulating layer 12) (Fig. 4A and paragraph 94).
It would have been obvious to one skilled in the art to combine the teachings Kang with the teachings of Park to have compactness of the third insulating sub-layer is greater than compactness of the fourth insulating sub-layer since layer compactness and insulating layer thickness is chosen based on the needs of insulation and components needed to be separated as taught by Park (paragraph 94). Further the examiner notes that the specification contains no disclosure of either the critical nature of the claimed compactness of the third insulating sub-layer or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen compactness of the third insulating sub-layer is critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Kang as applied to claim 1 above, and further in view of Wakita et al. (US 2016/0002407 A1; hereinafter “Wakita”).
In regard to claim 23, Kang doesn’t explicitly teach wherein the substrate is embedded with dopant particles, wherein a thermal conductivity of the dopant particles is greater than a thermal conductivity of a material of the substrate.
Wakita teaches a display panel (a flexible display panel), wherein a substrate is embedded with dopant particles (polyimide precursor resin containing an inorganic filler) (paragraphs 4 and 92), wherein a thermal conductivity of the dopant particles is greater than a thermal conductivity of a material of the substrate (the silica fine particles, alumina fine particles, titania fine particles, zirconia fine particles have a higher thermal conductivity than the materials used as the polyimide precursor that will become a polyimide film) (paragraphs 20 and 52).
It would have been obvious to one skilled in the art to combine teachings of Kang with the teachings of Wakita to have the substrate is embedded with dopant particles, wherein a thermal conductivity of the dopant particles is greater than a thermal conductivity of a material of the substrate since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Claim Objections
Claims 5, 8-12, 14-15, 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
In regard to claim 5, Kang is considered the closest prior art of record. However, Kang fails to teach an opening area of the one first insulating opening is S1, and a coverage area of the first electrode is S2, wherein 0 ≤ (S2 - S1)/S1 ≤ 10%. Kang is silent regarding the coverage area of the electrode.
In regard to claim 8, Kang is considered the closest prior art of record. However, Kang fails to teach the third pixel opening and the at least one first insulating opening partially overlap. Kang teaches any pixel opening would completely overlap a first insulating opening.
In regard to claim 9, Kang is considered the closest prior art of record. However, Kang fails to teach “the first insulating layer comprises the interlayer insulating layer”. While Kang teaches an insulating layer disposed over the active layer, Kang does not teach the first insulating layer comprises the interlayer insulating layer.
In regard to claim 10, Kang is considered the closest prior art of record. However, Kang fails to teach wherein the optical component area further comprises a compensation structure comprising at least one compensation film. Kang is silent regarding the existence of a compensation structure within the device.
Claims 11-12 are objected to due to depending on claim 10.
In regard to claim 14, Kang is considered the closest prior art of record. However, Kang fails to teach wherein the display panel further comprises a first light-emitting element, and the first light-emitting element comprises the first electrode, wherein the first light-emitting element comprises a first red light-emitting element, a first green light-emitting element, and a first blue light-emitting element; the first red light-emitting element comprises a first red electrode, the first green light-emitting element comprises a first green electrode, and the first blue light-emitting element comprises a first blue electrode; the at least one first insulating opening comprises at least one first insulating sub-opening, at least one second insulating sub-opening, and at least one third insulating sub-opening. While Kang does teach that the device is capable of emitting red, blue and green light. Kang does not teach the layout of the device as described by the limitations.
In regard to claim 15, Kang is considered the closest prior art of record. However, Kang fails to teach wherein the display panel further comprises a first light-emitting element, and the first light-emitting element comprises the first electrode, wherein the first light-emitting element comprises a first red light-emitting element, a first green light-emitting element, and a first blue light-emitting element; the first red light-emitting element comprises a first red electrode, the first green light-emitting element comprises a first green electrode, and the first blue light-emitting element comprises a first blue electrode; the at least one first insulating opening comprises at least one first insulating sub-opening, at least one second insulating sub-opening, and at least one third insulating sub-opening. While Kang does teach that the device is capable of emitting red, blue and green light. Kang does not teach the layout of the device as described by the limitations.
In regard to claim 22, Kang is considered the closest prior art of record. However, Kang fails to teach a maximum value of an opening area sum of the plurality of first insulating openings is S3 and a minimum value of the opening area sum of the plurality of first insulating openings is S4, wherein (S3 - S4) / S3 ≤ 20%. Kang is silent regarding the maximum value of an opening area sum of the plurality of first insulating openings.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEYON ALI-SIMAH PUNCHBEDDELL whose telephone number is (571)270-0078. The examiner can normally be reached Mon-Thur: 7:30AM-3:30 PM.
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/SEYON ALI-SIMAH PUNCHBEDDELL/ Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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