DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I, claims 1-8 and 17-19 in the reply filed on 12/04/2025 is acknowledged. The traversal is on the ground(s) that, firstly, Yasuhiro fails to teach “the second semiconductor layer is a conductive Distributed Bragg Reflector (DBR) structure,” as recited in claim 1, based on that Yasuhiro does not teach that the layer 103, a semiconductor layer, is doped. This is not found persuasive because the semiconductor layer, both doped and undoped, can be considered as a conductive layer as disclosed in paragraph [0034] of the specification of Dehe (US 20140210020 A1): “The conductive layer 233 may comprise a polysilicon layer that is doped or undoped” and col. 3, lines 33-37 of the specification of Cook, Jr. (US 3946415 A): “The present invention, though having the general appearance of an IGFET, uses a conductive substantially undoped semiconductive material 32 interposed between the gate and the channel region of the substrate.” Furthermore, Applicant argues that Yasuhiro fails to teach the feature "wherein the conductive DBR structure is a porous conductive DBR structure, the porous conductive DBR structure comprises one or more first porous conductive layers and one or more second porous conductive layers, the one or more first porous conductive layers each has first holes, the one or more second porous conductive layers each has second holes, and one of the first holes has a diameter different from a diameter of one of the second holes.". This feature is not a part of the common technical feature determined at the time the restriction was made and would not impact on the restriction made on 10/07/2025.
The requirement is still deemed proper and is therefore made FINAL.
Claims 9-16 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/04/2025.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 03/31/2023 and 05/06/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 8 and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okurama et al. (US 2005/0145865 A1) in view of Zhang et al. (CN 110098295 A, please see the machine translation attached in this office action).
Regarding claim 1, Okurama et al. teach in Fig. 12, a semiconductor structure (semiconductor light emitting element; Fig. 12, [0001]), comprising: a substrate (11; [0127]), a first semiconductor layer (12/15; [0127, 0129]), an isolation layer (14; [0128]), an active layer (16; [0130]), a second semiconductor layer (17; [0130]), a first electrode (18; [0135]) and a second electrode (19; [0136]), wherein the first semiconductor layer (12/15) has a conductivity type (n-type; [0127, 0129]) opposite to a conductivity type (p-type; [0130]) of the second semiconductor layer (17); the first semiconductor layer (12/15) comprises a flat portion (12; [0127]), first protrusions (a lower portion of 15 in the through hole of 14) and second protrusions (an upper portion of 15 above the through hole of 14) which are stacked sequentially in a vertical direction (vertical direction of Fig. 12), the flat portion (12) is formed on the substrate (11), the isolation layer (14) is formed on the flat portion (12) and comprises first through-holes (the middle through hole of 14) in the vertical direction (vertical direction of Fig. 12), the first protrusions (a lower portion of 15 in the through hole of 14) are formed in the first through-holes (the middle through hole of 14) respectively, the second protrusions (an upper portion of 15 above the through hole of 14) are formed on the first protrusions (a lower portion of 15 in the through hole of 14) respectively, the second protrusions (an upper portion of 15 above the through hole of 14) correspond to the first through-holes (the middle through hole of 14) respectively, the second protrusions (an upper portion of 15 above the through hole of 14) are spaced apart from each other (see Fig. 10), and a side surface of each of the second protrusions (an upper portion of 15 above the through hole of 14) is a bevel (see Fig. 12); the active layer (16), the second semiconductor layer (17), and the first electrode (18) are sequentially stacked on the second protrusions (an upper portion of 15 above the through hole of 14) of the first semiconductor layer (12/15); and the isolation layer (14) is further provided with a second through-hole (the right through hole of 14 in Fig. 12) in the vertical direction (vertical direction of Fig. 12), and the second electrode (19; [0136]) is formed in the second through-hole (the right through hole of 140 in Fig. 12) and is connected to the first semiconductor layer (12/15; see Fig. 12).
Okurama et al. do not teach the second semiconductor layer is a conductive Distributed Bragg Reflector (DBR) structure; wherein the conductive DBR structure is a porous conductive DBR structure, the porous conductive DBR structure comprises one or more first porous conductive layers and one or more second porous conductive layers, each of the one or more first porous conductive layers has first holes, each of the one or more second porous conductive layers has second holes, and one of the first holes has a first diameter different from a second diameter of one of the second holes.
In the same field of endeavor of light emitting devices, Zhang et al. teach the second semiconductor layer (porous conductive DBR layer; 14 in Fig. 1, [0011, 0050]) is a conductive Distributed Bragg Reflector (DBR) structure ([0011]); wherein the conductive DBR structure (14) is a porous conductive DBR structure ([0011, 0050]), the porous conductive DBR structure (14) comprises one or more first porous conductive layers (high-porosity porous GaN layers; [0011]) and one or more second porous conductive layers (low-porosity porous GaN layers; [0011]), each of the one or more first porous conductive layers (high-porosity porous GaN layers) has first holes (holes of the high-porosity porous GaN layers), each of the one or more second porous conductive layers (low-porosity porous GaN layers) has second holes (holes of the low-porosity porous GaN layers), and one of the first holes (holes of the high-porosity porous GaN layers) has a first diameter (pore size, which can be 300 nm; [0015]) different from a second diameter (pore size, which can be 1 nm; [0015]) of one of the second holes (holes of the low-porosity porous GaN layers).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Okurama et al. and Zhang et al., and to form a conductive DBR structure of Zhang et al. on the outer surface of the layer 17 of Okurama et al. under the layer 18 of Okurama et al., and also switching the polarity of layers of Okurama et al. to avoid forming the p-n junction on the layer 17 of Okurama et al., because Okurama et al. teach that the light emitted from the active layer has to be reflected at the outer surface of the layer 17 to have efficient extract of the light ([0145]), while Zhang et al. teach that the conductive DBR structure of Zhang et al. can provide high-reflectivity ([0035]), and the combination of Okurama et al. and Zhang et al. would put the conductive DBR structure in contact with the outer surface of the layer 17 of Okurama et al. to efficiently reflect the light arriving at the outer surface of the layer 17, and further provide the advantages of good conductivity, wide cutoff bandwidth, and easy adjustment of center wavelength ([0035] of Zhang et al.).
Regarding claim 2, Okurama et al. teach the semiconductor structure according to claim 1.
Okurama et al. do not teach wherein, the porous conductive DBR structure comprises the one or more first porous conductive layers and the one or more second porous conductive layers which are alternately stacked and formed after electrochemical corrosion.
In the same field of endeavor of light emitting devices, Zhang et al. teach wherein, the porous conductive DBR structure (14) comprises the one or more first porous conductive layers (high-porosity porous GaN layers) and the one or more second porous conductive layers (low-porosity porous GaN layers) which are alternately stacked and formed after electrochemical corrosion ([0011]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Okurama et al. and Zhang et al., and to form a conductive DBR structure of Zhang et al. on the outer surface of the layer 17 of Okurama et al. under the layer 18 of Okurama et al., and also switching the polarity of layers of Okurama et al. to avoid forming the p-n junction on the layer 17 of Okurama et al., because Okurama et al. teach that the light emitted from the active layer has to be reflected at the outer surface of the layer 17 to have efficient extract of the light ([0145]), while Zhang et al. teach that the conductive DBR structure of Zhang et al. can provide high-reflectivity ([0035]), and the combination of Okurama et al. and Zhang et al. would put the conductive DBR structure in contact with the outer surface of the layer 17 of Okurama et al. to efficiently reflect the light arriving at the outer surface of the layer 17, and further provide the advantages of good conductivity, wide cutoff bandwidth, and easy adjustment of center wavelength ([0035] of Zhang et al.).
Regarding claim 3, Okurama et al. teach the semiconductor structure according to claim 2.
Okurama et al. do not teach wherein materials of the one or more first porous conductive layers and the one or more second porous conductive layers are gallium nitride-based materials.
In the same field of endeavor of light emitting devices, Zhang et al. teach wherein materials of the one or more first porous conductive layers (high-porosity porous GaN layers) and the one or more second porous conductive layers (low-porosity porous GaN layers) are gallium nitride-based materials (GaN; [0011]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Okurama et al. and Zhang et al., and to form a conductive DBR structure of Zhang et al. on the outer surface of the layer 17 of Okurama et al. under the layer 18 of Okurama et al., and also switching the polarity of layers of Okurama et al. to avoid forming the p-n junction on the layer 17 of Okurama et al., because Okurama et al. teach that the light emitted from the active layer has to be reflected at the outer surface of the layer 17 to have efficient extract of the light ([0145]), while Zhang et al. teach that the conductive DBR structure of Zhang et al. can provide high-reflectivity ([0035]), and the combination of Okurama et al. and Zhang et al. would put the conductive DBR structure in contact with the outer surface of the layer 17 of Okurama et al. to efficiently reflect the light arriving at the outer surface of the layer 17, and further provide the advantages of good conductivity, wide cutoff bandwidth, and easy adjustment of center wavelength ([0035] of Zhang et al.).
Regarding claim 4, Okurama et al. teach the semiconductor structure according to claim 1, wherein an angle between the side surface (the left side surface) of each of the second protrusions (an upper portion of 15 above the through hole of 14; see Fig. 3B) and a horizontal plane (the horizontal plane in Fig. 3B) is a first angle (the angle between F1-F4 and the top surface of 14; Fig. 3B), and the first angle (the angle between F1-F4 and the top surface of 14) has a degree range (the degree range of F4 to the top surface of 14) of 20 degrees to 70 degrees (62° to 63°; [0129]).
Regarding claim 5, Okurama et al. teach the semiconductor structure according to claim 4, wherein a sidewall (the left sidewall) of each of the first through-holes (the middle through hole of 14) is a bevel (see Fig. 12 tilted clockwise 30 degrees), and the sidewall (the left sidewall of the first through-hole (the middle through hole of 14) is inclined in a same direction (to the right) as the side surface (the left side surface) of the second protrusion (an upper portion of 15 above the through hole of 14, see Fig. 12 tilted clockwise 30 degrees).
Regarding claim 6, Okurama et al. teach the semiconductor structure according to claim 1, wherein each of the second protrusions (an upper portion of 15 above the through hole of 14) is shaped as a cone, a truncated circular cone, a pyramid or a truncated pyramid (a pyramid; Fig. 7, [0141]).
Regarding claim 8, Okurama et al. teach the semiconductor structure according to claim 1, wherein a material of the first semiconductor layer (12/15) is a gallium nitride-based material (12 of GaN and 15 of GaN [0127, 0129]).
Regarding claim 17, Okurama et al. teach the semiconductor structure according to claim 1, wherein an angle between the side surface (the left side surface) of each of the second protrusions (an upper portion of 15 above the through hole of 14; see Fig. 3B) and a horizontal plane (the horizontal plane in Fig. 3B) is a first angle (the angle between F1-F4 and the top surface of 14; Fig. 3B), and the first angle (the angle between F1-F4 and the top surface of 14) has a degree range (the degree range of F4 to the top surface of 14) of 40 degrees to 70 degrees (62° to 63°; [0129]).
Regarding claim 18, Okurama et al. teach the semiconductor structure according to claim 1, wherein a width w of the second semiconductor layer (17) is less than or equal to 200 µm (the horizontal width of 17 at the top of 17 is 0 µm).
Regarding claim 19, Okurama et al. teach the semiconductor structure according to claim 1, wherein a width w of the second semiconductor layer (17) is less than or equal to 100 µm (the horizontal width of 17 at the top of 17 is 0 µm).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okurama et al. and Zhang et al. as applied to claim 1 above, and further in view of Kim et al. (US 20190371967 A1).
Regarding claim 7, Okurama et al. teach the semiconductor structure according to claim 1, the second semiconductor layer (17) and the first electrode (18).
Okurama et al. do not teach wherein a transparent electrode is further provided between the second semiconductor layer and the first electrode.
In the same field of endeavor of light emitting device, Kim et al. teach wherein a transparent electrode (31; Fig. 4A, [0090]) is further provided between the second semiconductor layer (29; Fig. 4A, [0090]) and the first electrode (35; Fig. 4A, [0090]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Okurama et al., Zhang et al. and Kim et al., and to further include a transparent electrode between the second semiconductor layer and the first electrode as taught by Kim et al. ([0090]), because the transparent electrode can help to spread the electric current as taught by Kim et al. ([0090]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HSIN YI HSIEH whose telephone number is (571)270-3043. The examiner can normally be reached 8:30 - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra V Smith can be reached on 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HSIN YI HSIEH/Primary Examiner, Art Unit 2899 2/8/2026