DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The Office appreciates the amendment to the claims to clarify over the optional nature raised in the previous office action.
Assuming that the claim language will be amended to positively recite the limitations discussed in the affected claims above. Applicant’s attention is directed to the Wang reference (WO 2021068865) which reads on reporting out the high priority UCI before the low priority UCI (Fig. 4, determining that low priority UCI’s are overlapping high UCI’s and, if so, excluding them from the slot to be transmitted at a later time, hence the high priority UCi is “known” before the low priority). Additionally WO 2019160846 additionally teaches several features of the aforementioned claims (See Fig. 8).
Response to Arguments
Applicant's arguments filed 8/22/2025 have been fully considered but they are not persuasive.
In the remarks, Applicant argues, in substance, that Intel fails to disclose the claimed limitations of multiplexing a HARQ-ACK and a SR, the HARQ-ACK comprising an LP HARQ-ACK with a PUCCH format 0 or PUCCH format 1, and the SR comprising an HP SR with PUCCH format 1, and transmitting the LP HARQ-ACK on a PUCCH resource for the positive HP SR using a PUCCH format 1. The Office respectfully disagrees that Intel fails to disclose the limitation in question. The table cited and reproduced by applicant clearly shows that if a (high priority) SR with PF1 is received, and a (low priority) HARQ-ACK with PF1 is received then the “multiplexed UCI is transmitting using PF1 on SR or HARQ-ACK resource”. In other words, both the HP SR and LP HARQ-ACK are multiplexed onto a PUCCH resource and then subsequently transmitted using PF1 (see Intel, p. 4, section 5). The fact that the table shows some scenarios that the UCI is not multiplexed is irrelevant, since the two conditions outlined in the claim (HP SR in PF1 and LP HARQ-ACK in PF1) clearly shows both being multiplexed on the same PUCCH resource and therefore meets the broadest reasonable interpretation of the claim. Additionally claim 1 clearly states “multiplex[ing] a HARQ-ACK and a SR…” and it is not clear what claimed implementation Applicant is alluding to which is not multiplexed. Applicant is reminded that although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). As such Intel clearly meets the invention as claimed and the rejection is maintained.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 5, and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Intel Corporation Intra-UE Multiplexing and Prioritization scheme in Release 17 URLLC/IIoT 3GPP TSG RAN WG1 2020.08.08 (cited by applicant in IDS) (hereinafter Intel).
Referring to claim 1, Intel discloses A user equipment (UE), comprising:
a processor configured to: determine that joint reporting of uplink control information (UCI) with different priorities is configured and a multiplexing timeline is satisfied (section 1 bullet 3a “Specify multiplexing behavior among HARQ-ACK/SR/CSI and PUSCH”); and
multiplex a hybrid automatic repeat request-acknowledgement (HARQ-ACK) and a scheduling request (SR), the HARQ-ACK comprising a low priority HARQ-ACK with a PUCCH format 0 or a PUCCH format 1, and the SR comprising a high priority SR with a PUCCH format 1 (Section 5; Proposal 6 shows multiplexing HP SR with LP HARQ-ACK on PUCCH format 1); and
transmitting circuitry configured to transmit the multiplexed HARQ- ACK and SR by transmitting the low priority HARQ-ACK on a PUCCH resource for a positive high priority SR using PUCCH format 1 (Section 3 proposal 3: “Multiplexed HARQ-ACK payloads are transmitted using PUCCH configuration”).
Claim 5 is rejected for similar reasons as stated above. Furthermore, Intel inherently discloses a base station comprising a processor and receiving circuitry in order to effect the results of multiplexing the high priority SR with low priority HARQ-ACK signals.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Apple inc. Intra-UE Multiplexing/Prioritization for URLLC 3GPP TSG RAN WG1 R1-2006517 (cited by applicant in IDS) (Hereinafter Apple).
Referring to Claim 2, Intel discloses the invention as described in claim 1 above. While intel does disclose joint reporting of UCI with different priorities, Intel does not explicitly disclose that it is configured by higher layer signaling with RRC parameters. In analogous art, Apple discloses another system which discloses configuring joint reporting of UCI by RRC parameters (See Section 2 Fig 1 showing RRC configuration of various signals). It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teaching of Apple with Intel to effect the configuration using RRC in order to utilize well known and established protocols with predictable results.
Claim 6 is rejected for similar reasons as stated above.
Claim(s) 3, 4, 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Yin et al. (US PGPUB 20230354313) (hereinafter Yin).
Regarding claim 3, Intel discloses the invention as described above. Intel does not explicitly state multiplexing the UCI is performed on a timeline such that a report of the high priority UCI on a high PUCCH is known before a starting symbol of a low priority PUCCH for a low priority UCI. In analogous art, Yin discloses another system which shows various UCI’s of different priorities being multiplexed together, wherein the report of the high priority UCI on a high PUCCH is known before a starting symbol of a low priority PUCCH for a low priority UCI (i.e. para 85-87 and Fig. 7: UE postpones the LPUL1 to be multiplexed with a subsequent HP UL2 when successfully receiving a high priority downlink transmission (HP DL2). In other words, since it successfully received a HP DL transmission it “knows” of a high priority uplink transmission prior to LP UL1. It would have been obvious to one of ordinary skill in the art before the effective filing date to combine Yin’s teaching of known future high priority transmissions prior to low priority transmissions in order to effectively plan and predict transmissions for efficient use of bandwidth.
Regarding claim 4, Intel discloses the invention as described above. Intel does not explicitly state that multiplex processing time is to be added to the timeline to support the multiplexing of the UCI with different priorities. In analogous art, Yin discloses another system which shows various UCI’s of different priorities being multiplexed together which takes into account processing time to support the multiplexing of the UCI with different priorities (see para 59: the first multiplexing timeline condition for the high priority service time comprises a first processing time). It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the multiplexing techniques of Yin with Intel and its transmissions in order to effectively plan and predict transmissions for efficient use of bandwidth.
Claims 7 and 8 are rejected for similar reasons as stated above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joseph E Avellino whose telephone number is (571)272-3905. The examiner can normally be reached Monday-Friday 7:00am-3:00pm.
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JOSEPH E. AVELLINO
Supervisory Patent Examiner
Art Unit 2478
/JOSEPH E AVELLINO/Supervisory Patent Examiner, Art Unit 2478
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