DETAILED ACTION
This Office Action is in response to the Applicant Election filed on 11/26/2025.
Currently, claims 1, 3-18, and 20 are pending the in application. Currently, claims 9-14 and 16 are withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election with traverse of Species III (Figs. 20-22) in the reply filed on 11/26/2025 is acknowledged. Applicant’s traversal is on the ground(s) that the cited prior art does not teach all of the limitations amended independent claim. This argument is not found persuasive because the shared technical features were not special in view of the prior art at the time of restriction. Further, the Species do not have shared special technical features in view of the cited prior art (see prior art rejections below). Claims 9-14 and 16 do not read on the elected Species and are withdrawn by the Examiner. (The Examiner notes that claims 9-14 and 16 reads on Species II (Figs. 8-9). Claims 9-14 and 16 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-selected invention, there being no allowable generic or linking claim. Claims 1, 3-8, 15,17, 18, and 20 are examined in this Office action.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/24/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the drive chip and second connection line being electrically connected to the drive chip (see claim 17) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
The drawings are also objected to because Fig. 8 appears to have several illegible reference numbers within the display region.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection(s) to the drawings will not be held in abeyance.
Claim Objections
Claim 15 and 18 are objected to because of the following informalities:
In claims 15 and 18, “active layers of a plurality of transistors” should read “active layers of the plurality of transistors”.
In claims 15 and 18, “gate electrodes of a plurality of transistors” should read “gate electrodes of the plurality of transistors”.
Further, claims 15 and 18 appear to have the same claim language verbatim and are both directly dependent on claim 1.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 16 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 16 and 18 recite the limitation “a first source-drain metal layer, a second source-drain metal layer, and a third source-drain metal layer”. It is unclear if the source-drain metal layers of claims 16 and 18 are the same or different than the source-drain metal layers recited in claim 1. Therefore, the claim has an indefinite scope. For the purpose of examination, this limitation will be read as: “the first source-drain metal layer, the second source-drain metal layer, and the third source-drain metal layer”. The Examiner notes that similar language is used in withdrawn claim 10.
Claims 16 and 18 recite the limitation “a base substrate”. It is unclear if the base substrate of claims 16 and 18 are the same or different than the base substrate recited in claim 1. Therefore, the claim has an indefinite scope. For the purpose of examination, this limitation will be read as: “the base substrate”. The Examiner notes that similar language is used in withdrawn claim 10.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6-8, 15, 17, and 18 are rejected under 35 U.S.C. 103 as being obvious over BANG et al. (US Pub. No. 2023/0422564) in view of ZHAO et al. (US Pub. No. 2021/0118976).
Regarding independent claim 1, Bang teaches a display substrate (Fig. 1), comprising a display region (Fig. 1, AA, ¶ [0041]),
wherein the display region comprises a drive structure layer (Figs. 4-6, ) disposed on a base substrate (Fig. 5, 100, ¶ [0085]),
the drive structure layer at least comprises a plurality of circuit units (Fig. 3 PX, ¶ [0077]) forming a plurality of unit rows and a plurality of unit columns (Figs. 1 & 4), a plurality of data signal lines (Fig. 1, DL, ¶ [0043]), a plurality of first connection lines (Fig. 1, ELH, ¶ [0042]) and a plurality of second connection lines (Fig. 1, ELV, ¶ [0042]),
the circuit unit comprises a pixel drive circuit (Fig. 3, ¶ [0061]),
the data signal line is configured to supply a data signal to the pixel drive circuit (It would be obvious that Bang’s data lines DL would be capable of transmitting a data signal),
the second connection line extending in a second direction (Fig. 1, ELV extends vertically) is connected to the first connection line (¶ [0045]) extending in a first direction (Fig. 1, ELH extends horizontally), and
the first connection line extending in a first direction is connected to the data signal line (¶ [0045]) extending in a second direction (Fig. 1, DL extends vertically);
wherein the first direction and the second direction intersect (Fig. 1).
However, Bang does not explicitly teach that on a plane perpendicular to the display substrate, the drive structure layer comprises a plurality of conductive layers arranged sequentially on the base substrate,
the data signal line, the first connection line and the second connection line are disposed in different conductive layers,
the plurality of conductive layers comprise a first source-drain metal layer, a second source-drain metal layer and a third source-drain metal layer arranged sequentially along a direction away from the base substrate;
the first source-drain metal layer at least comprises the first connection line, the second source-drain metal layer at least comprises the data signal line, and the third source-drain metal layer at least comprises the second connection line;
the third source-drain metal layer is connected to the first connection line located in the first source-drain metal layer through an interlayer connection block, the first connection line located in the first source-drain metal layer is connected to the data signal line located in the second source-drain metal layer through a connection electrode, and a wiring changing structure comprising vertical wiring of the third source-drain metal layer, horizontal wiring of the first source-drain metal layer, and vertical wiring of the second source-drain metal layer is formed.
However, Zhao is a pertinent art that teaches on a plane perpendicular to the display substrate, the drive structure layer comprises a plurality of conductive layers (Fig. 4, M1 + M2 + M3, ¶ [0045]) arranged sequentially on the base substrate,
the data signal line (Figs. 3 & 4, 30, ¶ [0036]), the first connection line (Figs. 3 & 4, 40, ¶ [0034]) and the second connection line (Figs. 3 & 4, 50, ¶ [0034]) are disposed in different conductive layers (Fig. 4),
the plurality of conductive layers comprise a first source-drain metal layer (Fig. 4, M1, ¶ [0045]), a second source-drain metal layer (Fig. 4, M2, ¶ [0045]) and a third source-drain metal layer (Fig. 4, M3, ¶ [0045]) arranged sequentially along a direction away from the base substrate;
the first source-drain metal layer at least comprises the first connection line, the second source-drain metal layer at least comprises the data signal line, and the third source-drain metal layer at least comprises the second connection line (Fig. 4);
the third source-drain metal layer is connected to the first connection line located in the first source-drain metal layer through an interlayer connection block (Fig. 4, K2, ¶ [0056]), the first connection line located in the first source-drain metal layer is connected to the data signal line located in the second source-drain metal layer through a connection electrode (Fig. 4, metal connecting M1 and M2), and a wiring changing structure comprising vertical wiring of the third source-drain metal layer, horizontal wiring of the first source-drain metal layer, and vertical wiring of the second source-drain metal layer is formed.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Bang’s conductive layers and connections according to the teaching of Zhao (Figs. 3-4) in order to improve display panel uniformity (Zhao ¶ [0035]).
Regarding claim 6, Bang modified by Zhao teaches the display substrate according to claim 1,and Zhao teaches that in at least one circuit unit, the second source-drain metal layer (Fig. 4, M2, ¶ [0045]) further comprises an interlayer data connection block (Fig. 4, portion of M2 vertically overlapping M1) connected to the first connection line (Fig. 4, M1, ¶ [0045]) through a via hole (Fig. 4, area occupied by metal in-between M1 and M2), and
the second connection line (Figs. 3 & 4, 50, ¶ [0034]) is connected to the interlayer data connection block through a via hole (Fig. 4, area occupied by K2, ¶ [0056]).
Regarding claim 7, Bang modified by Zhao teaches the display substrate according to claim 6, and Zhao teaches that in at least one circuit unit, the third source-drain metal layer (Fig. 4, M3, ¶ [0045]) further comprises a data connection electrode (Fig. 4, portion of M3 vertically overlapping M2) connected to the second connection line, and the data connection electrode is connected to the interlayer data connection block (Fig. 4, portion of M2 vertically overlapping M1) through a via hole (Fig. 4, area occupied by K2).
Regarding claim 8, Bang modified by Zhao teaches the display substrate according to claim 1, and Bang teaches that at least one unit row (Fig. 1, rows of ELH) is provided with two first connection lines (Fig. 1, ELH, ¶ [0042]) sequentially arranged along the first direction, a first break (Fig. 1, gap between two adjacent ELH) is provided between the two first connection lines, and a plurality of first breaks of the plurality of unit rows are located in the same circuit column (Fig. 1).
Regarding claim 15, Bang modified by Zhao teaches the display substrate according to claim 1, and Zhao teaches that the pixel drive circuit at least comprises a storage capacitor (Fig. 5, 71, ¶ [0052]) and a plurality of transistors (Fig. 5, 70, ¶ [0052]), the plurality of conductive layers comprise a semiconductor layer (Fig. 5, layer below M4. The Examiner notes that the layer below Zhao’s source, gate, and drain would be Zhao’s semiconductor layer in the same manner as Bang’s active pattern (see Bang Fig. 5, ACT, ¶ [0087])), a first gate metal layer (Fig. 5, M4, ¶ [0053]), a second gate metal layer (Fig. 5, area of 712, ¶ [0052]), the first source-drain metal layer (Fig. 4, M1, ¶ [0045]), the second source-drain metal layer (Fig. 4, M2, ¶ [0045]), and the third source-drain metal layer (Fig. 4, M3, ¶ [0045]) arranged sequentially in a direction away from the base substrate, the semiconductor layer at least comprises active layers of a plurality of transistors, the first gate metal layer at least comprises gate electrodes (Fig). 5, 721, ¶ [0052] of the plurality of transistors and a first electrode plate (Fig. 5, 711, ¶ [0052]) of the storage capacitor, the second gate metal layer at least comprises a second electrode plate (Fig. 5, 712, ¶ [0052]) of the storage capacitor, the first source-drain metal layer at least comprises the first connection line (Fig. 5, 40, ¶ [0034]), the second source-drain metal layer at least comprises the data signal line (Fig.5, 30, ¶ [0036]), and the third source-drain metal layer at least comprises the second connection line (Fig.5 , 50, ¶ [0034]).
Regarding claim 17, Bang modified by Zhao teaches a display apparatus comprising a display substrate according to claim 1 (see Regarding independent claim 1) and a drive chip (Bang Fig. 1, PAa + PAb, ¶ [0052]) fixedly disposed on the display substrate, the second connection line (Bang Fig. 1, ELV, ¶ [0042] is electrically connected to the drive chip (Bang Fig. 1, ELV is connected to ELP in PAa and PAb).
Regarding claim 18, Bang modified by Zhao teaches the display substrate according to claim 1, and Zhao teaches that the pixel drive circuit at least comprises a storage capacitor (Fig. 5, 71, ¶ [0052]) and a plurality of transistors (Fig. 5, 70, ¶ [0052]), the plurality of conductive layers comprise a semiconductor layer (Fig. 5, layer below M4. The Examiner notes that the layer below Zhao’s source, gate, and drain would be Zhao’s semiconductor layer in the same manner as Bang’s active pattern (see Bang Fig. 5, ACT, ¶ [0087])), a first gate metal layer (Fig. 5, M4, ¶ [0053]), a second gate metal layer (Fig. 5, area of 712, ¶ [0052]), the first source-drain metal layer (Fig. 4, M1, ¶ [0045]), the second source-drain metal layer (Fig. 4, M2, ¶ [0045]), and the third source-drain metal layer (Fig. 4, M3, ¶ [0045]) arranged sequentially in a direction away from the base substrate, the semiconductor layer at least comprises active layers of a plurality of transistors, the first gate metal layer at least comprises gate electrodes (Fig). 5, 721, ¶ [0052] of the plurality of transistors and a first electrode plate (Fig. 5, 711, ¶ [0052]) of the storage capacitor, the second gate metal layer at least comprises a second electrode plate (Fig. 5, 712, ¶ [0052]) of the storage capacitor, the first source-drain metal layer at least comprises the first connection line (Fig. 5, 40, ¶ [0034]), the second source-drain metal layer at least comprises the data signal line (Fig. 5, 30, ¶ [0036]), and the third source-drain metal layer at least comprises the second connection line (Fig. 5 , 50, ¶ [0034]).
Allowable subject matter
Claims 3-5 and 20 are objected to as being dependent upon a rejected base claim (claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
With respect to dependent claim 3, the cited prior art does not anticipate or make obvious, inter alia, the step of: “the pixel drive circuit at least comprises a data write transistor, and the first source-drain metal layer further comprises a first electrode of the data write transistor; and in at least one circuit unit, the first connection line is connected to a first electrode of the data write transistor, and the data signal line is connected to the first electrode of the data write transistor through a via hole.” Claims 4 and 20 are dependent on claim 3.
With respect to dependent claim 5, the cited prior art does not anticipate or make obvious, inter alia, the step of: “in at least one circuit unit, the second source-drain metal layer further comprises an interlayer dummy connection block, which is connected to the first connection line through a via hole, and the third source-drain metal layer further comprises a dummy electrode, which is connected to the interlayer dummy connection block through a via hole.”
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub No. 2021/0273035 by Cho et al. discloses a display device.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub No. 2018/0039146 by Tanaka et al. discloses a display device.
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/R.P.S./
Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813