Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to claims filed on 05/02/2023
Claims 1-15 are pending.
Claims 3, 6-9, 12, and 14-15 were amended.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/02/2023 is being considered by the examiner.
Claim Objections
Claims 1-15 objected to because of the following informalities: Claim 1-4, 6, 12-13, recites the limitation "visualisation", it should be “visualization”. Claim 8, recites “network;.”, it should be “network;”. Claim 12, recites “in metres”, it should be “in meters”. Appropriate correction is required.
Dependent claims do not resolve the issue in the independent claim, and thus are also objected by virtue of their dependence on the rejected independent claim.
Claim 14 is objected as being a substantial duplicate of claim 13. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-11 and 13-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ramesh Bansal, NPL “Power System Protection in Smart Grid Environment”, Mathematical Biosciences and Engineering, Published: December 18, 2018, (hereafter Bansal).
Regarding claim 1. Bansal teaches a computer-implemented method of evaluating circuit protection of a power network (Page 198, Sec 6.1, protection equipment, functions, LTE protection calculations), the method including:
simulating, using a power network simulation module, the power network which includes at least one power source, at least one conductor or feeder connected to the power source and associated circuit protection (Page 201, sec 6.3, fig 6.1, source, feeders, and protection devices);
simulating, using the power network simulation module, at least one fault on the power network at a predetermined fault position on the conductor or feeder for a predefined simulation time (Page 245, Fig 6.32, Fault point) (Page 209, Fig 6.6, high set is applied, grading graphs) (Page 209, Par 2, high set pickup);
calculating, using a processor, conductor Let-Through Energy (LTE) exposure, due to the simulated fault, across a predetermined length of the conductor for the predefined simulation time (Page 217, sec 6.5LTE) (Page 219, sec 6.5.1.2, LTE equation 6.12) (Page 220, Fig 6.13, LTE, Distance, Fault level) (Page 228, Fig 6.18, LTE, Distance, Fault exposure time); and
graphically representing, using a graphical display of a computing device, a three- dimensional visualisation of the conductor LTE exposure across the predetermined length of the conductor for the predefined simulation time (Page 228, Fig 6.18, LTE, Distance, Fault exposure time, thus a three dimensional visualization).
Regarding claim 2. Bansal teaches the method as claimed in claim 1, wherein the three-dimensional visualisation has three axes, a first axis of the three-dimensional visualisation representing line distance or position (in metres) along the predetermined length of the conductor (Page 228, Fig 6.18, Distance (Km)),
a second axis of the three-dimensional visualisation representing elapsed fault time (in seconds) (Page 228, Fig 6.18, Fault exposure time (s)) and
a third axis representing LTE energy (MA2s) (Page 228, Fig 6.18, Let-through Energy (MA2S)).
Regarding claim 3. Bansal teaches the method as claimed in claim 1, wherein simulating the power network includes determining an LTE threshold or limit for the conductor or feeder of the power network (Page 228, Fig 6.18, Rabbit conductor limit) and
wherein graphically representing the three-dimensional visualisation of the conductor LTE exposure includes simultaneously graphically representing the LTE threshold for the conductor and the conductor LTE exposure on the same three-dimensional visualization (Page 228, Fig 6.18, all are display within the same graph).
Regarding claim 4. Bansal teaches the method as claimed in claim 3, which includes highlighting intersection of the LTE threshold and the conductor LTE exposure on the three-dimensional visualization (Page 228, Fig 6.18, conductor limit, uses a differentiator and is plotted on the same graph).
Regarding claim 5. Bansal teaches the method as claimed in claim 4, which includes graphically representing, using the graphical display (Page 228, Fig 6.18, all graph display),
a heatmap of the conductor LTE exposure including the highlighted intersection of the LTE threshold and the conductor LTE exposure which graphically illustrates a depth of damage caused along the conductor by excessive conductor LTE exposure over time (Page 220, Fig 6.13, illustrates, fault level and conductor limit, thus illustrate if passed the limit damage occurs) (Page 223, Fig 6.15, fault current, vs temperature, thus heating of conductor).
Regarding claim 6. Bansal teaches the method as claimed in claim 3, which includes superimposing, in three dimensions, using the graphical display, the simulated conductor LTE exposure over the LTE threshold for the conductor in the three-dimensional visualization (Page 228, Fig 6.18, all are display within the same graph).
Regarding claim 7. Bansal teaches the method as claimed in claim 3, which includes identifying, using the computing device,
areas along the conductor where conductor LTE exposure exceeds the LTE threshold (Page 228, Fig 6.18, area on the right of the graph, LTE, no Highset, 2 Trips),
if any, and calculating, using the processor, a threshold- exceeding fault time which is the fault time at which the conductor LTE exposure exceeds the LTE threshold at any given point along the conductor (Page 228, Fig 6.18, fault exposure time, intersects with conductor limit).
Regarding claim 8. Bansal teaches the method as claimed in claim 3, which includes:
simulating, using the power network simulation module, multiple circuit protection elements at different positions of the power network (Page 201, Fig 6.1, AR, CB, Fuse);.
setting circuit protection parameters for each circuit protection element based upon a specific protection philosophy (Page 205, Sec 6.4.2.1, IDMT, parameters that can be changed or set);
grading the network so as to obtain selectivity and ensuring that the circuit protection elements are sensitive to faults (Page 210, Par 2, sensitive to faults beyond the relay B position) (Page 233, Fig 6.23, top down grading method); and
suggesting, using the power network simulation module, potential changes to the circuit protection parameters to prevent the conductor LTE exposure from exceeding the LTE threshold (Page 220, Par 2, conductor limit is exceeded for the first 1.17 km of the feeder).
Regarding claim 9. Bansal teaches the method as claimed in claim 3, which includes simulating, using the power network simulation module, a multi-source, interconnected power network (Page 230, Fig 6.20, source for relay A, and source for relay C) (Page 245, Fig 6.31, Multiple sources).
Regarding claim 10. Bansal teaches the method as claimed in claim 9, wherein calculating conductor LTE exposure includes generating, using a data generation module, fault current values of the power network based upon the circuit protection of the power network for the predefined simulation time and at each position along the predetermined length of the conductor (Page 258, Fig 6.44, Fault current, LTE) (Page 256, Example 6.5, protection setting applied to the feeder circuit breaker relay).
Regarding claim 11. Bansal teaches the method as claimed in claim 10, which includes: generating, using the data generation module, a matrix of discrete incremental data points for the predetermined length of the conductor and the predefined simulation time (Page 249, Fig 6.36, discrete incremental, sequence A and B); and
calculating, using the processor, conductor LTE exposure for each data point of the matrix (Page 250, Par 6, sequence A and B, LTE curve and fault exposure time).
Regarding claim 13. Bansal teaches a system for evaluating circuit protection of a power network, the system including at least one computing device having a processor and a power network simulation module (Page 198, Sec 6.1, protection equipment, functions, LTE protection calculations), wherein the system is configured to:
simulate, using the power network simulation module, the power network which includes at least one power source, at least one conductor or feeder connected to the power source and associated circuit protection (Page 201, sec 6.3, fig 6.1, source, feeders, and protection devices);
simulate, using the power network simulation module, at least one fault on the power network at a predetermined fault position on the conductor or feeder for a predefined simulation time (Page 245, Fig 6.32, Fault point) (Page 209, Fig 6.6, high set is applied, grading graphs) (Page 209, Par 2, high set pickup);
calculate, using the processor, conductor Let-Through Energy (LTE) exposure, due to the simulated fault, across a predetermined length of the conductor for the predefined simulation time (Page 217, sec 6.5LTE) (Page 219, sec 6.5.1.2, LTE equation 6.12) (Page 220, Fig 6.13, LTE, Distance, Fault level) (Page 228, Fig 6.18, LTE, Distance, Fault exposure time); and
graphically represent, using a graphical display of the computing device, a three- dimensional visualisation of the conductor LTE exposure across the predetermined length of the conductor for the predefined simulation time (Page 228, Fig 6.18, LTE, Distance, Fault exposure time, thus a three dimensional visualization).
Regarding claim 14. Bansal teaches the system as claimed in claim 13, which is configured to perform the method steps as claimed in claim 1 (Rejected under the same grounds of claim 1).
Regarding claim 15. Bansal teaches a non-transitory computer-readable storage medium, having program instructions stored thereon, which, when executed by a processor of a computing system (Page 248, Fig 6.34, software application), enable the computing system to perform the method steps as claimed in claim 1 (Rejected under the same grounds of claim 1).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ramesh Bansal, NPL “Power System Protection in Smart Grid Environment”, Mathematical Biosciences and Engineering, Published: December 18, 2018, (hereafter Bansal), in views of Dong Wang, NPL, “A Novel Fault Let-Through Energy Based Fault Location for LVDC Distribution Networks”, Published: May 28, 2020 (hereafter Wang).
Regarding claim 12. Bansal teaches the method as claimed in claim1, which includes calculating, using the processor, under the three- dimensional visualisation of the conductor LTE exposure (Page 251, fig 6.37, LTE) (Page 229, Fig 6.19, projection Energy area, LTE (MA2s multiply by distance, MA2s*m),
calculated by taking a product of line distance (in metres), fault time (in seconds) and LTE exposure (MA2s) (Page 251, Fig 6.37, LTE, Distance, Fault exposure time),
the calculated volume aiding in quantifying conductor LTE exposure into a single figure (Page 229, par 1, calculates an energy area, illustrates the risk),
wherein this calculated figure is used to assess the effect of changes made to circuit protection parameters upon conductor LTE exposure with the aim of classifying the net effect on the conductor LTE exposure as an increase, decrease or no effect thus aiding in configuring the circuit protection parameters applied in the power network (Page 229, par 1, illustrates the risk reduction by changing some parameters).
Bansal does not teach a volume under the three-dimensional visualization.
Wang teaches a volume under the three-dimensional visualization (Page 972, Fig 9, three dimensional visualization having a volume).
It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Bansal to incorporate the teachings of Wang to display on a three dimensional visualization volume because facilitates post fault network maintenance (Wang, Page 966, abstract)
Conclusion
The prior art made of record, listed on PTO-892, and not relied upon is considered pertinent to applicant's disclosure.
Martin J. Slabbert, NPL, “Application of let-through energy to back-up over-current protection on high-voltage feeders”, disclose a concept of LTE evaluation, calculate the relay operating time for IDMT relays based on an average disk speed, allowing to evaluate the conductor LTE exposure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANGEL JAVIER CALLE whose telephone number is (571)272-0463. The examiner can normally be reached Monday - Friday 7:30 a.m. - 5 p.m..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rehana Perveen can be reached at (571)-272-3676. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/A.C./Examiner, Art Unit 2189
/REHANA PERVEEN/Supervisory Patent Examiner, Art Unit 2189
Prosecution Insights