Prosecution Insights
Last updated: July 17, 2026
Application No. 18/035,113

A LEARNING-BASED SURROGATE MODEL OF CONDUCTED NOISE FROM INTEGRATED CIRCUITS (ICS) UNDER DIFFERENT OPERATING CONDITIONS

Non-Final OA §103
Filed
May 03, 2023
Priority
Nov 06, 2020 — IN 202041048613 +1 more
Examiner
TSENG, KYLE HWA-KAI
Art Unit
Tech Center
Assignee
Simyog Technology Pvt Ltd.
OA Round
1 (Non-Final)
48%
Grant Probability
Moderate
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allowance Rate
11 granted / 23 resolved
-12.2% vs TC avg
Strong +75% interview lift
Without
With
+74.6%
Interview Lift
resolved cases with interview
Typical timeline
4y 0m
Avg Prosecution
17 currently pending
Career history
48
Total Applications
across all art units

Statute-Specific Performance

§101
8.2%
-31.8% vs TC avg
§103
85.5%
+45.5% vs TC avg
§102
3.6%
-36.4% vs TC avg
§112
2.7%
-37.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 23 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on May 4, 2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner. Claim Objections Claim 1 is objected to because of the following informalities: Claim 1 recites “A method […] comprising of,” which should be corrected to “A method […] comprising.” Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-2 and 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oltean et al. (Oltean, Gabriel, Alex Prodan, Monica Rafaila, and Laura Ivanciu. "PREDICTION OF WAVEFORMS UNDER THE VARIATION OF INPUT PARAMETERS USING NEURAL NETWORKS." Acta Technica Napocensis 54, no. 4 (2013): 1.), hereinafter Oltean, in view of Van Hoang et al., (Van Hoang, Thi Quynh, Daniela Yassuda-Yamashita, Priscila Fernandez-Lopez, and Frédéric Lafon. "SPICE model extraction for a MOSFET based on a parametric simulation and waveform measurement." In 2017 International Symposium on Electromagnetic Compatibility-EMC EUROPE, pp. 1-6. IEEE, 2017.), hereinafter Hoang. Regarding Claim 1, Oltean teaches A method to generate a surrogate behavioral model from noise emitted or exhibited at a pin of an integrated circuit under different operating conditions to train a set of artificial neural networks for recreation of a time or frequency domain behavioural model (“In this paper we evaluate Neural Networks as an efficient way to develop a model that can predict waveforms (signals), based only on an input set of parameters (factors), given that a significant training data set is provided.”) (e.g., page 2, column 1, paragraph 3). (“The waveforms in the data set are determined by a combination of input parameters. For each individual set of parameters p, the corresponding waveform is selected (see Figure 2).”) (e.g., page 2, column 2, paragraph 2). training a set of artificial neural networks (ANN) to predict the behavior of the IC- pins using the set of features extracted (“To develop our model, a fitting neural network [18] is used, with one hidden layer with a sigmoid activation function. The output layer uses a linear activation function. Supervised training is used, meaning that in each training epoch, the parameters of the network (weights and biases) are adapted based on an error calculated as a distance between the target (original waveform samples) and the output (predicted output samples) computed by the neural network.”) (e.g., page 2, column 2, paragraph 3). predicting the features corresponding to a new operating condition specified by a set of parameter values provided from a graphical user interface (GUI), with the set of trained artificial neural networks (“The full data set consists of 200 waveforms corresponding to the combinations of the input parameters, sampled in 105 points, describing the main characteristics of the waveforms. For the training procedure, the full data set was split into three data subsets: training subset (70% of the data set), validation subset (15% of the data set) and testing subset (15% of the data set) [...] After successfully training the neural network, some analysis concerning the performances of this process was made. The performance validation graph is presented in Figure 5.”) (e.g., page 4, column 1, paragraph 2; column 2, paragraph 2; page 4, figure 5). recreating the time domain waveform by the predicted feature values corresponding to the new operating condition (“The output of the neural network will be represented by a collection of predicted time samples (pred_ISw) corresponding to the position of 1st order coefficients extracted from the nominal waveform.”) (e.g., page 2, column 2, paragraph 2). recreating the frequency domain waveform from the time domain waveform corresponding to the new operating condition (“The 1st order coefficients were obtained by applying a FFT operation on the 1st order samples (pred_ISw) predicted by the neural network,” wherein the coefficients represent a frequency domain waveform.) (e.g., page 3, column 1, paragraph 2). However, Oltean does not appear to specifically teach inserting an IC to be tested for behavioral model creation on the printed circuit board (PCB) and measuring response behavior of the IC-pins by changing operating conditions as a function of a set of parameters where each parameter has a parameter range, or -simulating response behavior of the IC-pins by changing operating conditions as a function of a set of parameters where each parameter has a parameter range, and extracting a set of features from each of the measured/simulated time domain waveforms at IC-pins On the other hand, Hoang, which discloses a method for parametrically simulating a MOSFET, does teach inserting an IC to be tested for behavioral model creation on the printed circuit board (PCB) (“Fig. 2 presents the test board, whose the equivalent circuit is shown in Fig. 1, for characterizing MOSFETs.”) (e.g., page 2, column 1, paragraph 3). measuring response behavior of the IC-pins by changing operating conditions as a function of a set of parameters where each parameter has a parameter range, or -simulating response behavior of the IC-pins by changing operating conditions as a function of a set of parameters where each parameter has a parameter range (“Our parametric study consists in varying the value of each intrinsic parameter of the MOSFET around its typical value in order to evaluate the influence of each parameter on each zone of the waveforms Vgs, Vds and Ids. Fig. 6 illustrates an example of a parametric study on the Cox value (from 0.1nF to 1.2nF) of the MOSFET IPD50N04S3.”) (e.g., page 3, column 2, paragraph 2). extracting a set of features from each of the measured/simulated time domain waveforms at IC-pins (“Once we know the impact of each parameter on the waveforms, we are interested in using this information to adjust the intrinsic parameters of the component in order to adjust the simulation results to the measurement ones and then obtain a reliable model of the component.”) (e.g., page 3, column 2, last paragraph). It would have been obvious to one of ordinary skill in the art before the effective filing date of the Applicant's claimed invention to combine Oltean with Hoang. The claimed invention is considered to be merely combining prior art elements according to known methods to yield predictable results, see MPEP § 2143(I)(A). Oltean teaches an artificial neural network to predict an IC waveform based on input parameters. However, Oltean does not specifically teach measuring a response behavior of an IC by changing operating conditions. On the other hand, Hoang, which discloses a method for parametrically simulating a MOSFET, does teach parametrically simulating an electrical circuit. As Oltean discloses an ANN using input parameters related to a waveform, and Hoang discloses a method for acquiring similar electrical parameters, one of ordinary skill in the art could have combined the measurement and feature extraction of Hoang with the ANN of Oltean; in combination, each element merely performs the same function as it does separately. Furthermore, one of ordinary skill in the art would have recognized the result of the combination as predictably providing a source for the input parameters to the ANN of Oltean. Therefore, it would have been obvious to a person of ordinary skill in the art to combine Oltean with Hoang in order to provide a specific method of acquiring input parameter data. Regarding Claim 2, Oltean in view of Hoang teaches The method to generate a surrogate behavioral model as claimed in claim 1. Oltean further teaches wherein the said parameters affecting the behaviors of the IC are electrical or geometrical properties (“The SystemC-AMS model is subject to simulations, to extract the output signals corresponding to applied variations on the DUT and Load parameters […] The waveforms in the data set are determined by a combination of input parameters. For each individual set of parameters p, the corresponding waveform is selected (see Figure 2).” Load parameters are interpreted as electrical properties that used as input parameters.) (e.g., page 1, column 2, paragraph 3; page 2, column 2, paragraph 3). Regarding Claim 4, Oltean in view of Hoang teaches The method to generate a surrogate behavioral model as claimed in claim 1. Oltean further teaches wherein, if parameters are input to the Artificial Neural Network, then features can be predicted to recreate the waveform of the IC-pins (“The block diagram of the model is presented in Figure 1. The model has a number of N inputs representing the input parameters (p) of the entire data set. Q is the number of the outputs representing the samples describing the predicted waveform ( s1, s2 , ..., sQ ).”) (e.g., page 2, column 1, paragraph 5). Regarding Claim 5, Oltean in view of Hoang teaches The method to generate a surrogate behavioral model as claimed in claim 1. Oltean further teaches wherein features can be extracted from a time domain waveform and a time-domain waveform can be reconstructed from the features (“The waveforms in the data set are determined by a combination of input parameters. For each individual set of parameters p, the corresponding waveform is selected (see Figure 2).”) (e.g., page 2, column 2, paragraph 2). Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oltean in view of Hoang, further in view of Wong-Lam et al. (U.S. Pat. No. 6,418,386 B1), hereinafter Wong-Lam, further in view of Reinders et al. (U.S. Pub. No. 2016/0327595 A1), hereinafter Reinders. Regarding Claim 3, Oltean in view of Inagaki teaches The method to generate a surrogate behavioral model as claimed in claim 1. However, neither Oltean nor Inagaki specifically teaches wherein the said features of the time domain or frequency domain waveforms are pre-transition overshoot and undershoot, rise time, fall time, and ringing High level, low level, pulse-width, duty cycle, Bucket value and ringing between inter-transitional stages predicted with respect to operating conditions. On the other hand, Wong-Lam, which relates similarly to waveform characterization, does teach wherein the said features of the time domain or frequency domain waveforms are pre-transition overshoot and undershoot, rise time, fall time, and ringing High level, low level, pulse-width, duty cycle, Bucket value and ringing between inter-transitional stages predicted with respect to operating conditions (“measuring periodic signals typically includes automatically determining various parameters of the received signal. Among others, these parameters include voltage measurements (e.g., high and low values, amplitude, minimum and maximum values, overshoot values), time measurements (e.g., period, pulse widths), and transient measurements (e.g., rise-times and fall-times) […] The method used for pulse-shaped waveforms is called the histogram method. The histogram method attempts to discern the ringing and spikes by creating the amplitude histogram of the waveform and search for dominant magnitude populations.” The histogram is interpreted as providing a bucket value.) (e.g., column 1, lines 21-28 and 51-55). In combination, the It would have been obvious to one of ordinary skill in the art before the effective filing date of the Applicant's claimed invention to combine the modified reference of Oltean in view of Hoang with Wong-Lam. The claimed invention is considered to be simple substitution of one known element for another to obtain predictable results, see MPEP § 2143(I)(B). Oltean teaches an artificial neural network to predict an IC waveform based on input parameters. However, Oltean does not specifically wherein the input parameters are the features defined in instant Claim 3. On the other hand, Wong-Lam, which relates similarly to waveform characterization, does teach said features. Furthermore, Wong-Lam discloses that measuring period signals is an important part of a variety of technical fields (e.g., column 1, lines 10-21), and Oltean also discloses characteristics such as overshoot, slew rate, delay, etc. as characteristics of interest (e.g., page 1, column 2, paragraph 1). Thus, one of ordinary skill in the art could have merely substituted the waveform features of Wong-Lam in for the input parameters of Oltean, and the results of the substitution would have predictably resulted in an ANN trained using said waveform features. Therefore, it would have been obvious to a person of ordinary skill in the art to combine Oltean with Wong-Lam in order to provide more input parameters to the ANN of Oltean. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chen et al. (Chen, Henglin, and Shize Ye. "Modeling and optimization of EMI filter by using artificial neural network." IEEE Transactions on Electromagnetic Compatibility 61, no. 6 (2019): 1979-1987.) teaches a method for modeling a frequency domain waveform using an ANN. Inagaki (U.S. 2017/0091373 A1) teaches a method for measuring responses from an IC and creating a countermeasure circuit model. Miranda et al. (U.S. Pub. No. 2011/0178789 A1) teaches a method for characterizing an IC using design of experiments. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE HWA-KAI TSENG whose telephone number is (571)272-3731. The examiner can normally be reached M-F 9A-5P PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rehana Perveen can be reached at (571) 272-3676. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K.H.T./ Examiner, Art Unit 2189 /REHANA PERVEEN/ Supervisory Patent Examiner, Art Unit 2189
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Prosecution Timeline

May 03, 2023
Application Filed
Jun 18, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
48%
Grant Probability
99%
With Interview (+74.6%)
4y 0m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 23 resolved cases by this examiner. Grant probability derived from career allowance rate.

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