Prosecution Insights
Last updated: April 19, 2026
Application No. 18/036,691

WEAR SENSOR AND METHOD OF SENSING WEAR

Final Rejection §103
Filed
May 12, 2023
Examiner
FORRISTALL, JOSHUA L
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Metso Finland OY
OA Round
2 (Final)
69%
Grant Probability
Favorable
3-4
OA Rounds
3y 3m
To Grant
92%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allow Rate
40 granted / 58 resolved
+1.0% vs TC avg
Strong +23% interview lift
Without
With
+23.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
45 currently pending
Career history
103
Total Applications
across all art units

Statute-Specific Performance

§101
18.7%
-21.3% vs TC avg
§103
48.8%
+8.8% vs TC avg
§102
9.0%
-31.0% vs TC avg
§112
22.1%
-17.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 58 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendments to the claims, filed 11/24/2026, are accepted and appreciated by the Examiner. Response to Arguments Applicant’s arguments, see Remarks, filed 11/24/2026, with respect to the 35 U.S.C. 112(b) rejections have been fully considered and are persuasive in light of the amendments. The 35 U.S.C. 112(b) rejections of claims 1- 18 have been withdrawn. Applicant’s arguments, see Remarks, filed 11/24/2026, with respect to the rejection(s) of claims under 35 U.S.C. 103 in view of Rhodes (US 20200124560 A1) and Lewis-Gray (US 12038401 B2) have been fully considered and are persuasive in light of the amendment. Rhodes does not explicitly teach a sequence of electrically connected discrete elements. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Purvis (US 4655077 A) and Lewis-Gray (US 12038401 B2). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 13-16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Purvis (US 4655077 A) as modified by Lewis-Gray (US 12038401 B2). With respect to claims 1 and 15, Purvis teaches, an electrical circuit comprising a sequence of electrically connected discrete elements, each discrete element being capable to temporarily hold a digital data value, (Col. 3 Ln(s). [63-68] teach “As erosion of the liner component 20 is sustained, the conductive loops 28, 30, 32, 34 and 36 are subjected to erosion one at a time, with the wearable conductive loop portions 28A, 30A, 32A, 34A and 36A being interrupted only as the liner component structure is worn away at its particular location.” Each conductive loop a discrete element. Col. 4 Ln(s). [6-12] teach “In a preferred embodiment, the continuity status of each loop within the probe 26 is converted to logic one and logic zero digital data information which is sampled periodically by a CPU.” See Fig. 2 Col. 5. Ln(s). 21-28 teach “In each of the foregoing sensor arrangements, it is essential that a signal conductor be provided for each loop, and that at least one return conductor be provided. According to the arrangement shown in FIG. 5, the return conductors are connected together and are joined to a common return conductor which is coupled to a common ground reference potential.” (i.e. the loops are electrically connected.)) wherein the electrical circuit is configured to sequentially transfer the digital data value from a first discrete element on a first edge of the wear sensor to subsequent discrete elements toward a second edge of the wear sensor, (Col. 5 Ln(s). [35-40] “The open circuit/closed circuit condition of the conductive loop within the probe assembly 26 forms the basis for generating a digital data signal in the form of a logic "one" or a logic "zero" which corresponds with the condition of a particular loop as being in open circuit condition or closed-circuit condition” Col. 3. Ln(s). [64- 65] teach “the conductive loops 28, 30, 32, 34 and 36 are subjected to erosion one at a time,”) each discrete element being capable of being electrically decoupled from the electrical circuit, sequentially in a direction from the second side by action of wear on the wear sensor, (Col. 5 Ln(s). [35-36] teach “The open circuit/closed circuit condition of the conductive loop within the probe assembly” (i.e. open circuit is viewed as decoupled.)) Purvis does not explicitly teach, wherein a number of discrete elements in the sequence is reduced when wear occurs on the wear sensor. Lewis-Gray teaches, wherein a number of discrete elements in the sequence is reduced when wear occurs on the wear sensor. (Col. 2 Ln(s). [59-67] “As the printed circuit board physically wears away, individual resistors, or capacitors or inductors are decoupled from the electrical circuit” (i.e. there is one less component as wear progresses.) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Purvis wherein a number of discrete elements in the sequence is reduced when wear occurs on the wear sensor such as that of Lewis-Gray. One of ordinary skill would have been motivated to modify Purvis, because after the component is electrically disconnected if part of the disconnected component comes in contact with another part of the sensor it could interfere with the measurement. Therefore, fully removing the discrete element could reduce interference. With respect to claim 2, Purvis teaches, The wear sensor according to claim 1, wherein the reduced number of discrete elements indicates an amount of wear. (Col. 2 Ln(s). [19-27] teaches “That is, as erosion or wear of the liner structure is sustained, each conductive loop is subjected to erosion in turn and is interrupted only as the liner component structure is worn away at its particular location. The continuity status of each loop is evaluated periodically, with an electrical closed-circuit condition indicating structural integrity at that particular loop location, and an electrical open circuit condition indicating liner erosion at that particular loop location”) With respect to claim 3, Purvis teaches, The wear sensor according to claim 1, further comprising a substrate capable of being disposed along a path subject to wear, wherein the electrical circuit is supported by the substrate. (Col. 3 Ln(s). 39-43 teaches “The most serious erosion of the liner component occurs in the corner regions 22 and along the lining face 24 which define the orifice boundary. Thus, it would be useful to know the condition of the liner component in this region” (i.e. liner component is viewed as substrate)) With respect to claim 4, Purvis does not explicitly teach, The wear sensor according to claim 3, wherein the discrete elements are placed in series on the substrate and the discrete elements are sequentially decoupled from the substrate as a wear progresses along the path. Lewis-Gray teaches, The wear sensor according to claim 3, wherein the discrete elements are placed in series on the substrate and the discrete elements are sequentially decoupled from the substrate as a wear progresses along the path. (Col. 2 Ln(s). [59-67] “Preferably, the sensor node includes a nest of conductive wire loops and each loop within the nest of conductive wire loops includes multiple series and parallel connected electrical components. The nest of conductive wire loops are arranged so that each of the conductive wire loops are physically disabled in sequence, by the abrasion, starting with the outermost conductive wire loop, so that as the abrasive wear continues, the resistance increases monotonically, and a direct current source applied to the sensor node correspondingly makes the voltage change by the increase in resistance, and this is measured by the gateway node and is used by the gateway node to determine the wear state of that particular component within the apparatus.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Purvis wherein the electrical circuit is configured to sequentially transfer the digital data value from a first discrete element on a first side of the wear sensor to subsequent discrete elements toward a second side of the wear sensor, such as that of Lewis-Gray. One of ordinary skill would have been motivated to modify Purvis, because as seen in Col. 1 Ln(s). [18-31] of Lewis-Gray “If the maintenance program is overly aggressive, then the apparatus that includes the component that is subjected to the wear will be taken out of service more often than is required. Alternatively, if the preventative maintenance program is not aggressive enough, or there is a change in the properties of the material that the apparatus is processing, then the component may fail prior to the maintenance program being implemented on that apparatus. The result of this is a lack of operational efficiency for that apparatus that may have a flow on effect across the entire plant, particularly if that apparatus is on the critical path. It is therefore an objective of the present invention to provide a wear sensing and monitoring system that at least ameliorates the aforementioned problems.” Therefore, in order to increase efficiency, one would combine Purvis with Lewis-Gray. With respect to claim 5, Purvis further teaches, The wear sensor according to claim 1, wherein the discrete elements are equally spaced in the electrical circuit. (Col. 3 Ln(s). [61-63] further teach “It will be noted that the conductive loop portions are spaced apart by a distance "d" within the corner region 22.”) With respect to claim 13, Purvis does not explicitly teach, The wear sensor according to claim 1, further comprising an additional electrical circuit such that the wear sensor comprises two electrical circuits, the two electrical circuits being independent of each other. Lewis-Gray teaches, The wear sensor according to claim 1, further comprising an additional electrical circuit such that the wear sensor comprises two electrical circuits, the two electrical circuits being independent of each other. (See. Fig. 1) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Purvis further comprising an additional electrical circuit such that the wear sensor comprises two electrical circuits, the two electrical circuits being independent of each other such as that of Lewis-Gray. One of ordinary skill would have been motivated to modify Purvis, because according to Col. 4 Ln(s). [19-23] “A preferred embodiment of a complete wireless wear monitoring system is illustrated in FIG. 1. The system contains several wear nodes 101, 103 and 105 respectively, placed at various wear sites to measure wear states on that particular component within an apparatus.” Therefore, in order to find wear at multiple sites one would combine Purvis with Lewis-Gray. With respect to claim 14, Purvis does not explicitly teach, The wear sensor according to claim 13, wherein the two electrical circuits are connected in parallel. Lewis-Gray teaches, wherein the two electrical circuits are connected in parallel. (See. Fig. 1 and Col. 5 Ln(s). [60-65] teaches “An alternative embodiment of a wear sensor node is shown in FIGS. 7(a) and (b). In this embodiment, a conductive wire loop 35 with multiple series and parallel connected resistor components 37, is shown. As shown in FIG. 7(a) we have a matrix of resistors 37 that are arranged in parallel and in series.” It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Purvis wherein the two electrical circuits are connected in parallel such as that of Lewis-Gray. One of ordinary skill would have been motivated to modify Purvis, because according to Col. 4 Ln(s). [19-23] “A preferred embodiment of a complete wireless wear monitoring system is illustrated in FIG. 1. The system contains several wear nodes 101, 103 and 105 respectively, placed at various wear sites to measure wear states on that particular component within an apparatus.” Furthermore, a parallel connection would allow for less space between circuits and capture wear across the device without leaving spaces unchecked. Therefore, in order to find wear at multiple sites one would combine Purvis with Lewis-Gray. With respect to claim 16, Purvis further teaches, A wear sensing system comprising: one or more wear sensors according to claim 1; and a measuring device configured to measure an amount of wear occurring to an object based on the one or more wear sensors. (Col 4. Ln(s). [11-19] teach “a CPU (indicated by reference numeral 38) for driving a wear status indicator 40 which provides a real time visual or audible indication in response to a predetermined wearable condition as detected by the probe 26, and which provides a printed summary of probe conditions upon demand. Additionally, the CPU 38 is programmed to analyze the probe data, and, under the direction of a controller, projects components and system failures as a function of time.”) With respect to claim 18, Purvis further teaches, An equipment subject to wear, comprising: a wear sensor according to claim 1. (Col.3 Ln(s). [39-43] teach “The most serious erosion of the liner component occurs in the corner regions 22 and along the lining face 24 which define the orifice boundary. Thus, it would be useful to know the condition of the liner component in this region.”) Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Purvis (US 4655077 A) as modified by Lewis-Gray (US 12038401 B2) as applied to claim 16 above, and further in view of Pan (US 20150362362 A1). With respect to claim 17, The combination of Purvis and Lewis-Gray does not explicitly teach, The wear sensing system of claim 16, wherein the measuring device is a counter configured to count a number of clocks until an output of the one or more wear sensors is a digital data value of zero over a specific number of clocks. Pan teaches, wherein the measuring device is a counter configured to count a number of clocks until an output of the one or more wear sensors is a digital data value of zero over a specific number of clocks. (Para. [0089] teaches “In addition, processing component 1206 can be further configured to determine whether one or more of a start symbol, a stop symbol, a digital zero, or a digital one is included in the control signal, and can be configured to determine a dynamic reference pulse width associated with a pilot signal being high or low for a predetermined number of cycles of the clock signal by counting a number of clock cycles associated with the clock signal, for which the control signal is held at the digital high signal or the digital low signal, as further described herein.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Purvis and Lewis-Gray wherein the measuring device is a counter configured to count a number of clocks until an output of the one or more wear sensors is a digital data value of zero over a specific number of clocks such as that of Pan. One of ordinary skill would have been motivated to modify the combination of Purvis and Lewis-Gray, because the method of Pan “can facilitate, for example, conditioning signals for digital data signaling” as seen in Para. [0089]. Allowable Subject Matter Claims 6-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. With respect to claim 6, None of the known prior art teaches that the discrete elements are flip-flop elements. Rhodes (US 20200124560 A1) teaches a shift register 62 as seen in para. [0023] but it does not teach that it is made up of flip-flops. They also fail to teach that the elements in the shift register are caused to decouple from the electronic circuit due to wear. The discrete elements as taught in Purvis and used to teach claim 1 are outside of the shift register. Most of the other known prior art uses resistors, inductors, and capacitors as discrete elements as seen in some embodiments of Lewis-Gray (US 12038401 B2) and in Davies (US 20120043980 A1). Furthermore, Purvis (US 4655077 A) teaches conducting loops as the discrete elements that are electrically connected (Abstract). Orlewski (US 20140360256 A1) teaches employing a flip-flop in a wear device as seen in Fig. 9 and Para(s). [0048 and 0049]. However, they also detect wear in the conventional way by using an array of resistors to act as the discrete elements. As seen above none of the known prior art teaches and it would not be obvious to combine the known prior art to teach, “The wear sensor according to claim 1, wherein the discrete elements are flip-flop elements and the sequence of flip-flop elements is a flip-flop array or shift register.” Therefore, prior art cannot be applied to claim 6. Prior art cannot be applied to claims 7-12 because they are dependent upon claim 6. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSHUA L FORRISTALL whose telephone number is 703-756-4554. The examiner can normally be reached Monday-Friday 8:30 AM- 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached on 571-272-2302. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSHUA L FORRISTALL/Examiner, Art Unit 2857 /ANDREW SCHECHTER/Supervisory Patent Examiner, Art Unit 2857
Read full office action

Prosecution Timeline

May 12, 2023
Application Filed
Aug 19, 2025
Non-Final Rejection — §103
Nov 24, 2025
Response Filed
Feb 12, 2026
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12572161
METHOD AND CONTROL DEVICE FOR CONTROLLING A ROTATIONAL SPEED
2y 5m to grant Granted Mar 10, 2026
Patent 12546581
CAPACITIVE DETECTION OF FOLD ANGLE FOR FOLDABLE DEVICES
2y 5m to grant Granted Feb 10, 2026
Patent 12516599
MONITORING CORROSION IN DOWNHOLE EQUIPMENT
2y 5m to grant Granted Jan 06, 2026
Patent 12481043
SYSTEMS AND TECHNIQUES FOR DEICING SENSORS
2y 5m to grant Granted Nov 25, 2025
Patent 12455392
METHOD TO CORRECT VSP DATA
2y 5m to grant Granted Oct 28, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
69%
Grant Probability
92%
With Interview (+23.4%)
3y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 58 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month