DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 6 and 8-16 are rejected under 35 U.S.C. 103 as being unpatentable over Shibuya (US 6140928) in view of Joo (US 20200136500) in view of Kim (US 20210119277).
Regarding claim 1, Shibuya teaches an apparatus for controlling current consumption of a battery management system (BMS) managing a battery pack (figure 1 shows an apparatus for controlling a current consumption, item 6 interpreted as an integrated circuit (IC) for measuring the remaining battery capacity of a battery management system, interpreted as microprocessor item 5)
the apparatus comprising: an input unit including a logic element (figure 2 item 60 shows an input unit including a logic element, interpreted as a logical data distribution circuit) to which a charger connection signal and an always constant power source off signal are input (column 8 lines 56 – column 9 lines 11 teaches wherein a charger connection signal is input. Column 8 lines 35 – 56 teaches wherein a constant power signal is input)
an operation unit including a control circuit (figure 2 shows an operation unit IC item 6 including a plurality of control units including a current measuring circuit item 10, overcurrent measuring circuit item 20, voltage measuring circuit item 30, driver circuit item 40, power switch circuit item 50, logical data distribution item 60 and voltage detection circuit 1 and 2 items 70 and 80) , wherein the control circuit includes:
a plurality of switches (figures 3, 4, and 5 show a plurality of switches);
a plurality of operational amplifiers (figures 3, 4, 5 and 7 show a plurality of operational amplifiers); and
a second plurality of resistance elements (figures 3 items 16 and 19, figure 4 item 23 , and 5 show a plurality of resistance elements).
Shibuya does not explicitly teach wherein the operation unit is configured to generate a current consumption control signal for at least one component in the BMS according to an output of the logic element and an output voltage of the battery pack ([0066]-[0067] discloses wherein a current control signal is generated, interpreted as a signal corresponding to a current consumption to control a switching frequency of FETs and an output voltage).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya reference with the charging system of the Joo reference so that the power-on time of an electronic device is shortened.
The suggestion/motivation for combination can be found in the Joo reference in [0005] wherein the power-on time of an electronic device is shortened.
Shibuya and Joo do not explicitly teach a first plurality of resistance elements connected in parallel with the plurality of switches.
Kim teaches a first plurality of resistance elements connected in parallel with the plurality of switches (shown in figure 1 a plurality of first resistance elements items 123 connected in parallel with switches items 121).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya and Joo references with the charging system of the Kim reference so that the battery voltage may be balanced amongst the batteries.
The suggestion/motivation for combination can be found in the Kim reference in paragraph [0008] wherein the voltage is balanced.
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Shibuya figure 2 shows an integrated circuit IC6 which controls power and current consumption of batteries
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Joo figure 1 shows a current consumption circuit with a controller, control block 140
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Kim figure 1 item 100 shows resistance elements 123 connected in parallel with switches 121
Regarding claim 2, Shibuya teaches the apparatus of claim 1, wherein the control circuit includes a first individual circuit comprising:
an operational amplifier configured to have a voltage value related to the output voltage from the battery pack as a first input (figure 3 shows a first individual circuit item 10. Figure 3 shows operational amplifiers items 11, 12, and 13 which receive output voltage from the batteries, via terminal +IN. column 10 lines 17 – 30 discloses wherein the first voltage input from the battery is input into first amplifier item 11. Figure 5 shows operational amplifiers 21a-b and 22a-d which receive battery input +IN and -IN); and
a metal oxide silicon field effect transistor (MOSFET) configured to have a voltage of the operational amplifier as a driving voltage (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs).
Shibuya does not explicitly teach a driving voltage to output a micro controller unit (MCU) alarm signal.
Joo teaches a driving voltage to output a micro controller unit (MCU) alarm signal (paragraph [0070] discloses wherein an alarm signal from the control circuit includes an LED provided on a display).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya reference with the charging system of the Joo reference so that the power-on time of an electronic device is shortened.
The suggestion/motivation for combination can be found in the Joo reference in [0005] wherein the power-on time of an electronic device is shortened.
Regarding claim 3, Shibuya teaches the apparatus of claim 1, wherein the control circuit includes a second individual circuit comprising: an operational amplifier configured to have a voltage value related to a output voltage from the battery pack as a first input (figure 2 shows a second individual circuit item 20. Figure 4 shows operational amplifiers 21a-b and 22a-d which receive battery input +IN and -IN. Column 14 lines 10 – 27 discloses wherein the operational amplifiers receive a voltage input from the battery pack as +IN and -IN); and
a metal oxide silicon field effect transistor (MOSFET) configured to have a voltage of the operational amplifier as a driving voltage and to output a switched power source off signal (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs. Column 9 lines 12 – 24 discloses wherein an output of the driving circuit switches off the power).
Regarding claim 4, Shibuya teaches the apparatus of claim 1, wherein the control circuit includes a third individual circuit comprising: an operational amplifier configured to have a voltage value related to a output voltage from the battery pack as a first input (figure 2 shows a second individual circuit item 20. Figure 4 shows operational amplifiers 21a-b and 22a-d which receive battery input +IN and -IN. Column 14 lines 10 – 27 discloses wherein the operational amplifiers receive a voltage input from the battery pack as +IN and -IN. Figure 3 item 10 shows a circuit for measuring a voltage across a resistor, which includes operational amplifiers, thus the voltage measurement circuit item 30, used to measure voltage across a battery may include operational amplifiers); and
a metal oxide silicon field effect transistor (MOSFET) configured to have an output voltage of the operational amplifier as a driving voltage and to output an always constant power source off signal (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs. Column 9 lines 12 – 24 discloses wherein an output of the driving circuit switches off the power).
Regarding claim 5, Shibuya teaches the apparatus of claim 1, but does not explicitly teach further comprising an output unit configured to output the current consumption control signal, received from the operation unit, to the at least one component in the BMS (column 19 lines 18 - 33 discloses wherein the battery management unit, microprocessor item 9 receives a power consumption control signal is to stop operations within the microprocessor).
Shibuya does not explicitly teach wherein this signal is the current consumption signal
Joo teaches wherein the signal is the current consumption signal ([0066]-[0067] discloses wherein the current control signal is generated, interpreted as a signal corresponding to the current consumption to control a switching frequency of FETs and an output voltage).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya reference with the charging system of the Joo reference so that the power-on time of an electronic device is shortened.
The suggestion/motivation for combination can be found in the Joo reference in [0005] wherein the power-on time of an electronic device is shortened.
Regarding claim 6, Shibuya teaches the apparatus of claim 1, wherein the at least one component in the BMS includes a micro controller unit (MCU) and a current supply device (column 6 lines 66 – column 7 line 9 discloses a microcontroller as a microprocessor 5. Column 15 lines 60 – column 16 lines 16 discloses constant current sources).
Regarding claim 8, Shibuya teaches the apparatus of claim 1, wherein the control circuit further includes a switch for generating a signal for activating the entire circuit in the operation unit according to an output of the logic element (figure 5 shows switches for generating a signal activating the operation unit according to an output of the logic element item 52).
Regarding claim 9, Shibuya teaches the apparatus of claim 1, wherein, upon both the charger connection signal and the always constant power source off signal being input high, the operation unit becomes deactivated (column 18 lines 44 – column 19 lines 2 discloses wherein signal provided from the connection and power off, are input to deactivate or interrupt the operation and stop the voltage to avoid waste of power consumption).
Regarding claim 10, Shibuya teaches the apparatus of claim 1, wherein the control circuit includes a plurality of metal oxide silicon field effect transistors (MOSFETs), and wherein driving voltages of the plurality of MOSFETs included in the control circuit are set to the same value or different values according to an operation target of an individual circuit including the MOSFETs (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs).
Regarding claim 11, Shibuya teaches the apparatus of claim 1, wherein resistance values of the plurality of resistance elements included in the control circuit are set to the same value or different values according to an operation target of an individual circuit including the second plurality of resistance elements (figure 3 shows a plurality of resistance groups with the same value or different value that are operated based on different input terminals).
Regarding claim 12, Shibuya teaches a battery management apparatus managing a battery pack (figure 1 shows an apparatus for controlling a current consumption, item 6 interpreted as an integrated circuit (IC) for measuring the remaining battery capacity of a battery management system, interpreted as microprocessor item 5), the battery management apparatus comprising: a current consumption control circuit including:
a logic element (figure 2 item 60 shows an input unit including a logic element, interpreted as a logical data distribution circuit) to which a charger connection signal and an always constant power source off signal are input (column 8 lines 56 – column 9 lines 11 teaches wherein a charger connection signal is input. Column 8 lines 35 – 56 teaches wherein a constant power signal is input);
a plurality of switches (column 8 lines 56 – column 9 lines 11 teaches wherein a charger connection signal is input. Column 8 lines 35 – 56 teaches wherein a constant power signal is input);
a plurality of operational amplifiers (figures 3, 4, 5 and 7 show a plurality of operational amplifiers); and
a second plurality of resistance elements (figures 3 items 16 and 19, figure 4 item 23 , and 5 show a plurality of resistance elements).
Shibuya does not explicitly teach wherein the current consumption control circuit is configured to generate a current consumption control signal according to an output of the logic element and an output voltage of the battery pack; a main controller configured to receive the current consumption control signal and operate in a current consumption minimizing method; and a power supply configured to stop supply of switched power or always constant power in response to receiving the current consumption control signal.
Joo teaches wherein the current consumption control circuit is configured to generate a current consumption control signal according to an output of the logic element and an output voltage of the battery pack ([0066]-[0067] discloses wherein a current control signal is generated, interpreted as a signal corresponding to a current consumption to control a switching frequency of FETs and an output voltage);
a main controller configured to receive the current consumption control signal and operate in a current consumption minimizing method (figure 1 item 140 shows a main controller item 140 a control block. [0033] discloses wherein the control block receives a signal and controls the operation of the switching frequency of a conversion based on the current consumption signal); and
a power supply configured to stop supply of switched power or always constant power in response to receiving the current consumption control signal ([0079] teaches wherein the power conversion module may adjust the output power based on the current consumption signal. [0113] – [0115] discloses wherein when the current consumption is less than or equal to a threshold, switching elements are deactivated until the supply of AC power is stopped).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya reference with the charging system of the Joo reference so that the power-on time of an electronic device is shortened.
The suggestion/motivation for combination can be found in the Joo reference in [0005] wherein the power-on time of an electronic device is shortened.
Shibuya and Joo do not explicitly teach a first plurality of resistance elements connected in parallel with the plurality of switches.
Kim teaches a first plurality of resistance elements connected in parallel with the plurality of switches (shown in figure 1 a plurality of first resistance elements items 123 connected in parallel with switches items 121).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya and Joo references with the charging system of the Kim reference so that the battery voltage may be balanced amongst the batteries.
The suggestion/motivation for combination can be found in the Kim reference in paragraph [0008] wherein the voltage is balanced.
Regarding claim 13, Shibuya teaches the battery management apparatus of claim 12, wherein the current consumption control circuit includes a first individual circuit comprising: an operational amplifier configured to have a voltage value related to a output voltage from the battery pack as a first input (figure 3 shows a first individual circuit item 10. Figure 3 shows operational amplifiers items 11, 12, and 13 which receive output voltage from the batteries, via terminal +IN. column 10 lines 17 – 30 discloses wherein the first voltage input from the battery is input into first amplifier item 11. Figure 5 shows operational amplifiers 21a-b and 22a-d which receive battery input +IN and -IN); and
a metal oxide silicon field effect transistor (MOSFET) configured to have the output voltage of the operational amplifier as a driving voltage (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs).
Shibuya does not explicitly teach a driving voltage to output a micro controller unit (MCU) alarm signal.
Joo teaches a driving voltage to output a micro controller unit (MCU) alarm signal (paragraph [0070] discloses wherein an alarm signal from the control circuit includes an LED provided on a display).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya reference with the charging system of the Joo reference so that the power-on time of an electronic device is shortened.
The suggestion/motivation for combination can be found in the Joo reference in [0005] wherein the power-on time of an electronic device is shortened.
Regarding claim 14, Shibuya teaches the battery management apparatus of claim 12, wherein the current consumption control circuit includes a second individual circuit comprising: an operational amplifier configured to have a voltage value related to a output voltage from the battery pack as a first input (figure 2 shows a second individual circuit item 20. Figure 4 shows operational amplifiers 21a-b and 22a-d which receive battery input +IN and -IN. Column 14 lines 10 – 27 discloses wherein the operational amplifiers receive a voltage input from the battery pack as +IN and -IN. Figure 3 item 10 shows a circuit for measuring a voltage across a resistor, which includes operational amplifiers, thus the voltage measurement circuit item 30, used to measure voltage across a battery may include operational amplifiers); and
a metal oxide silicon field effect transistor (MOSFET) configured to have the output voltage of the operational amplifier as a driving voltage and to output a switched power source off signal (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs. Column 9 lines 12 – 24 discloses wherein an output of the driving circuit switches off the power).
Regarding claim 15, Shibuya teaches the battery management apparatus of claim 12, wherein the current consumption control circuit includes a third individual circuit comprising: an operational amplifier configured to have a voltage value related to a output voltage from the battery pack as a first input (Figure 2 shows wherein a third circuit, voltage measuring circuit item 30 receives voltage V and VBATT. Column 7 lines 54 – column 8 line 5 shows wherein a third circuit, a voltage measuring circuit item 30 receives voltage across the battery cell indicative of the measured voltage of the battery); and
a metal oxide silicon field effect transistor (MOSFET) configured to have the output voltage of the operational amplifier as a driving voltage and to output an always constant power source off signal (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs. Column 9 lines 12 – 24 discloses wherein an output of the driving circuit switches off the power)..
Regarding claim 16, Shibuya teaches the battery management apparatus of claim 12, wherein, upon both the charger connection signal and the always constant power source off signal being input high, current consumption control circuit becomes deactivated (column 18 lines 44 – column 19 lines 2 discloses wherein signal provided from the connection and power off, are input to deactivate or interrupt the operation and stop the voltage to avoid waste of power consumption).
Regarding claim 18, Shibuya teaches the battery management apparatus of claim 12, wherein the current consumption control circuit further includes: a plurality of metal oxide silicon field effect transistors (MOSFETs); and an output unit configured to output the current consumption control signal, and wherein the plurality of MOSFETs are located between the output unit and the plurality of operational amplifiers (figure 1 shows a MOSFET, interpreted as a FET item 3 configured to have the operational amplifier, items 11, 12, and 13 as the driving voltage. Column 8 lines 36 – 56 discloses wherein overcurrent detection circuit 20, which includes operational amplifiers items 21a-b and 22a-d, output to FETs).
Regarding claim 19, Shibuya teaches the battery management apparatus of claim 12, wherein a state of an operational amplifier of the plurality of operational amplifiers is based on comparing a divided voltage to a reference voltage (column 14 lines 36 –65 discloses wherein the voltage dividing circuit, which includes variable resistors items 23a-b supplies a divided voltage to operational amplifiers 22a-d and the voltage is compared to a reference voltage input from terminals CREF1 and CREF2) .
2. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Shibuya (US 6140928) in view of Joo (US 20200136500) as applied to claim 1 and in further view of Perelle (US 20020195994)
Regarding claim 7, Shibuya and Joo teach the apparatus of claim 1, but does not explicitly teach wherein the logic element is an AND gate.
Perelle teaches wherein the logic element is an AND gate (figure 1 item 13 [0045] discloses wherein the logic element used within the system is an AND gate).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the Shibuya and Joo reference with the gate system of the Perelle reference so that the current does not exceed a maximum threshold.
The suggestion/motivation for combination can be found in the Perelle reference in paragraph wherein [0046] wherein the AND gate controls the flow of current so that a maximum threshold is not exceeded.
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Perelle figure 1 shows AND gates item 13 within the logic circuit
3. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Shibuya (US 6140928) in view of Joo (US 20200136500) as applied to claim 12 and in further view of Liu (US 20220376540)
Regarding claim 17, Shibuya and Joo teach the battery management apparatus of claim 12, but does not explicitly teach wherein, the power supply is a low drop-output (LDO) regulator.
Liu teaches wherein, the power supply is a low drop-output (LDO) regulator (Figure 10 item 41 shows a Low Dropout Regulator. Paragraphs [0016] and [0151] discloses wherein the charging and discharging management circuit includes a low dropout regulator coupled to a battery, configure to step down the input voltage and supply the voltage to the battery).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging system of the Shibuya and Joo references with the LDO regulator system of the Liu system so that that the endurance capability of the battery improves while it ages.
The suggestion/motivation for combination can be found in the Liu reference in paragraph [0005] wherein the endurance capability is improved.
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Liu Figure 10 shows a Low Dropout Regulator item 41 in a charging and discharging circuit
Response to Arguments
Applicant’s arguments, see Arguments/Remarks, filed 06/29/2026, with respect to the rejection of claims under Shibuya in view of Joo have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Shibuya, Joo and in further view of Kim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's Disclosure.
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Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXIS B PACHECO whose telephone number is (571)272-5979. The examiner can normally be reached M-F 9:00 - 5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman can be reached at 571-272-2147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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ALEXIS BOATENG PACHECO
Primary Examiner
Art Unit 2859
/ALEXIS B PACHECO/Primary Examiner, Art Unit 2859
Prosecution Insights