Prosecution Insights
Last updated: August 18, 2026
Application No. 18/037,581

CONTROL DEVICE AND CONTROL METHOD

Non-Final OA §112
Filed
May 18, 2023
Priority
Feb 24, 2021 — JP 2021-027460 +1 more
Examiner
NAHRA, SELENA SABAH
Art Unit
2192
Tech Center
2100 — Computer Architecture & Software
Assignee
Hitachi Astemo Ltd.
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
16 granted / 22 resolved
+17.7% vs TC avg
Strong +75% interview lift
Without
With
+75.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
11 currently pending
Career history
32
Total Applications
across all art units

Statute-Specific Performance

§101
16.8%
-23.2% vs TC avg
§103
47.4%
+7.4% vs TC avg
§102
10.5%
-29.5% vs TC avg
§112
23.2%
-16.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 22 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 20, 2026 has been entered. Response to Amendment In view of Applicant’s amendments, the objection to the claims are withdrawn except those addressed below. In view of Applicant’s amendments, the claims are not interpreted under 35 USC §112(f). In view of Applicant’s amendments, the rejection to the claims under 35 USC §112(a) are withdrawn except those addressed below. In view of Applicant’s amendments, the rejection to the claims under 35 USC §112(b) are withdrawn except those addressed below. Claim Objections Claims 1-10 are objected to because of the following informalities: Claim 1, line 16, “that process portion” should be --each started process portion--. Claim 1, line 17, “the execution cycle set” lacks proper antecedent basis. Claim 1, line 18, “that process portion” should be --each started process portion--. Claim 5, lines 2-3, “the parallel process portion” should be --a parallel process portion--. Claim 5, line 3, delete “of claim 3”. Claim 5, line 6, “the first process portion” should be -- the first restarted process portion--. Claim 7, line 4, “a high-load state” should be -- the high-load state --. Claim 7, line 6, “the process” lacks antecedent basis. Claim 8, line 4, before “process portions” -- the -- should be inserted. Claim 8, lines 4-5, replace “the stored input data” with --the input data--. Claim 8, line 5, replace “the stored output data” with --the output data--. Claim 10, line 6, replace “LET1” with “(LET1)”. Claim 10, lines 16-17, “that process portion” should be --each started process portion--. Claim 10, line 18, “that process portion” should be --each started process portion--. Claim 10, line 22, “that process portion” should be --each started process portion--. Claim 10, line 36, “the first process portion” should be -- the first restarted process portion--. Claim 10, line 38, “the first process portion” should be -- the first restarted process portion--. Claims 2-4, 6, and 9 depend on the objected claims and inherit the same issues. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 1 recites “compare, for the first process portion, the passage time to an excess-risk determination time that is shorter than the LET1 and is selected with reference to an assumed standby time of at least one downstream process portion indicated by the standby time selection table;” The specification recites (see paragraphs [0011], [0061], and [0127]): A control device has a plurality of cores that execute a plurality of process portions that are started cyclically. The control device includes: a first process portion having a given logical execution time set therefor; and a time monitoring unit that determines an execution state of each of the process portions in a determination time shorter than the logical execution time of the first process portion. The time monitoring determines whether a passage time from the start of the first process portion exceeds the determination time. The time monitoring unit 2101 compares the process start time imparted by the process portion A with the current time, and determines whether a passage time from the process start time has exceeded an excess risk determination time set on the process portion A (1011-A). By referring to the standby time selection table, design information, such as an assumed standby time and an excess risk determination time of each process portion (1011) and an allowable standby time of the control device as a whole, can be selected and incorporated in actual design work. The specification discloses a determination time shorter than the logical execution time for the process portion, determining if a passage time exceeds a determination time, and referring to the standby time selection table to determine an excess rusk determination time of each process portion. However, the specification does not disclose selecting a determination time in reference to an assumed standby time of at least one downstream process portion indicated by the standby selection table. Thus, the specification does not support “compare, for the first process portion, the passage time to an excess-risk determination time that is shorter than the LET1 and is selected with reference to an assumed standby time of at least one downstream process portion indicated by the standby time selection table;” of claim 1. Claim 9 recites “and the program instructions further cause the multi-core processor to maintain continuity of values acquired by the process portion that outputs the control instruction value regardless of execution time variation of the process portions.” The specification recites (see paragraph [0009]): However, in running control software, the order of execution of processes independent of each other or real-time processing of data may become important factors in some, cases. For example, in a case where an instruction value process portion that calculates a control instruction value in terms of a physical value and an output process portion that outputs a control instruction value to drive equipment, such as a motor, operate independent of each other, if the priority order of the instruction value process portion is lowered, the output process portion becomes unable to acquire continuous values, which affects control performance, e.g., rendering motor control inefficient, in some cases. The specification discloses if the priority order of instruction value process portion is lowered, the output process portion becomes unable to acquire continuous values which affects control performance, e.g., rendering motor control inefficient. However, the specification does not disclose acquired by the process portion that outputs the control instruction value regardless of execution time variation of the process portions. Thus, the specification does not support “and the program instructions further cause the multi-core processor to maintain continuity of values acquired by the process portion that outputs the control instruction value regardless of execution time variation of the process portions” of claim 9. Claim 10 recites “comparing, for the first process portion, the passage time to an excess-risk determination time that is shorter than the LET1 and is selected with reference to an assumed standby time of at least one downstream process portion indicated by the standby time selection table;” The specification recites (see paragraphs [0011], [0061], and [0127]): A control device has a plurality of cores that execute a plurality of process portions that are started cyclically. The control device includes: a first process portion having a given logical execution time set therefor; and a time monitoring unit that determines an execution state of each of the process portions in a determination time shorter than the logical execution time of the first process portion. The time monitoring determines whether a passage time from the start of the first process portion exceeds the determination time. The time monitoring unit 2101 compares the process start time imparted by the process portion A with the current time, and determines whether a passage time from the process start time has exceeded an excess risk determination time set on the process portion A (1011-A). By referring to the standby time selection table, design information, such as an assumed standby time and an excess risk determination time of each process portion (1011) and an allowable standby time of the control device as a whole, can be selected and incorporated in actual design work. The specification discloses a determination time shorter than the logical execution time for the process portion, determining if a passage time exceeds a determination time, and referring to the standby time selection table to determine an excess rusk determination time of each process portion. However, the specification does not disclose selecting a determination time in reference to an assumed standby time of at least one downstream process portion indicated by the standby selection table. Thus, the specification does not support “compare, for the first process portion, the passage time to an excess-risk determination time that is shorter than the LET1 and is selected with reference to an assumed standby time of at least one downstream process portion indicated by the standby time selection table;” of claim 10. Claims 2-8 depend on the rejected claims and inherit the same issues. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1, lines 19-20, “the process portion” is unclear whether it refers to “each started process portion” in line 19 of claim 1 or “a first process portion” in line 8 of claim 1. For the following prior art rejection, “the process portion” in lines 19-20 of claim 1 is treated as -- each started process portion --. Claim 1, line 29, “the same cycle” is unclear whether it refers to “a processing cycle” in line 20 of claim 1 or “execution cycle” in line 16 of claim 1. For the following prior art rejection, “the same cycle” in line 29 of claim 1 is treated as -- the same processing cycle --. Claim 3, line 3, "each cycle", is unclear whether it includes “a processing cycle” in line 20 of claim 1. Claim 4, line 5, “the cycle” is unclear whether it refers to “a processing cycle” in line 20 of claim 1 or “execution cycle” in line 16 of claim 1. For the following prior art rejection, “the cycle” in line 5 of claim 4 is treated as -- the same processing cycle --. Claim 5, line 4, “the LET1” is unclear whether it refers to “a logical execution time” in line 8 of claim 1 or "logical execution time” in line 17 of claim 1. For the following prior art rejection, “the LET1” in line 4 of claim 5 is treated as -- the LET1 for the first process portion --. Claim 5, line 7, “the LET1” is unclear whether it refers to “a logical execution time” in line 8 of claim 1 or "logical execution time” in line 17 of claim 1. For the following prior art rejection, “the LET1” in line 4 of claim 5 is treated as -- the LET1 for the first process portion --. Claim 9, line 8, “the process portions”, is unclear whether it refers to “at least one process portion” in lines 1-2 of claim 9 or “one or more process portions” in line 6 of claim 1. For the following prior art rejection, “the process portions” in line 8 of claim 9 is treated as -- the started process portions --. Claim 10, lines 23-24, “the process portion” is unclear whether it refers to “each started process portion” in line 23 of claim 10 or “a first process portion” in line 5 of claim 10. For the following prior art rejection, “the process portion” in lines 23-24 of claim 10 is treated as -- each started process portion --. Claim 10, line 26, “the LET1” is unclear whether it refers to “a logical execution time” in line 6 of claim 10 or “logical execution time” in lines 22-23 of claim 10. For the following prior art rejection, “the LET1” in line 26 of claim 10 is treated as -- the LET1 for the first process portion --. Claim 10, lines 30-31, “the LET1” is unclear whether it refers to “a logical execution time” in line 6 of claim 10 or “logical execution time” in lines 22-23 of claim 10. For the following prior art rejection, “the LET1” in line 26 of claim 10 is treated as -- the LET1 for the first process portion --. Claims 2 and 6-8 depend on the objected claims and inherit the same issues. Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: With respect to independent claim 1, the prior art of record does not teach or suggest, either solely, or in combination, the limitations "exchange data between the process portions such that input data for each process portion is acquired at every execution cycle of that process portion and output data for that process portion is provided after passage of a logical execution time shorter than the execution cycle set for that process portion;" when considered in combination with the other limitations of claim 1. With respect to independent claim 10, the prior art of record does not teach or suggest, either solely, or in combination, the limitations "exchange data between the process portions such that input data for each process portion is acquired at every execution cycle of that process portion and output data for that process portion is provided after passage of a logical execution time shorter than the execution cycle set for that process portion;" when considered in combination with the other limitations of claim 10. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Pree (U.S. Patent Application No. US 20100325635 A1) discloses “The inputs of the task are read at the beginning of a LET period. The reading of the inputs is practically done in close to zero time, what is called "logical zero time" (LZT). The beginning of the LET period is indicated by the arrow labeled "release" in FIG. 3. Newly calculated outputs of the task are available exactly at the end of the LET period which is indicated by an arrow labeled "terminate" in FIG. 3. The physical execution of the task on the node is started at a time indicated by an arrow labeled "start" and terminated at a time indicated by an arrow labeled "stop", wherein the physical execution of the task is suspended at a time indicated by an arrow labeled "suspend" and resumed at a time indicated by an arrow labeled "resume".” (Pree, para [0030], fig. 3) and “The time of physical execution within the LET period is not defined by LET. However, it is a requirement that the physical execution of the task has to finish before the end of the LET period. In other words, the start of the physical execution of the task can take place at or after the beginning of the LET period, and the end of the physical execution of the task has to occur at the latest, also for the worst case, before or at the end of the LET period.” (Pree, para [0031]). Itakura (U.S. Patent Application Publication No. US 20210103549 A1) discloses “In operation S2805, the control device 101 determines whether or not the waiting time of the downstream task is equal to or more than the first threshold (operation S2805). Here, when it is determined that the waiting time is equal to or more than the first threshold (Yes in operation S2805), the control device 101 proceeds to the processing of operation S2806. Meanwhile, when it is determined that the waiting time is not equal to or more than the first threshold (No in operation S2805), the control device 101 proceeds to the processing of operation S2811.” (Itakura, para [0240]). Shima (JP Patent Application No. JP 2007018392 A) discloses “The reference table storage unit 36 is an area for storing a reference table that is referred to when setting a threshold value TH and a post-extension job information holding time KT2 described later.” (Shima, pg. 6, first para, English translation) Guillot (U.S. Patent Application No. US 20190310909 A1) discloses “a task, whose result is to be transferred to another task at the end of the time interval” (Guillot, para [0003]). Any inquiry concerning this communication or earlier communications from the examiner should be directed to SELENA SABAH NAHRA whose telephone number is (571)272-6115. The examiner can normally be reached Monday-Thursday 7:00 AM -5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hyung Sough can be reached at (571) 272-6799. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.S.N./Examiner, Art Unit 2192 /S. Sough/SPE, Art Unit 2192
Read full office action

Prosecution Timeline

May 18, 2023
Application Filed
Sep 11, 2025
Non-Final Rejection mailed — §112
Dec 04, 2025
Response Filed
Feb 26, 2026
Final Rejection mailed — §112
May 20, 2026
Response after Non-Final Action
Jun 15, 2026
Request for Continued Examination
Jun 22, 2026
Response after Non-Final Action
Jul 16, 2026
Non-Final Rejection mailed — §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+75.0%)
3y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 22 resolved cases by this examiner. Grant probability derived from career allowance rate.

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