DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendments filed 03/23/2026 have been entered. Currently claims 1-3 and 6-20 are pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 6, the claim depends on claim 5 which has been canceled, and thus it is unclear which claim it is dependent on. For examination purposes, claim 6 will depend on claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 7, 8, and 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Peeters et al., (US 20190336014 A1) in view of Dattorro et al., (US5027306A) and further in view of Madala et al., (US20170194908A1).
Regarding claim 1, Peeters teaches a physiological parameter inductive sensing system for sensing electromagnetic signals emitted from a body in response to electromagnetic excitation signals propagated into said body, the system comprising ([0014] invention is a physiological parameter inductive sensing system for sensing electromagnetic excitation signals propagated into the body):
a loop resonator for inductively coupling with said electromagnetic signals emitted from the body (fig. 8 loop resonator 11 includes an antenna 12 for inductively coupling with EM signals returned from the body [0175] );
an oscillator circuit which includes the loop resonator for exciting the resonator to generate the electromagnetic excitation signals for propagating into said body (fig. 8 oscillator 74 generates the electromagnetic excitation signals for propagation in the a body [0208] );
an amplitude measurement circuit for measuring an amplitude of the emitted electromagnetic signals ([0006] coil based inductive sensors can be measured and used to sense properties of the signal, such as amplitude; [0177]–[0178] the resonator 11 is electrically coupled to a signal processing means 54, and the signal processing unit analysis the characteristic of the response signal to derive the changes in the dampening factor of the resonator 11 circuit and the natural resonance frequency of the resonator signal, the damping factor of the resonator circuit corresponds to amplitude variations of the EM signals emitted) wherein the amplitude measurement circuit comprises a circuit for measuring the imaginary part of the complex reflected inductance ([0059] measuring damping factor changes requires measuring the imaginary part of the reflected inductance and requires additional complexity to the circuitry, thus these measurements would require a circuit in order to function);
an analog to digital converter for digitizing the measured amplitude and generating a digital signal (fig. 7 analog to digital convertor 66 which converts the analog control signal into a digital signal[0201]; [0203]the controller 68 determines an output signal 70 from the digital control signal, and the output signal 70 can correspond to the digital control signal with suitable filtering and/or down-sampling to improve the signal-to-noise ratio);
However, Peeters is silent regarding a counter for combining successive outputs of the analog to digital converter to derive an output value with a resolution of a second number of bits, greater than the first number of bits.
In a reference reasonably pertinent to the problem faced by the inventor regarding increasing resolution from a low-bit ADC output without resorting to larger, more power intensive ADCs, Dattorro teaches a counter (fig. 6 counter 610) for combining successive outputs of the analog to digital converter to derive an output value with a resolution of a second number of bits, greater than the first number of bits (col. 1 line 20-33 the ADC consists of a front end and a decimator the decimator combines successive samples to increase sample resolution, which would increase the number of bits).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of Peeters with the counter of Dattorro, as this would allow for high resolution samples with a relatively low noise levels (see col. 2 lines 45-54).
However, the combination of Peeters and Dattorro are silent regarding feedback controller for controlling the amplitude of the oscillator circuit based on the output value.
In a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Madala teaches feedback controller for controlling the amplitude of the oscillator circuit based on the output value (fig. 6 self-biasing feedback resistor 620 to maximize the loop gain in the oscillator 600 [0124]; [0122] these are used to control the total amount of loop gain contributed by invertors).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the feedback resistor of Madala, as this would lead to a balanced oscillator, which provides less phase noise, better clock symmetry, and better common-mode noise immunity (see Madala [0050]).
Regarding claim 2, modified Peeters teaches the system of claim 1, but is silent regarding wherein digital signal generated by the analog to digital converter comprises a 1 bit signal.
However, in a reference pertinent to the problem faced by the inventor, Dattorro teaches wherein digital signal generated by the analog to digital converter comprises a 1 bit signal (col. 2 line 9-16 teaches of an A/D convertor that uses a one-bit sampled data signal that’s provided).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of Peeters with the counter of Dattorro, as this would allow for high resolution samples with a relatively low noise levels (see col. 2 lines 45-54).
Regarding claim 7, modified Peeters teaches the system of claim 1, but is silent regarding wherein the feedback controller comprises a digital to analog converter.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Madala teaches wherein the feedback controller comprises a digital to analog converter ([0148] DACs 1020A, 1018).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the DACs of Madala, as this would lead to a balanced oscillator, which provides less phase noise, better clock symmetry, and better common-mode noise immunity (see Madala [0050]).
Regarding claim 8, modified Peeters teaches the system of claim 1, but is silent regarding wherein the feedback controller comprises a circuit for controlling a bias current within the oscillator circuit.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Madala teaches wherein the feedback controller comprises a circuit for controlling a bias current within the oscillator circuit ([0143] the feedback controller comprises a counter and DAC’s which generate voltages applied to the NMOS and PMOS devices of the oscillator (VCONT_N, VCONT_P); these control voltages establish operating points of the transistors and thereby regulate the bias current supplied to the oscillator).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the feedback resistor of Madala, as this would lead to a balanced oscillator, which provides less phase noise, better clock symmetry, and better common-mode noise immunity (see Madala [0050]).
Regarding claim 11, modified Peeters teaches the system of claim 1, wherein Peeters further teaches wherein the loop antenna comprises a loop capacitor ([0175] the loop resonator comprises an antenna electrically coupled to a capacitor).
Regarding claim 12, modified Peeters teaches the system of claim 1, wherein Peeters further teaches wherein a frequency of the electromagnetic excitation signals is from 30 MHz to 1000 MHz ([0237] “the system 10 may be configured such that electromagnetic excitation signals have a frequency of from 30 MHz to 1000 MHz.”).
Regarding claim 13, modified Peeters teaches the system of claim 1, wherein Peeters further teaches a signal processor for processing the output values over time to derive one or more physiological parameters ([0202] controller 68 derives physiological characteristics from the output signal 70).
Regarding claim 14, modified Peeters teaches the system of claim 13, wherein Peeters further teaches wherein the physiological parameters comprise a heart rate and/or a breathing rate([0202] controller 68 derives physiological characteristics such as heart rate and breathing rate from the output signal 70).
Regarding claim 15, Peeters teaches a method for sensing electromagnetic signals emitted from a body in response to electromagnetic excitation signals propagated into said body, the method comprising ([0014] invention is a physiological parameter inductive sensing system for sensing electromagnetic excitation signals propagated into the body):
exciting a loop resonator to generate the electromagnetic excitation signals for propagating into said body, by controlling an oscillator circuit which includes the loop resonator (fig. 8 loop resonator 11 includes an antenna 12 for inductively coupling with EM signals returned from the body, and the resonator 11 is electrically coupled to a signal generation means that is an oscillator configured to drive the antenna with an oscillatory current [0175]-[0176] );
measuring an amplitude of electromagnetic signals emitted from the body in response to the electromagnetic excitation signals ([0006] coil based inductive sensors can be measured and used to sense properties of the signal, such as amplitude; [0177]–[0178] the resonator 11 is electrically coupled to a signal processing means 54, and the signal processing unit analysis the characteristic of the response signal to derive the changes in the dampening factor of the resonator 11 circuit and the natural resonance frequency of the resonator signal, the damping factor of the resonator circuit corresponds to amplitude variations of the EM signals emitted) wherein the amplitude measurement circuit comprises a circuit for measuring the imaginary part of the complex reflected inductance ([0059] measuring damping factor changes requires measuring the imaginary part of the reflected inductance and requires additional complexity to the circuitry, thus these measurements would require a circuit in order to function);
converting the measured amplitude into a digital signal with a first number of bits using an analog to digital converter (fig. 7 analog to digital convertor 66 which converts the analog control signal into a digital signal[0201]; [0203]the controller 68 determines an output signal 70 from the digital control signal, and the output signal 70 can correspond to the digital control signal with suitable filtering and/or down-sampling to improve the signal-to-noise ratio);
However, Peeters is silent regarding a counter for combining successive outputs of the analog to digital converter to derive an output value with a resolution of a second number of bits, greater than the first number of bits.
However, in a reference reasonably pertinent to the problem faced by the inventor regarding increasing resolution from a low-bit ADC output without resorting to larger, more power intensive ADCs, Dattorro teaches a counter (fig. 6 counter 610) for combining successive outputs of the analog to digital converter to derive an output value with a resolution of a second number of bits, greater than the first number of bits (col. 1 line 20-33 the ADC consists of a front end and a decimator the decimator combines successive samples to increase sample resolution, which would increase the number of bits).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of Peeters with the counter of Dattorro, as this would allow for high resolution samples with a relatively low noise levels (see col. 2 lines 45-54).
However, the combination of Peeters and Dattorro are silent regarding controlling the amplitude of the oscillator circuit based on the output value.
In a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Madala teaches controlling the amplitude of the oscillator circuit based on the output value (fig. 6 self-biasing feedback resistor 620 to maximize the loop gain in the oscillator 600 [0124]; [0122] these are used to control the total amount of loop gain contributed by invertors).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the feedback resistor of Madala, as this would lead to a balanced oscillator, which provides less phase noise, better clock symmetry, and better common-mode noise immunity (see Madala [0050]).
Regarding claim 16, modified Peeters teaches the method of claim 15, wherein Peeters further teaches wherein a frequency of the electromagnetic excitation signals is from 30 MHz to 1000 MHz ([0237] “the system 10 may be configured such that electromagnetic excitation signals have a frequency of from 30 MHz to 1000 MHz.”).
Regarding claim 17, modified Peeters teaches the method of claim 15, wherein Peeters further teaches a signal processor for processing the output values over time to derive one or more physiological parameters ([0202] controller 68 can derive physiological characteristics from the output signal 70).
Regarding claim 18, modified Peeters teaches the method of claim 17, wherein Peeters further teaches wherein the physiological parameters comprise a heart rate and/or a breathing rate([0202] controller 68 can derive physiological characteristics such as heart rate and breathing rate from the output signal 70).
Regarding claim 19, modified Peeters teaches the system of claim 1, but is silent regarding wherein controlling the amplitude further comprises controlling a bias current within the oscillator circuit.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Madala teaches wherein controlling the amplitude further comprises controlling a bias current within the oscillator circuit ([0143] the feedback controller comprises a counter and DAC’s which generate voltages applied to the NMOS and PMOS devices of the oscillator (VCONT_N, VCONT_P); these control voltages establish operating points of the transistors and thereby regulate the bias current supplied to the oscillator).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the feedback resistor of Madala, as this would lead to a balanced oscillator, which provides less phase noise, better clock symmetry, and better common-mode noise immunity (see Madala [0050]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Peeters in view of Dattorro and Madala as applied to claim 1 above, and further in view of Jackson (US5329282A).
Regarding claim 3, modified Peeters teaches the system of claim 1, but is silent regarding wherein digital signal generated by the analog to digital converter comprises a 2 bit signal.
However, in a reference that is pertinent to the problem faced by the inventor of multi-bit digitization, Jackson teaches wherein digital signal generated by the analog to digital converter comprises a 2 bit signal (col. 4 line 50-53 the DAC receives two output bits from the M-bit quantizer 46).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the two bit signal of Jackson, as this would improve the resolution of the ADCs (see Jackson col. 2 line 11-13).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Peeters in view of Dattorro and Madala as applied to claim 5 above and further in view of Caffee (US20170179881A1).
Regarding claim 6, modified Peeters teaches the system of claim 5, but is silent regarding wherein the amplitude measurement circuit comprises a peak detector circuit.
In the same oscillator circuits field of endeavor, Caffee teaches wherein the amplitude measurement circuit comprises a peak detector circuit ([0032]the amplitude detector 406 senses the peak amplitude of the oscillating signal and may adjust the voltage depending on the peak amplitude of the oscillating output signal).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the peak amplitude detector of Caffee, as automatic control of the amplitude reduce degradation of oscillator performance (see Caffee [0005]).
Claims 9 and 20 is rejected under 35 U.S.C. 103 as being unpatentable over Peeters in view of Dattorro and Madala as applied to claim 8 and 19 above, and further in view of Wang et al., (US20200014392A1).
Regarding claim 9, modified Peeters teaches the system of claim 8, but is silent regarding wherein the circuit for controlling a bias current comprises a current mirror circuit for injecting a current into the oscillator circuit.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Wang teaches wherein the circuit for controlling a bias current comprises a current mirror circuit for injecting a current into the oscillator circuit (fig. 2 the current mirror 24 comprising transistors M4 and M3 to provide Itail to bias the oscillator via transistor M3 [0050]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the current mirror of Wang, as this would allow for the phase noise to be kept low while on a certain power budge (see Wang [0012]).
Regarding claim 20, modified Peeters teaches the method of claim 19, but is silent regarding wherein the circuit for controlling a bias current comprises a current mirror circuit for injecting a current into the oscillator circuit.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Wang teaches wherein the circuit for controlling a bias current comprises a current mirror circuit for injecting a current into the oscillator circuit (fig. 2 the current mirror 24 comprising transistors M4 and M3 to provide Itail to bias the oscillator via transistor M3 [0050]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the method of modified Peeters with the current mirror of Wang, as this would allow for the phase noise to be kept low while on a certain power budge (see Wang [0012]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Peeters in view of Dattorro and Madala as applied to claim 8 above, and further in view of Naviasky et al., (US20050104670A1)
Regarding claim 10, modified Peeters teaches the system of claim 8, but is silent regarding wherein the oscillator circuit comprises a drive transistor and the circuit for controlling a bias current comprises a circuit for introducing losses to the driver transistor.
However in a reference reasonably pertinent to the problem faced by the inventor regarding amplitude drift and instability, Naviasky teaches wherein the oscillator circuit comprises a drive transistor (fig.2 amplifier 120b makes up for the losses in the LC tank and drives the next stage [0017]) and the circuit for controlling a bias current comprises a circuit for introducing losses to the driver transistor ([0017] The current mirror 130 b supplies the operating current for the amplifier. the transconductance amplifier 140 b converts the amplitude control voltage on node A to a current to control the oscillator amplifier 120 b. The full wave amplitude rectifier or detector 150 b monitors the oscillation amplitude and compares it to a reference implicitly set by the bias voltage Vb. Current source and capacitance, i.e. integrator, 160 b perform an integration to provide at least a portion of the loop gain).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to modify the system of modified Peeters with the transistor system of Naviasky, as this would increase loop stability and accuracy (see Naviasky [0017]).
Response to Arguments
Applicant's arguments filed 03/23/2026 have been fully considered but they are not persuasive.
Regarding claim 1, Applicant has argued that Peeters merely mentions that measuring damping factor changes requires measuring the imaginary part of reflected inductance which might require additional complexity in the circuity of the signal processing means and that the Applicant’s claim requires a circuit for measuring the imaginary part of the complex reflected inductance.
Examiner disagrees, as while [0059] Peeters does not explicitly disclose a circuit that is used to measure the imaginary part of the complex reflected inductance, one of ordinary skill would understand that Peeters would require the use of circuit to measure the imaginary part of the inductance. Further, [0059] recites that measuring the imaginary part would require additional complexity in the circuitry, and that is possible to do so. One of ordinary skill would understand that this would mean that it uses circuitry to measure the imaginary part of the inductance.
The remaining claims remain rejected for substantially the same reasons as above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL Y FANG whose telephone number is (571)272-0952. The examiner can normally be reached Mon - Friday 9:30 am - 6:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pascal Bui-Pho can be reached at 5712722714. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MICHAEL YIMING FANG/Examiner, Art Unit 3798
/PASCAL M BUI PHO/Supervisory Patent Examiner, Art Unit 3798
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