Prosecution Insights
Last updated: April 19, 2026
Application No. 18/040,385

WEIGHTS LAYOUT TRANSFORMATION ASSISTED NESTED LOOPS OPTIMIZATION FOR AI INFERENCE

Final Rejection §101§103
Filed
Feb 02, 2023
Examiner
HICKS, AUSTIN JAMES
Art Unit
2142
Tech Center
2100 — Computer Architecture & Software
Assignee
Qualcomm Incorporated
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
308 granted / 403 resolved
+21.4% vs TC avg
Strong +25% interview lift
Without
With
+25.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
54 currently pending
Career history
457
Total Applications
across all art units

Statute-Specific Performance

§101
13.9%
-26.1% vs TC avg
§103
46.3%
+6.3% vs TC avg
§102
17.3%
-22.7% vs TC avg
§112
19.2%
-20.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 403 resolved cases

Office Action

§101 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 2/5/2026 have been fully considered. With respect to claim 17’s written description. Examiner interprets the computing device as the means for accomplish all functions in claim 17. Therefore, the 112a rejection of claim 17 is withdrawn. Applicant argues, “Applicant submits that machine learning is an established technology and that the subject matter of independent claims 1, 9, 17, and 18 provides a particular solution/improvement to machine learning…. the claimed features provide a solution to the problem that a ‘[t]rained neural network can require costly nested loop execution that can burden the computing resources of such computing hardware…” Remarks 10-11. There is no law or rule that recognizes machine learning is a technology that may be improved in order to integrate an abstract idea into a practical application. MPEP 2106.04(d)(1). Improving an algorithm, even if it is a machine learning algorithm, is not, by itself, patent eligible subject matter. Applicant argues, “However, Taba fails to describe, at least, ‘accessing a first memory to retrieve weights of the weight tensor in a transformed order that is different than an order for retrieving the weights for a calculation at a network layer of a trained machine learning model, wherein accessing the first memory to retrieve the weights comprises retrieving the weights from the first memory according to a row-major layout,’ as recited in claim 1.” Remarks 12. Examiner agrees. New art is added to teach the added claim limitations. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. Claim 17 invokes a mean-for interpretation. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-25 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a mathematical relationship abstract idea without significantly more. The claims recite accessing first data, transforming data and loading the data. This judicial exception is not integrated into a practical application because the claim is merely linked to the field of computing. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements such as a first and second memory, processing device and computing device are generic computer parts. Further, the specification makes it clear that the two memories can be virtual memories, which means that this data manipulation can be entirely inside of one memory, “the first memory and the second memory may be within the same memory device, such as different partitions within the same memory device.” Spec. 91. Therefore, the additional elements are really just one memory and a processor inside of a computer. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5-11, 13-20 and 22-25 are rejected under 35 U.S.C. 103 as being unpatentable over US20200104718A1 to Taba et al and US20200285892A1 to Baum et al. Claims 4, 12 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over US20200104718A1 to Taba et al, US20200285892A1 to Baum et al and US20190205735A1 to Smelyanskiy et al (Smely). Taba teaches claims 1, 9, 17 and 18. (Currently Amended) A method for weight layout transformation of a weight tensor, comprising: accessing a first memory to retrieve weights of the weight tensor in a transformed order that is different than an order for retrieving the weights for a calculation at a network layer of a trained machine learning model, wherein accessing the first memory to retrieve the weights comprises retrieving the weights from the first memory according to a (Taba para 41 “IPU 200 includes a memory 201 for the neural network model. As described above, the neural network model may include the synapse weights for a neural network to be computed.” Taba para 70 “the weight order and input order are illustrated for exemplary snake paths.” Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.” The weights are stored in a matrix in model memory 301 in Taba fig. 3, and then computed in the cores 305/303.) loading the weights to a second memory in the transformed order. (Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.”) Taba doesn’t teach row-major layout. However, Baum teaches row-major layout. (Baum para 328 “the compiler reorders the plurality of weight by unrolling one of the weights into a vector using a row-major order.”) Baum, Taba and the claims all organize to NN parameters in memory. It would have been obvious to a person having ordinary skill in the art, at the time of filing, to use Baum’s alternative layout limit access to memory because “[l]imiting access to memory by the compute elements using a memory windowing scheme significantly improves the available bandwidth while greatly reducing the required address and control routing.” Baum para 228. Taba teaches claims 2, 10 and 19. (Currently Amended) The method of claim 1, wherein accessing the first memory to retrieve the weights of the weight tensor in the transformed order that is different than the order for retrieving the weights for the calculation at the network layer of the trained machine learning model comprises retrieving the weights according to a pattern of memory access iterating over a slowest changing dimension of the weight tensor. (Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.” Taba fig. 6a iterates over all the dimensions, R and S, so Taba necessarily iterates over the slowest changing dimension.) Taba teaches claims 3, 11 and 20. (Original) The method of claim 2, wherein accessing the first memory to retrieve the weights according to the pattern of memory access iterating over the slowest changing dimension of the weight tensor comprises retrieving the weights according to a pattern of memory access iterating over a height dimension of the weight tensor. (Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.” Taba fig. 6a iterates over all the dimensions, R and S, so Taba necessarily iterates over the height dimension.) Taba teaches claims 4, 12 and 21. The method of claim 1, wherein accessing the first memory to retrieve weights of the weight tensor in the transformed order that is different than the order for retrieving the weights for the calculation at the network layer of the trained machine learning model comprises accessing the first memory to retrieve weights of the weight tensor in an order specified by a first counter variable and a second counter variable of a first memory access command, wherein the first counter variable and the second counter variable are configured to represent a location in the weight tensor, and wherein the first counter variable and the second counter variable are (Taba fig. 6b shows an access and storage order that are different. The first and second counter variable is the position in the matrix, see below.) Taba doesn’t teach iterating one column at a time, which is what happens when you transpose the counters in a square 2D matrix. PNG media_image1.png 132 314 media_image1.png Greyscale Taba fig. 6b. However, Smely teaches traversing a column one-at-a-time. (Smely para 47 “hardware lowering operations of the instant disclosure may involve linearizing matrices or submatrices (e.g., patches of a matrix) by converting them to and/or arranging them in a single row or column of a matrix multiplication operand to allow for matrix multiplication.”) Taba, Smely and the claims are all directed to machine implementations of linear algebra. It would have been obvious to a person having ordinary skill in the art, at the time of filing, to traverse the columns after accessing on a row-by-row basis in order to “improve the efficiency of neural networks that rely on convolution” (Smely para 45), because flattening the matrix allows for parallel processing of all the columnar values at once. Taba teaches claims 5, 13 and 22. The method of claim 1, wherein loading the weights to the second memory in the transformed order comprises loading the weights to the second memory in a linear layout according to a pattern of memory access iterating over a slowest changing dimension of the weight tensor. (Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.” Taba fig. 6a iterates over all the dimensions, R and S, so Taba necessarily iterates over the slowest changing dimension.) Taba teaches claims 6, 14 and 23. The method of claim 5, wherein loading the weights to the second memory in the linear layout comprises loading the weights to the second memory as a linear array. (Taba shows the linear array as the line traversing the weights in Fig. 6b, see below.) PNG media_image2.png 554 574 media_image2.png Greyscale Taba teaches claims 7, 15 and 24. The method of claim 1, further comprising: retrieving the weights from the second memory in the transformed order; and reordering the weights to the order for implementing the calculation at the network layer of the trained machine learning model. (Taba para 71 “FIGS. 13A-F, the weight order and input order are illustrated for exemplary spiral paths.”) Taba teaches claims 8, 16 and 25. The method of claim 1, wherein the first memory and the second memory are in a same memory device. (Taba para 43 “IPU 300 includes a model memory 301… IPU 300 includes a plurality of cores 303.” The IPU 300 is the memory device, and the cores 303 and model memory 301 are in the IPU 300, see below.) PNG media_image3.png 378 602 media_image3.png Greyscale Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Austin Hicks whose telephone number is (571)270-3377. The examiner can normally be reached Monday - Thursday 8-4 PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mariela Reyes can be reached at (571) 270-1006. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AUSTIN HICKS/Primary Examiner, Art Unit 2142
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Prosecution Timeline

Feb 02, 2023
Application Filed
Nov 12, 2025
Non-Final Rejection — §101, §103
Jan 27, 2026
Examiner Interview Summary
Jan 27, 2026
Applicant Interview (Telephonic)
Feb 05, 2026
Response Filed
Mar 17, 2026
Final Rejection — §101, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+25.1%)
3y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 403 resolved cases by this examiner. Grant probability derived from career allow rate.

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