DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Examiner acknowledges amending of claims 1-9. Claim 3 objection withdrawn. Claim 5-6 112b rejections withdrawn.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 9 (insulating layer in contact with/covers first portion of high resistance region and exposes second portion of high resistance region) and have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument (Remarks pgs. 10-12). New prior art reference Su (KR-100366040-B1) used to reject new limitation.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asaka (JP-2003051643-A, machine translation "Asaka_English" cited and included herewith) in view of Su (KR-100366040-B1, machine translation “Su_English” cited and included herewith.
Regarding claim 1, Asaka discloses a semiconductor laser (fig. 1 semiconductor laser 100, top of pg. 4) comprising: a first semiconductor layer (fig. 1 first semiconductor layer 103, Abstract); an active layer (fig. 1 active layer 105, Abstract); a second semiconductor layer on the first semiconductor layer wherein the active layer is between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer has a strip-shaped ridge (fig. 1 second semiconductor layer 107 stacked on 103 with 105 between, 107 has strip-shaped ridge), and a high-resistance region at a foot of the strip-shaped ridge (annotated fig. 1 high-resistance region 110 at Foot, 3rd par. from bottom pg. 5, see instant application specification par. 0022), and the high-resistance region has a higher resistance than the strip-shaped ridge (pg. 5 third par. from bottom); an insulating layer in contact with both side surfaces of the strip-shaped ridge in a width direction of the strip-shaped ridge.
Asaka does not disclose wherein the insulating layer is further in contact with a first portion of the high-resistance region, and the insulating layer covers the first portion of the high-resistance region and exposes a second portion of the high-resistance region; and an electrode layer electrically coupled to an upper surface of the strip-shaped ridge, wherein the electrode layer is in contact with the second portion of the high-resistance region.
Su discloses a ridge semiconductor laser diode with an SiO2 insulating film in contact with only a first portion of a high resistance region and exposing a second portion of the high resistance region; and an electrode layer electrically coupled to an upper surface of the ridge + in contact with second portion of high-resistance region (fig. 13 insulating film 21 in contact with first portion of high resistance region 7 and exposes second portion of 7, electrode layer 8 electrically coupled to upper surface of ridge and in contact with second portion of 7 (exposed portion), lines 29-31, 107-117, 174-181).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the arrangement in claim 1 and extend the insulating film, where the insulating film covers/is in contact with only a portion of the high resistance region, to provide insurance and further prevent current leakage at boundaries.
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Annotated fig. 1
Regarding claim 2, modified Asaka discloses the semiconductor laser according to claim 1, wherein the high-resistance region has the higher resistance by ion implantation into a portion of the second semiconductor layer (annotated fig. 1 110 at Foot higher resistance and formed by ion implantation into 107 (+ other layers), 3rd par. from bottom pg. 5).
Regarding claim 3, modified Asaka discloses the semiconductor laser according to claim 1, wherein the insulating layer includes a first insulating layer and a second insulating layer (fig. 1 insulating layer 111 includes first insulating layer left 111 and second insulating layer right 111), the first insulating layer faces the second insulating layer (left 111 faces right 111), the upper surface of the strip-shaped ridge is between the first insulating layer and the second insulating layer (upper surface of ridge between left and right 111), each of the first insulating layer and the second insulating layer extends in a direction parallel to an extending direction of the strip-shaped ridge (fig. 1 111 both sides has first insulating layer 111 left side and second insulating layer 111 right side facing each other with upper surface (top) of ridge between, 111 extends parallel to extending direction of ridge (into/out of page), see fig. 4 top view, 4th and 5th par. from bottom pg. 6), the high-resistance region includes a first high-resistance region (HRR) on a first side of the second semiconductor layer (annotated fig. 1 110 at Foot (both sides) includes first HRR (left 110 at Foot) formed on first (left) side of 107, see instant application fig. 2), and a second high-resistance region on a second side of the second semiconductor layer (right 110 at Foot formed on second (right) side of 107), the first side of the second semiconductor layer is associated with a first side surface of the strip-shaped ridge (left 107 associated with first (left) side surface of ridge), the second side of the second semiconductor layer is associated with a second side surface of the strip-shaped ridge (annotated fig. 1 second high-resistance region 110 at Foot right side formed on second side surface side (right side) at other side surface of ridge (right side), right 107 associated with second (right) side surface of ridge), the first insulating layer is from the first side surface of the strip-shaped ridge to an edge of the first high- resistance region (annotated fig. 1 111 left side formed from left side surface to a (left) edge of the left 110 at Foot region), the second insulating layer is from the second side surface of the strip-shaped ridge to an edge of the second high-resistance region (annotated fig. 1 111 right side formed from right side surface to a (right) edge of the right 110 at Foot region), and each of the first insulating layer and the second insulating layer exposes a portion of the upper surface of the strip-shaped ridge (111 left and right each expose upper surface of ridge), the electrode layer is in contact with the portion of the upper surface of the strip-shaped ridge (fig. 1 113 in physical/electrical contact with exposed portion of upper surface (top) of the ridge which is not covered by 111 left and right), and the electrode layer is further in contact with the first high-resistance region and the second high-resistance region (annotated fig. 1 113 in physical contact with left and right 110 at Foot).
Regarding claim 4, modified Asaka discloses the semiconductor laser according to claim 1, wherein the high-resistance region extends from a surface of a region of the second semiconductor layer to a depth reaching the active layer, and the region of the second semiconductor layer corresponds to the foot of the strip -shaped ridge (annotated fig. 1 110 extends from top surface of 107 to depth reaching 105, region of 107 corresponds to Foot).
Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asaka in view of Su and Sasaki (JP-02187089-A, machine translation "Sasaki_English" cited and included herewith).
Regarding claim 5, modified Asaka discloses the semiconductor laser according to claim 1.
Modified Asaka does not explicitly disclose further comprising a pair of resonator end faces wherein a first resonator end face of the pair of resonator end faces opposes a second resonator end face of the pair of resonator end faces in a direction parallel to an extending direction of the strip-shaped ridge, and the strip-shaped ridge is between the pair of resonator end faces, and a pair of end faces wherein a first end face of the pair of end faces opposes a second end face of the pair of end faces in a direction parallel to the width direction of the strip-shaped ridge, and the high-resistance region is further at the pair of resonator end faces and the pair of end faces.
Sasaki discloses a semiconductor laser element with a high-resistance ion implantation region that extends to a pair of resonator end faces and a pair of end faces with the orientation outlined in claim 5 (annotated fig. 5 ion implantation region 41 formed at pair of resonator end faces first REF1/ second REF2, REF1/2 face each other with ridge RID between in direction parallel to extending direction (top bottom) of RID, pair of end faces first EF3/second EF4 facing each other in direction parallel to width direction (left right) of RID, see highlighted (gray) portions of Sasaki_English on pg. 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to arrange the high-resistance ion implantation region to extend to all 4 faces of the semiconductor laser to reduce threshold current + improve efficiency (Sasaki highlighted portion pg. 4).
Regarding claim 6, modified Asaka discloses the semiconductor laser according to claim 5, further comprising a defect concentration region at the pair of end faces or in vicinity of the pair of end faces, wherein the high-resistance region is further at the defect concentration region (3rd par. from bottom pg. 5).
High-resistance region in Asaka formed via ion implantation, therefore, it both contains and is formed at a defect concentration region. Both are at and in vicinity of all 4 faces of the laser.
def. vicinity – the quality or state of being near (Merriam-Webster def. 3)
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Annotated fig. 5
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asaka in view of Su and Connolly (US-6757313-B1)
Regarding claim 7, modified Asaka discloses the semiconductor laser according to claim 1.
Modified Asaka does not disclose wherein the second semiconductor layer further has a pedestal at positions of the second semiconductor layer, wherein a first position of the positions faces a second position of the positions, and the strip-shaped ridge is between the positions, and a groove between the strip-shaped region and the pedestal, and the high-resistance region is from a location directly below a bottom surface of the groove to the pedestal.
Connolly discloses a semiconductor laser diode with a second clad layer with a pedestal at positions facing each other with a ridge in between (figs. 1+ annotated fig. 3 laser 1 with second clad layer 18 with pedestal PE1 + PE2 at first + second position, respectively, facing each other with ridge RID between, col. 3 lines 25-45), a high-resistance region formed from directly below a bottom surface of a groove, positioned between the ridge and the pedestal, to the pedestal (annotated fig. 3 high resistance region 26 + 26’ formed from directly below bottom surface of (left) groove 23, positioned between RID and PED1, to PED1, col. 5 lines 20-25 + 60-end).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a pedestal + arrange the high-resistance region in the manner required by claim 7 to prevent the occurrence of unwanted modes, reduce astigmatism (Connolly col. 4 lines 15-25), allow for increased depth of high-resistance region (Connolly col. 5 lines 55-end), and further preventing lateral spread of gain current (Connolly Abstract).
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Annotated fig. 3
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asaka in view of Su, Connolly and JP-S63185264-U/hereinafter ”JPREF”, machine translation “JPref_English” cited and included herewith.
Regarding claim 8, modified Asaka discloses the semiconductor laser according to claim 1.
Modified Asaka does not disclose wherein the second semiconductor layer further has a pedestal at positions of the second semiconductor layer, wherein a first position of the positions faces a second position of the positions, and the strip-shaped ridge is between the positions, and a groove between the strip-shaped ridge and the pedestal, the high-resistance region is further at the pedestal in a region of the foot of the strip-shaped ridge.
Connolly discloses a semiconductor laser diode with a second clad layer with a pedestal at positions facing each other with a ridge in between (figs. 1+ annotated fig. 3 laser 1 with second clad layer 18 with pedestal PE1 + PE2 at first + second position, respectively, facing each other with ridge RID between, col. 3 lines 25-45), a high-resistance region formed from directly below a bottom surface of a groove, positioned between the ridge and the pedestal, to the pedestal (annotated fig. 3 high resistance region 26 + 26’ formed from directly below bottom surface of (left) groove 23, positioned between RID and PED1, to PED1, col. 5 lines 20-25 + 60-end).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a pedestal + arrange the high-resistance region in the manner required by claim 7 (not claim 8) to prevent the occurrence of unwanted modes, reduce astigmatism (Connolly col. 4 lines 15-25), allow for increased depth of high-resistance region (Connolly col. 5 lines 55-end), and further preventing lateral spread of gain current (Connolly Abstract).
Modified Asaka does not disclose and the region of the foot of the strip-shaped ridge excludes a location directly below a bottom surface of the groove.
JPREF discloses a semiconductor laser with a high-resistance ion implant region in a top cladding layer being in a foot region of a ridge but being excluded from a location directly below a bottom surface of a groove (fig. 1d lateral part 18 of top cladding layer 14 contains ion implant and located in foot region of ridge in pedestals but not underneath grooves 16, see highlighted portions in attached translated document on pgs. 1-2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the region of the foot of the strip-shaped ridge excludes a location directly below a bottom surface of the groove. to reduce the amount of ion implantation required while still retaining some degree of benefit from said ion implantation.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asaka in view of Su and Hagino (WO-2018180524-A1, machine translation “Hagino_English” cited and included herewith).
Regarding claim 9, Asaka discloses a semiconductor laser device (fig. 1 semiconductor laser 100, top of pg. 4) comprising: a semiconductor laser (fig. 1 semiconductor laser 100, top of pg. 4) wherein the semiconductor laser includes: a first semiconductor layer (fig. 1 first semiconductor layer 103, Abstract); an active layer (fig. 1 active layer 105, Abstract); a second semiconductor layer on the first semiconductor layer wherein the active layer is between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer has a strip-shaped ridge (fig. 1 second semiconductor layer 107 stacked on 103 with 105 between, 107 has strip-shaped ridge), and a high-resistance region at a foot of the strip-shaped ridge (annotated fig. 1 high-resistance region 110 at Foot, 3rd par. from bottom pg. 5, see instant application specification par. 0022), and the high-resistance region has a higher resistance than the strip-shaped ridge (pg. 5 third par. from bottom); an insulating layer in contact with both side surfaces of the strip-shaped ridge in a width direction of the strip-shaped ridge.
Asaka does not disclose wherein the insulating layer is further in contact with a first portion of the high-resistance region, and the insulating layer covers the first portion of the high-resistance region and exposes a second portion of the high-resistance region; and an electrode layer electrically coupled to an upper surface of the strip-shaped ridge, wherein the electrode layer is in contact with the second portion of the high-resistance region.
Su discloses a ridge semiconductor laser diode with an SiO2 insulating film in contact with only a first portion of a high resistance region and exposing a second portion of the high resistance region; and an electrode layer electrically coupled to an upper surface of the ridge + in contact with second portion of high-resistance region (fig. 13 insulating film 21 in contact with first portion of high resistance region 7 and exposes second portion of 7, electrode layer 8 electrically coupled to upper surface of ridge and in contact with second portion of 7 (exposed portion), lines 29-31, 107-117, 174-181).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the arrangement in claim 1 and extend the insulating film, where the insulating film covers/is in contact with only a portion of the high resistance region, to provide insurance and further prevent current leakage at boundaries.
Modified Asaka does not disclose a connection pad electrically coupled to the semiconductor laser and to the electrode layer.
Hagino discloses a semiconductor laser device with a connection pad electrically coupled to an analogous electrode layer of the semiconductor laser device (fig. 4B semiconductor laser 200a has connection pad 102a electrically coupled to electrode layer 50 of 200a, bottom 5 par. of pg. 8, top 3 par. of pg. 9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a connection pad electrically coupled to the semiconductor laser and to the electrode layer to provide a broader area for electrical connection + increase mounting stability beyond what ridge alone offers. Mounting in this manner (junction down) also improves heat dissipation of the semiconductor laser (Hagino third par. pg. 9).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Ehrlich whose telephone number is (703)756-5716. The examiner can normally be reached M-F 8-5.
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/A.E./Examiner, Art Unit 2828
/MINSUN O HARVEY/Supervisory Patent Examiner, Art Unit 2828
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