DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
This office action is in response to the patent application 18/043,173 originally filed on February 27, 2023. Claims 1-20 are presented for examination. Claims 1 and 17 are independent.
Information Disclosure Statement
The Information Disclosure Statement filed on February 27, 2023 has been considered. An initialed copy of the Form 1449 is enclosed herewith.
Priority
This application is a 371 of PCT/US21/47660, filed August 26, 2021, which claims benefit of US Provisional Application 63/071,405, filed August 28, 2020.
Drawings
Regarding FIGS. 1-4, 7, 8, and 17-23, 37 CFR 1.84(m), stated in part, prefers the use of shading when parts are shown in perspective. In the present case, the drawings use dashed lines and shading in an otherwise non-perspective view that would not be of sufficient quality so that all details in the drawings are reproducible in the printed patent. Therefore, the use of shading in an otherwise non-perspective view prevents FIGS. 1-4, 7, 8, and 17-23 from complying with 37 CFR 1.84(m).
Claim Objections
Claim 6 is objected to because of the following informalities: typographical errors.
Claim 6 recites the limitation “configured to measure of a voltage.” The Examiner reasonably believes this is a typographical error and should be corrected to “configured to measure [[of]] a voltage.” Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by Iravanian (US 10,629,308).
Regarding claim 1, and substantially similar limitations in claim 17, Iravanian discloses a cardiac conduction simulation system for pacemakers (Iravanian col. 2 line 60 through col. 3 line 9, “an in-system simulation, where the simulated intracardiac electrocardiogram is integrated into actual clinical equipment, helps the clinician being trained to develop a sense and feel for the operation, management, and control of the equipment in the electrophysiology lab, (such as, by way of non-limiting example, the EP recording system, pacemakers, and defibrillators)”) comprising:
a memory configured to store one or more inputs from one or more users, wherein the one or more inputs include a selection of an arrhythmia scenario for a pacemaker (Iravanian col. 10 lines 3-21, “The computing device 170 can include… one or more memory devices 174, one or more input and output (I/O) devices 176… The memory 174 can include one or more memory devices that store data… The I/O device(s) 176 may include one or more components that allow a user of the computing device 170 to interface with applications executing in the computing device 170.”; also Iravanian col. 11 lines 51-53, “These nodes comprise both physiological and artificial “pacemakers” that initiate an excitation wave,” where the excitation wave is an arrhythmia scenario); and
a processor operatively coupled to the memory (Iravanian col. 9 line 62 through col. 10 line 21, “The computing device 170 can include one or more processors 172, one or more memory devices 174”) and configured to:
generate an electrogram signal for the pacemaker based at least in part on the selected scenario (Iravanian col. 8 lines 24-51, “a pulse generator 136 and a pulse generator programmer 140. The pulse generator may be used to deliver pacing pulses to the cardiac simulation model in response to simulated cardiac rhythmic disorders that are being observed by the trainee,” where the pulses are electrogram signals; also Iravanian col. 11 lines 51-53, “These nodes comprise both physiological and artificial “pacemakers” that initiate an excitation wave,” where the excitation wave is an arrhythmia scenario);
process one or more output pacing signals received from the pacemaker (Iravanian col. 2 line 60 through col. 3 line 9, “A simulator that feeds signals directly to the clinical EP recording system and receives signals from the clinical EP recording system (including stimulation signals from, for example, a clinical pacemaker) is closer to the manner by which an EP study is performed.”); and
generate an electrocardiogram (ECG) signal in accordance with the processed one or more output pacing signals from the pacemaker (Iravanian col. 2 line 60 through col. 3 line 9, “the simulated intracardiac electrocardiogram is integrated into actual clinical equipment, helps the clinician being trained to develop a sense and feel for the operation, management, and control of the equipment in the electrophysiology lab, (such as, by way of non-limiting example, the EP recording system, pacemakers, and defibrillators)”; also Iravanian col. 8 lines 24-56, “The pulse generator may be used to deliver pacing pulses to the cardiac simulation model in response to simulated cardiac rhythmic disorders that are being observed by the trainee during the EP training session”; also Iravanian col. 14 lines 54-58, “the process 500 generates simulated surface electrocardiogram (ECG) and intracardiac electrogram (IEGM) signals based on the detected states. At block 508, the process 500 transmits the generated electrocardiogram signals to the user interface module 210”).
Regarding claim 2, Iravanian discloses wherein the scenario comprises a heart condition that is affected by the pacemaker (Iravanian col. 2 line 60 through col. 3 line 9, “A simulator that feeds signals directly to the clinical EP recording system and receives signals from the clinical EP recording system (including stimulation signals from, for example, a clinical pacemaker) is closer to the manner by which an EP study is performed”; also Iravanian col. 8 lines 24-56, “The pulse generator may be used to deliver pacing pulses to the cardiac simulation model in response to simulated cardiac rhythmic disorders that are being observed by the trainee during the EP training session.”).
Regarding claim 3, Iravanian discloses wherein the one or more inputs include a parameter setting for the scenario, and wherein the parameter setting includes an atrial rate and a ventricular rate (Iravanian col. 10 lines 51-67, “The intracardiac model 202 is a graph-dynamical system. The topology of the system is defined in a model graph, G=(V, E), comprising nodes (V for vertices in the language of the graph theory) and links (E for edges). The nodes are points of electrophysiological interest, such as, for example, the sinus node, the atrioventricular (AV) node, and the right ventricular (RV) apex. Nodes are connected by links, which model the conduction system and pathways of the cardiac anatomy. Each link connects a pair of nodes and can be either unidirectional or bidirectional. Illustratively, the nodes, links and related modeling structures (such as, for example, timers, data, and the like) of the intracardiac model 202 may be implemented in software-controlled state machines,” wherein the modeling structure represents parameter settings).
Regarding claim 4, Iravanian discloses wherein the parameter setting includes atrial or ventricular association or dissociation, and wherein the parameter setting includes a PR interval in a case of ventricular association (Iravanian col. 10 lines 51-67, “The intracardiac model 202 is a graph-dynamical system. The topology of the system is defined in a model graph, G=(V, E), comprising nodes (V for vertices in the language of the graph theory) and links (E for edges). The nodes are points of electrophysiological interest, such as, for example, the sinus node, the atrioventricular (AV) node, and the right ventricular (RV) apex. Nodes are connected by links, which model the conduction system and pathways of the cardiac anatomy. Each link connects a pair of nodes and can be either unidirectional or bidirectional. Illustratively, the nodes, links and related modeling structures (such as, for example, timers, data, and the like) of the intracardiac model 202 may be implemented in software-controlled state machines,” wherein the modeling structure includes association with atrial and ventricular activity through the sinus node, the atrioventricular node, and the right ventricular apex. The modeling structure also includes an entire cardiac cycle which includes a PR interval in a case of ventricular association with the activity of that atrioventricular node).
Regarding claim 5, Iravanian discloses wherein the parameter setting includes one or more capture thresholds (Iravanian col. 8 lines 13-23, “Illustratively, the simulated ablation, which is controlled by a user (i.e., an instructor) from the user workstation, is simulated by gradually increasing the refractory period of the target element (node or link) until it reaches a threshold. Once the threshold is reached, the refractory period is changed to infinity, thereby making the element incapable of being excited.”).
Regarding claim 6, Iravanian discloses an analog to digital converter (ADC) in communication with the processor, wherein the ADC is configured to measure of a voltage of the one or more output pacing signals of the pacemaker (Iravanian col. 9 lines 1-28, “The front end processor 108 includes signal conversion circuitry, signal conditioning circuitry, and pacing detection circuitry… Each bipolar output channel has a number, e.g., two, digital-to-analog converters (DACs) and e.g., two, analog-to-digital converters (ADCs). Simulated intracardiac signals are transmitted from the simulation processor 104 to the DACs of the front-end processor 108… The intracardiac signals received by the EP recording system 130 are directed back to the simulation processor 104, by way of the system interface 112, to the ADCs in the front end processor 108 where the output signals of the ADCs are conditioned to increase the voltage levels to expected values for the simulation processor 104 (e.g., approximately 1-5 V).”).
Regarding claim 7, Iravanian discloses a digital to analog converter (DAC) controlled by the processor, wherein the DAC is configured to generate the electrogram signal (Iravanian col. 9 lines 1-28, “The front end processor 108 includes signal conversion circuitry, signal conditioning circuitry, and pacing detection circuitry… Each bipolar output channel has a number, e.g., two, digital-to-analog converters (DACs) and e.g., two, analog-to-digital converters (ADCs). Simulated intracardiac signals are transmitted from the simulation processor 104 to the DACs of the front-end processor 108.”; also Iravanian col. 8 lines 24-51, “a pulse generator 136 and a pulse generator programmer 140. The pulse generator may be used to deliver pacing pulses to the cardiac simulation model in response to simulated cardiac rhythmic disorders that are being observed by the trainee during the EP training session,” the DAC generates the output signals including the pulse from the generator 136).
Regarding claim 8, and substantially similar limitations in claim 19, Iravanian discloses wherein the processor is configured to temporally align the electrogram signal and the ECG signal (Iravanian col. 14 lines 54-58, “At block 506, the process 500 generates simulated surface electrocardiogram (ECG) and intracardiac electrogram (IEGM) signals based on the detected states. At block 508, the process 500 transmits the generated electrocardiogram signals to the user interface module 210,” the simulation processor 104 displays the electrogram signals including from generator 136 the ECG signal to the user interface module 210).
Regarding claim 9, Iravanian discloses an initial heart state stored in the memory, wherein the processor transitions a simulation from the initial heart state to a subsequent heart state based at least in part on the one or more output pacing signals of the pacemaker that are received (Iravanian col. 8 lines 24-56, “The pulse generator may be used to deliver pacing pulses to the cardiac simulation model in response to simulated cardiac rhythmic disorders that are being observed by the trainee during the EP training session. Additional equipment, not shown in FIG. 1A, may also be used for the training session. The connections 106, 110, 114, and 116 may be any form of electrical, optical, or wireless interconnect structures, known in the art, that are suitable to transport data, such as, by way of non-limiting example, ribbon cable, coaxial cable, twisted pair cables, Ethernet cables, Wi-Fi, Bluetooth, or ZigBee, to name a few… The simulation processor 104 is configured, among other things, to execute an intracardiac model, calculate and transmit simulated cardiac signals, detect pacing signals, and communicate with a simulation instructor via the simulator user interface 118.”; also Iravanian col. 11 lines 56-62, “FIG. 4A is a state diagram of a node 400A used in an intracardiac model according to an embodiment of the present disclosure. The node 400A transitions between a resting state 402 and a refractory state 404. Arrow 406 illustrates a transition from the resting state 402 to the refractory state 404, and arrow 408 illustrates a transition from the refractory state 404 to the resting state 402,” wherein the resting state is the initial heart rate stored in memory, and the simulation processor transitions a simulation from the resting state to a refractory state based at least in part on the one or more output pacing signals of the pacemaker).
Regarding claim 10, Iravanian discloses wherein the ECG signal corresponds to the subsequent heart state (Iravanian col. 14 lines 54-58, “At block 506, the process 500 generates simulated surface electrocardiogram (ECG) and intracardiac electrogram (IEGM) signals based on the detected states. At block 508, the process 500 transmits the generated electrocardiogram signals to the user interface module 210.”).
Regarding claim 11, and substantially similar limitations in claim 20, Iravanian discloses wherein the processor is configured to add electrical noise to the electrogram signal that is received by the pacemaker (Iravanian col. 8 lines 20-23, “extra noise is added to the simulated intracardiac signals generated from the element being ablated to simulate the manner by which ablation is reflected on the EP recording system.”).
Regarding claim 12, Iravanian discloses wherein the processor is configured to add one or more of digital noise, drift, and randomization to the ECG signal (Iravanian col. 9 lines 50-53, “Each channel includes a dual digital-to-analog converter with symmetrical, balanced voltage dividers to generate a low-noise, bipolar output signal based on the intracardiac model,” even though the signal is ‘low-noise,’ some noise is still generated; also col. 14 lines 54-58, “At block 506, the process 500 generates simulated surface electrocardiogram (ECG) and intracardiac electrogram (IEGM) signals based on the detected states. At block 508, the process 500 transmits the generated electrocardiogram signals to the user interface module 210.”).
Regarding claim 13, Iravanian discloses a display operatively coupled to the processor, wherein the display is configured to: display the ECG signal; display of an ECG effective heart rate; and display performance feedback data to the one or more users during or after completion of a simulation (Iravanian col. 9 lines 62-66, “a general purpose computing device and system 170 suitable for use in the simulation processor 104, the simulation user interface 118, the single board computer 152, and/or the instructor workstation 150,” simulation user interface is shown on a display; also Iravanian col. 14 lines 50-58, “The visualization process 500 causes simulated electrocardiogram signals to be displayed to the user.”; also Iravanian col. 13 lines 13-17, “use of an exponential decay function having a decay rate that depends, at least in part, on the cycle length and/or diastolic interval of the node is very useful in simulating certain electrical behaviors of the heart,” the displayed decay rate is the ECG effective heart rate; also Iravanian col. 15 lines 45-57, “a debriefing panel which permits the user to save, replay, and pause the display of the cardiac simulation,” the debriefing panel shows performance feedback data to the users following completion of the simulation).
Regarding claim 14, Iravanian discloses a pacemaker circuit that is configured to interface with the pacemaker, wherein the pacemaker circuit includes a load resistor configured to simulate resistance in a human heart (col. 2 line 60 through col. 3 line 9, “A simulator that feeds signals directly to the clinical EP recording system and receives signals from the clinical EP recording system (including stimulation signals from, for example, a clinical pacemaker) is closer to the manner by which an EP study is performed. Such an in-system simulation, where the simulated intracardiac electrocardiogram is integrated into actual clinical equipment, helps the clinician being trained to develop a sense and feel for the operation, management, and control of the equipment in the electrophysiology lab, (such as, by way of non-limiting example, the EP recording system, pacemakers, and defibrillators)”; also Iravanian col. 9 lines 12-22, “The output signals of the DACs are conditioned, by the conditioning circuitry, to reduce the voltage level of the signals to expected values for intrinsic intracardiac signals (e.g., approximately 1-5 mV) and to change the output impedance (e.g., approximately 500Ω). Once transformed by the font end processor 108, the analog simulated intracardiac signals are transmitted, by way of the system interface 112, to the EP recording system 130. These signals, received by the EP recording system 130 represent the patient's cardiac electrical activity, and are treated as such by the EP recording system,” the conditioning circuit includes a reduction in voltage level, or ‘load resister’, to simulate intrinsic intracardiac signals such as resistance in a human heart).
Regarding claim 15, Iravanian discloses a sensing circuit that receives an output from the pacemaker circuit, wherein the sensing circuit includes an inverted operational amplifier to divide and invert the output from the pacemaker circuit such that a maximum voltage of the output is controlled (Iravanian col. 9 lines 1-53, “Each bipolar output channel has a number, e.g., two, digital-to-analog converters (DACs) and e.g., two, analog-to-digital converters (ADCs). Simulated intracardiac signals are transmitted from the simulation processor 104 to the DACs of the front-end processor 108. The output signals of the DACs are conditioned, by the conditioning circuitry, to reduce the voltage level of the signals to expected values for intrinsic intracardiac signals (e.g., approximately 1-5 mV) and to change the output impedance (e.g., approximately 500Ω)… The intracardiac signals received by the EP recording system 130 are directed back to the simulation processor 104, by way of the system interface 112, to the ADCs in the front end processor 108 where the output signals of the ADCs are conditioned to increase the voltage levels to expected values for the simulation processor 104 (e.g., approximately 1-5 V). In addition, the front end processor 108 includes circuitry necessary to detect pacing pulses and to transmit the results to the simulation processor 104… Each channel includes a dual digital-to-analog converter with symmetrical, balanced voltage dividers to generate a low-noise, bipolar output signal based on the intracardiac model,” a pacing detecting circuitry, ‘sensing circuit’, that receives a pacing pulse output from the conditioning circuit generating pulses. The conditioning circuit includes a bipolar input channel, ‘inverted operational amplifier’, that divides and converts, or ‘inverts’, the pacing pulse from the pacemaker such that a voltage maximum of the pacing pulse is reduced).
Regarding claim 16, Iravanian discloses wherein the sensing circuit further comprises a non- inverting operational amplifier that is configured to rectify and amplify the output such that the output is maintained at a specific voltage (Iravanian col. 9 lines 1-33, “The front end processor 108 may include multiple input/output bipolar channels… Each bipolar output channel has a number, e.g., two, digital-to-analog converters (DACs) and e.g., two, analog-to-digital converters (ADCs)… The output signals of the DACs are conditioned, by the conditioning circuitry, to reduce the voltage level of the signals to expected values for intrinsic intracardiac signals (e.g., approximately 1-5 mV) and to change the output impedance (e.g., approximately 500Ω)… The intracardiac signals received by the EP recording system 130 are directed back to the simulation processor 104, by way of the system interface 112, to the ADCs in the front end processor 108 where the output signals of the ADCs are conditioned to increase the voltage levels to expected values for the simulation processor 104 (e.g., approximately 1-5 V). In addition, the front end processor 108 includes circuitry necessary to detect pacing pulses and to transmit the results to the simulation processor 104,” the detecting circuitry includes a bipolar output channel, ‘noninverting operational amplifier’, that conditions [rectify] and increase [amplify] the output signals including the pacing pulses to expected values of approximately 1-5V, thus maintained at a specific voltage).
Regarding claim 18, Iravanian discloses storing, in the memory, a parameter setting for the scenario, wherein the parameter setting includes an atrial rate, a ventricular rate, atrial association or dissociation, ventricular association or dissociation, a P wave amplitude, an R wave amplitude, or one or more capture thresholds (Iravanian col. 10 lines 51-67, “The intracardiac model 202 is a graph-dynamical system. The topology of the system is defined in a model graph, G=(V, E), comprising nodes (V for vertices in the language of the graph theory) and links (E for edges). The nodes are points of electrophysiological interest, such as, for example, the sinus node, the atrioventricular (AV) node, and the right ventricular (RV) apex. Nodes are connected by links, which model the conduction system and pathways of the cardiac anatomy. Each link connects a pair of nodes and can be either unidirectional or bidirectional. Illustratively, the nodes, links and related modeling structures (such as, for example, timers, data, and the like) of the intracardiac model 202 may be implemented in software-controlled state machines,” wherein the modeling structure represents parameter settings, wherein the modeling structure includes association with atrial and ventricular activity through the sinus node, the atrioventricular node, and the right ventricular apex. The modeling structure also includes an entire cardiac cycle which includes a PR interval in a case of ventricular association with the activity of that atrioventricular node; also Iravanian col. 8 lines 13-23, “Illustratively, the simulated ablation, which is controlled by a user (i.e., an instructor) from the user workstation, is simulated by gradually increasing the refractory period of the target element (node or link) until it reaches a threshold. Once the threshold is reached, the refractory period is changed to infinity, thereby making the element incapable of being excited.”).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Glassel et al. (US 5,692,907) Interactive cardiac rhythm simulator
Nappholz et al. (US 5,713,937) Pacemaker programmer menu with selectable real or simulated implant data graphics
Krummen et al. (US 2022/0061732) Enhanced computational heart simulations
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