DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 8, 10-13, and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kan (WO 2015136603 A1). Foreign Reference submitted with IDS, translation attached.
As to claim 1, Kan discloses: A semiconductor device (Fig. 1 and 14) comprising:
a plurality of transistors 11 (IGBT’s) electrically connected to each other in parallel, the plurality of transistors respectively including first electrodes;
a diode 12 electrically connected in parallel to the plurality of transistors, the diode including an anode electrode;
a first conductive pattern 29;
a second conductive pattern 30 electrically connected to the first conductive pattern;
a plurality of first connection members (bond wires connecting 11 to 29) directly connecting the first electrodes of the plurality of transistors to the first conductive pattern, respectively; and
a second connection member (bond wires connecting 12 to 30) connecting the anode electrode to the second conductive pattern,
wherein each of the first electrodes is a source electrode or an emitter electrode (see page 10; translation), and
wherein the plurality of transistors are arranged adjacent to each other (see Fig. 1 and 14).
As to claim 2, Kan discloses: A semiconductor device (Fig. 6 and 15) comprising:
a plurality of transistors 11 (IGBT’s) electrically connected to each other in parallel, the plurality of transistors respectively including first electrodes;
a diode 12 electrically connected in parallel to the plurality of transistors, the diode including an anode electrode;
a third conductive pattern 29;
a plurality of first connection members (bond wires connecting 11 to 29) directly connecting the first electrodes of the plurality of transistors to the third conductive pattern, respectively; and
a second connection member (bond wires connecting 12 to 29) connecting the anode electrode to the third conductive pattern,
wherein each of the first electrodes is a source electrode or an emitter electrode (see page 10; translation), and
wherein the plurality of transistors are arranged adjacent to each other (see Fig. 6 and 15).
As to claim 3, Kan discloses: wherein the plurality of transistors are aggregated in a first region having a rectangular shape (see top half, top left and right regions individually, bottom half; Fig. 1 and 14).
As to claim 4, Kan discloses: wherein the plurality of transistors are arranged side by side in a first direction (Fig. 1 – two side by side; Fig. 14 – four side by side).
As to claim 5, Kan discloses: wherein the second connection member is independent of the plurality of first connection members (see Fig. 1 and 14).
As to claim 6, Kan discloses: wherein the diode is not disposed between transistors adjacent to each other among the plurality of transistors (see Fig. 1, also outer diodes 12 in Fig. 14).
As to claims 8 and 15, Kan discloses: wherein the diode is a Schottky barrier diode formed using silicon carbide (p. 2, 10, 23; translation).
As to claim 10, Kan discloses: wherein the plurality of transistors are aggregated in a first region having a rectangular shape (top half, top left or top right regions individually in Fig. 6; bottom half in Fig. 15).
As to claim 11, Kan discloses: wherein the plurality of transistors are arranged side by side in a first direction (two side by side in Fig. 6; four side by side in Fig. 15).
As to claim 12, Kan discloses: wherein the second connection member is independent of the plurality of first connection members (see Fig. 6 and 15).
As to claim 13, Kan discloses: wherein the diode is not disposed between transistors adjacent to each other among the plurality of transistors (See outermost diodes 12 in Fig. 6 and 15).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kan (WO 2015136603 A1) as applied to claims 1 and 2 above, and further in view of Nakata (US 20200090937 A1).
As to claims 7 and 14, Kan does not explicitly disclose:
wherein each of the transistors is a field effect transistor formed using silicon carbide.
However, Nakata discloses silicon carbide mosfet transistors,
in order to provide power semiconductor devices with high breakdown voltage, low loss, and high heat resistance (par. 0002).
It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kan as suggested by Nakata, e.g., providing:
wherein each of the transistors is a field effect transistor formed using silicon carbide;
in order to provide a known/desired transistor type and/or provide power semiconductor devices with high breakdown voltage, low loss, and high heat resistance.
It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Additionally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination/modification would have yielded predictable results to one of ordinary skill in the art before the effective filing date of the claimed invention. See KSR International Co. v. Teleflex Inc., 550 U.S.___, 82 USPQ2d 1385 (2007).
Claim(s) 9 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kan (WO 2015136603 A1) as applied to claims 1 and 2 above, and further in view of Hayashi (US 20140124915 A1) .
As to claims 9 and 16, Kan does not explicitly disclose:
comprising:
a case accommodating the plurality of transistors and the diode; and
a control terminal attached to the case, the control terminal being connected to control electrodes of the plurality of transistors,
wherein the case has a pair of side walls opposite to each other, and a pair of end walls connecting both ends of the pair of side walls, and
wherein the control terminal is provided on a wall positioned closest to the plurality of transistors among the pair of side walls and the pair of end walls.
However, Hayashi discloses:
comprising:
a case 3 (Fig. 7-8) accommodating the plurality of transistors Tr1 and the diode Di1; and
a control terminal S1 attached to the case, the control terminal being connected to control electrodes of the plurality of transistors,
wherein the case has a pair of side walls (long walls) opposite to each other, and a pair of end walls (short walls) connecting both ends of the pair of side walls, and
wherein the control terminal is provided on a wall positioned closest to the plurality of transistors among the pair of side walls and the pair of end walls (S1 is on a long wall closest to transistors Tr1; see Fig. 7-8);
in order to provide a source for the transistors (par. 0145) and contain the semiconductor module circuits in a case 3 (par. 0086-0095).
It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Kan as suggested by Hayashi, e.g., providing:
comprising:
a case accommodating the plurality of transistors and the diode; and
a control terminal attached to the case, the control terminal being connected to control electrodes of the plurality of transistors,
wherein the case has a pair of side walls opposite to each other, and a pair of end walls connecting both ends of the pair of side walls, and
wherein the control terminal is provided on a wall positioned closest to the plurality of transistors among the pair of side walls and the pair of end walls;
in order to provide a source for the transistors and contain the semiconductor module circuits in a case.
Additionally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination/modification would have yielded predictable results to one of ordinary skill in the art before the effective filing date of the claimed invention. See KSR International Co. v. Teleflex Inc., 550 U.S.___, 82 USPQ2d 1385 (2007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Horie (US 20200395344 A1), Tsuyuno (US 20200388556 A1), and Hoya (US 20200303362 A1) disclose conventional semiconductor devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB R CRUM whose telephone number is (571)270-7665. The examiner can normally be reached Monday - Friday 9:00 am - 5:00 pm.
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/JACOB R CRUM/ Primary Examiner, Art Unit 2835