Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 5-17,19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stoutimore (US 10574251) in view of Lesse de Escobar (US 2019/0079145).
Regarding claims 1 and 17; Stoutimore teaches a diagnostic circuit and a method of operating thereof (ADC system; abstract) an input port configured to receive an input circuit (input port and input current; fig. 1, I_S), a first SQUID inductively coupled to the input port (fig. 2, #66) configured to generate a second voltage in response to the input current being greater than a first threshold (col. 4, lines 55), a second SQUID inductively coupled to the input port, wherein the second SQUID is configured to generate a second output in the form of a fourth voltage in response to the input current being greater than the second threshold current (col. 2, lines 20-23).
Stoutimore fails to teach a first voltage and a third voltage of the first and second SQUID, respectively.
Lesse de Escobar, however, teaches a sensor device (abstract) wherein a SQUID is configured such that no voltage is provided for a signal below a threshold for the purpose of providing a trigger (actual voltage) for when the current is above the threshold (para. 0033).
Therefore, it would have been obvious to one of ordinary skill in the art to provide the SQUIDs of Stoutimore configured such that no voltage is provided for a signal below a threshold in order to provide a trigger (actual voltage) for when the current is above the threshold as taught by Lesse de Escobar.
Regarding claims 5-8, 20; as Lesse de Escobar teaches that the first and third voltages (below the threshold) is zero and Stoutimore teaches there is a voltage when the threshold current is exceeded, the prior art teaches first voltage (zero) is less than a second voltage and third voltage (zero) is less than the fourth voltage.
Regarding claim 9, 20, Stoutimore teaches that the SQUIDS (64 and 66) are arranged substantially identical (col. 4, lines 38-50) such that it appears that the difference in voltages between the first and second voltage is substantially equal to the difference between the third and fourth voltage.
Regarding claim 10, 17, 19; regarding the limitation of providing three different input currents that induce an actual voltage in neither SQUID, one SQUID only, and both SQUIDs; Lesse de Escobar teaches an array of SQUIDs having different loop sizes (threshold currents) wherein different current inputs would trigger either small and large, small but not large, and both large and small current thresholds (para. 0026-0034).
Regarding claim 11, it would have been obvious to provide a third SQUID having a substantially similar operation (and same difference in voltage) as duplication of parts is prima facie obvious. See MPEP 2144.04 (VI) (B).
Regarding claims 12-16, as Lesse de Escobar teaches that the first and third voltages (below the threshold) is zero and Stoutimore teaches there is a voltage when the threshold current is exceeded, the prior art teaches first voltage (zero) is less than a second voltage and third voltage (zero) is less than the fourth voltage. Additionally, as the prior art renders obvious a third SQUID having a fifth and a sixth voltage in response to an input substantially similar to the first and second SQUID, the limitations of the claims are met.
Claim(s) 2-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stoutimore (US 10574251) in view of Lesse de Escobar (US 2019/0079145) and Chan (US 5863868).
Stoutimore teaches a product as described above in claim 1, but fails to teach the first SQUID comprises a first and second terminal and the first SQUID is configured to generate the first output between the first and second terminal.
Chan, however, teaches a s SQUID (abstract) wherein the SQUID has two terminals capable of carrying a current through the junction (col. 1, lines 12-25).
Therefore, it would have been obvious to one of ordinary skill in the art to provide the SQUIDs of Stoutimore has two terminals capable of carrying a current through the junction in order to provide a configuration known in the art as taught by Chan.
Regarding claim 4, Stoutimore teaches that the second terminal of SQUID (64) is connected to the third terminal of the second SQUID (66). See fig. 2 at the lines connecting the two SQUIDs.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stoutimore (US 10574251) in view of Lesse de Escobar (US 2019/0079145) and Bardin (US 2021/0257969).
Stoutimore teaches a process as described above in claim 17, but fails to teach receiving the first input current comprises receiving the first input current such that the first input current represents a state of a CMOS device operating at a cryogenic temperature.
Bardin, however, teaches a method for generating a qubit control signal (abstract) wherein the integrated circuits include a CMOS operated at a cryo temperature (para. 0038).
Therefore, it would have been obvious to one of ordinary skill in the art to provide the circuit of Stoutimore as a CMOS operated at a cryo temperature in order to provide a configuration known in the art as taught by Bardin.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL A WARTALOWICZ whose telephone number is (571)272-5957. The examiner can normally be reached Monday-Friday 9 am - 5 pm.
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/PAUL A WARTALOWICZ/Primary Examiner, Art Unit 1735
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