Prosecution Insights
Last updated: April 19, 2026
Application No. 18/048,436

DNN TRAINING ALGORITHM WITH DYNAMICALLY COMPUTED ZERO-REFERENCE

Final Rejection §102§DP
Filed
Oct 20, 2022
Examiner
GIROUX, GEORGE
Art Unit
2128
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
2 (Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
4y 6m
To Grant
93%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allow Rate
401 granted / 612 resolved
+10.5% vs TC avg
Strong +27% interview lift
Without
With
+27.1%
Interview Lift
resolved cases with interview
Typical timeline
4y 6m
Avg Prosecution
28 currently pending
Career history
640
Total Applications
across all art units

Statute-Specific Performance

§101
11.0%
-29.0% vs TC avg
§103
45.5%
+5.5% vs TC avg
§102
16.0%
-24.0% vs TC avg
§112
15.5%
-24.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 612 resolved cases

Office Action

§102 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This Office Action is in response to applicant’s communication filed 31 December 2025, in response to the Office Action mailed 1 October 2025. The applicant’s remarks and any amendments to the claims or specification have been considered, with the results that follow. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Drawings The applicant’s submitted drawings appear to be acceptable for examination purposes. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the drawings. Information Disclosure Statement As required by M.P.E.P. 609(c), the applicant's submission of the Information Disclosure Statement, dated 7 October 2025, is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 6, 8, 9, and 12 of U.S. Patent No. 12,293,281. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of U.S. Patent 12,293,281 anticipate those of the instant application, as described below. As per claim 1, the claim is compared with claim 9 of U.S. Patent 12,293,281—where any differences between them have been highlighted (in bold)—as follows: Instant Application U.S. Patent 12,293,281 A device comprising: a first matrix comprising a Resistive Processing Unit (RPU) crossbar array with a first set of hidden weights configured for a gradient update for a stochastic gradient descent (SGD) of a deep neural network (DNN) A deep neural network (DNN), comprising: an A matrix comprising analog resistive processing unit (RPU) devices separating intersections between conductive row wires and conductive column wires, whereby the RPU devices comprise processed gradients for weighted connections between neurons in the DNN; a second matrix comprising a second set of hidden weights for the DNN stored in a digital medium a weight matrix comprising RPU devices separating intersections between conductive row wires and conductive column wires, whereby the RPU devices comprise weighted connections between neurons in the DNN; a third matrix comprising a set of reference values, stored in the digital medium, wherein the set of reference values is computed during a transfer cycle of the first set of hidden weights from the first matrix to the second matrix, accounting for a chopper a processor configured to multiply activation values and error values from the weight matrix by a chopper value before being applied to the A matrix, and multiply an output vector from the A matrix by the chopper value to produce a chopper product, wherein the chopper value comprises a random selection from the group consisting of: a positive one (+1) and a negative one (−1), and the before and after multiplication of the chopper value mitigates bias of the A matrix and a fourth matrix comprising an RPU crossbar array storing a third set of weights for the DNN that are updated from the second matrix when a threshold is reached for the second set of hidden weights a computer storage configured to store a hidden matrix comprising an H value for each RPU device in the weight matrix W As per claim 2, see claim 8 of U.S. Patent 12,293,281. As per claim 3, see claim 9 of U.S. Patent 12,293,281. As per claim 4, see claim 8 of U.S. Patent 12,293,281. As per claim 5, see claim 9 of U.S. Patent 12,293,281. As per claim 6, see claim 9 of U.S. Patent 12,293,281. As per claim 7, see claim 9 of U.S. Patent 12,293,281. As per claim 8, see claim 8 of U.S. Patent 12,293,281. As per claim 9, see claim 9 of U.S. Patent 12,293,281. As per claim 10, see the rejection of claim 1, above, and claim 1 of U.S. Patent 12,293,281. As per claim 11, see the rejection of claim 2, above. As per claim 12, see the rejection of claim 3, above. As per claim 13, see claim 1 of U.S. Patent 12,293,281. As per claim 14, see the rejection of claim 5, above. As per claim 15, see the rejection of claim 6, above. As per claim 16, see the rejection of claim 7, above. As per claim 17, see the rejection of claim 8, above. As per claim 18, see the rejection of claim 9, above. As per claim 19, see the rejection of claim 1, above, and claim 12 of U.S. Patent 12,293,281. As per claim 20, see the rejection of claim 3, above. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gokmen (US 2022/0327375). As per claim 1, Gokmen teaches a device comprising: a first matrix comprising a Resistive Processing Unit (RPU) crossbar array with a first set of hidden weights configured for a gradient update for a stochastic gradient descent (SGD) of a deep neural network (DNN) [a first matrix A (fig. 1A; etc.) comprising an RPU device, using an analog cross-point array for implementing a DNN (fig. 1B; etc.), including using stochastic gradient descent (SGD) training (paras. 0032-33, etc.)]; a second matrix comprising a second set of hidden weights for the DNN stored in a digital medium [a hidden (weight) matrix H for the DNN (para. 0027; fig. 1A; etc.) which can be stored digitally (paras. 0044-45; etc.)]; a third matrix comprising a set of reference values, stored in the digital medium, wherein the set of reference values is computed during a transfer cycle of the first set of hidden weights from the first matrix to the second matrix, accounting for a chopper [a reference matrix (third matrix) populated with conductance values computed during transfer from the first matrix (paras. 0043-48; fig. 4; etc.) which can be stored in digital storage space (para. 0026; etc.); while using a chopper value to compensate for the bias that may be introduced when setting the zero-shift and the chopper value negates the bias by flipping the sign of the bias for certain periods of time (accounting for a sign-change/chopper), during which time the bias is summed to the hidden matrix H with the opposite sign (paras. 0008, 0044-45, etc.)]; and a fourth matrix comprising an RPU crossbar array storing a third set of weights for the DNN that are updated from the second matrix when a threshold is reached for the second set of hidden weights [the training may include, after an H value reaches a threshold value, transmitting the input vector ei as a voltage pulse through the conductive column wires of a weight matrix W (fourth matrix) simultaneously with sign information of the H values that reached a threshold value as voltage pulses through the conductive row wires of the weight matrix W (paras. 0008, 0045, etc.)]. As per claim 2, Gokmen teaches a fifth matrix, stored in the digital medium, configured to compute a next set of reference values from values read from the first matrix, during a chopper cycle and the fifth matrix is configured to partially update the third matrix, after the chopper cycle is completed [the processor tracks summations of chopper products for elements of an A matrix in corresponding elements of a hidden matrix (fifth matrix). The chopper products may include activation and error values from a corresponding element of a weight matrix multiplied by a chopper value before and after (next set of reference values) being applied to the A matrix (paras. 0005-8, 0026, 0032, 0044-45; etc.)]. As per claim 3, Gokmen teaches wherein the second set of hidden weights accounts for a set of previous reference values from a prior iteration of the transfer cycle [the processor tracks summations of chopper products for elements of an A matrix in corresponding elements of a hidden matrix. The chopper products may include activation and error values from a corresponding element of a weight matrix multiplied by a chopper value before (previous reference values) and after (next set of reference values) being applied to the A matrix (paras. 0005-8, 0026, 0032, 0044-45; etc.)]. As per claim 4, Gokmen teaches a fifth matrix used to compute a next set of reference values to be used in a next chopper cycle based on reading from the first matrix, stored in the digital medium [the processor tracks summations of chopper products for elements of an A matrix in corresponding elements of a hidden matrix. The chopper products may include activation and error values from a corresponding element of a weight matrix multiplied by a chopper value before and after being applied to the A matrix (paras. 0005-8, 0026, 0032, 0044-45; etc.)]. As per claim 5, Gokmen teaches wherein the device is configured to assign the set of reference values to a set of previous reference values in the digital medium at a chopper switching time [the processor tracks summations of chopper products for elements of an A matrix in corresponding elements of a hidden matrix (fifth matrix). The chopper products may include activation and error values from a corresponding element of a weight matrix multiplied by a chopper value before and after (next set of reference values) being applied to the A matrix (paras. 0005-8, 0026, 0032, 0044-45; etc.)]. As per claim 6, Gokmen teaches wherein the device is configured to the set of reference values to zero at the chopper switching time [there is a one-to-one correlation between the devices in the weight array and reference array such that a unique zero-weight value can be established in each device in the reference array for one corresponding device in the weight array, where the iterative combination is combined with a chopper value configured to cancel out the bias that may result from imperfect zero-shift when the symmetry point is mapped for each RPU (paras. 0043-48; etc.)]. As per claim 7, Gokmen teaches wherein the device is configured to switch a sign of the chopper at the chopper switching time [The chopper value at a given time is equal to either a positive one (+1) or a negative one (−1). The chopper 116 randomly flips between the chopper values, such that for part of the training period the updates are applied to the A matrix 114 with an opposite sign (para. 0032, etc.)]. As per claim 8, Gokmen teaches wherein no RPU crossbar array is configured to store the set of reference values [the reference weight values may be stored digitally or in an RPU (paras. 0026, 0044, etc.); where storing them digitally means they are not stored in the RPU]. As per claim 9, Gokmen teaches wherein the device is configured to copy a set of previous reference values to a recent read-out weight vector [the voltage pulses applied to the cross-point array are also applied to the reference array and the output vector y (recent read-out weight vector) of cross-point array is then subtracted from that of the reference array (paras. 0046, 0050, 0053, etc.)]. As per claim 10, Gokmen teaches a computer implemented method comprising: performing a gradient update for a stochastic gradient descent (SGD) of a deep neural network (DNN) using a first set of hidden weights stored in a first matrix comprising a Resistive Processing Unit (RPU) crossbar array [a first matrix A (fig. 1A; etc.) comprising an RPU device, using an analog cross-point array for implementing a DNN (fig. 1B; etc.), including using stochastic gradient descent (SGD) training (paras. 0032-33, etc.)]; storing, in a digital medium, a second matrix comprising a second set of hidden weights for the DNN [a hidden (weight) matrix H for the DNN (para. 0027; fig. 1A; etc.) which can be stored digitally (paras. 0044-45; etc.)]; computing a third matrix comprising a set of reference values, upon a transfer cycle of the first set of hidden weights from the first matrix to the second matrix, accounting for a chopper [a reference matrix (third matrix) populated with conductance values computed during transfer from the first matrix (paras. 0043-48; fig. 4; etc.) which can be stored in digital storage space (para. 0026; etc.); while using a chopper value to compensate for the bias that may be introduced when setting the zero-shift and the chopper value negates the bias by flipping the sign of the bias for certain periods of time (accounting for a sign-change/chopper), during which time the bias is summed to the hidden matrix H with the opposite sign (paras. 0008, 0044-45, etc.)]; storing, in the digital medium, the third matrix [a reference matrix (third matrix) populated with conductance values computed during transfer from the first matrix (paras. 0043-48; fig. 4; etc.) which can be stored in digital storage space (para. 0026; etc.)]; and updating a third set of weights for the DNN from the second matrix when a threshold is reached for the second set of hidden weights, in a fourth matrix comprising an RPU crossbar array [the training may include, after an H value reaches a threshold value, transmitting the input vector ei as a voltage pulse through the conductive column wires of a weight matrix W (fourth matrix) simultaneously with sign information of the H values that reached a threshold value as voltage pulses through the conductive row wires of the weight matrix W (paras. 0008, 0045, etc.)]. As per claim 11, see the rejection of claim 2, above. As per claim 12, see the rejection of claim 3, above. As per claim 13, Gokmen teaches computing for the SGD a fifth matrix comprising a set of previous reference values; and storing the fifth matrix in the digital medium [the processor tracks summations of chopper products for elements of an A matrix in corresponding elements of a hidden matrix. The chopper products may include activation and error values from a corresponding element of a weight matrix multiplied by a chopper value before (previous reference values) and after (next set of reference values) being applied to the A matrix (paras. 0005-8, 0026, 0032, 0044-45; etc.) which can be stored in digital storage space (para. 0026; etc.)]. As per claim 14, see the rejection of claim 5, above. As per claim 15, see the rejection of claim 6, above. As per claim 16, see the rejection of claim 7, above. As per claim 17, see the rejection of claim 8, above. As per claim 18, see the rejection of claim 9, above. As per claim 19, see the rejection of claim 10, above, wherein Gokmen also teaches a non-transitory computer readable storage medium tangibly embodying a computer readable program code having computer readable instructions to solve a machine learning task, that, when executed, the computer readable instructions cause a computer device to carry out [the method] [The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention (paras. 0061-63; etc.)]. As per claim 20, see the rejection of claim 3, above. Response to Arguments The objection to claim 6 has been withdrawn due to the amendments filed. Applicant's arguments filed 31 December 2025 have been fully considered but they are not persuasive. Applicant argues that the cited art does not teach generating a third reference-value matrix or computing reference values during a transfer of weights. However, Gokmen teaches a reference matrix (third matrix) populated with conductance values computed during transfer from the first matrix (paras. 0043-48; fig. 4; etc.) which can be stored in digital storage space (para. 0026; etc.); while using a chopper value to compensate for the bias that may be introduced when setting the zero-shift and the chopper value negates the bias by flipping the sign of the bias for certain periods of time (accounting for a sign-change/chopper), during which time the bias is summed to the hidden matrix H with the opposite sign (paras. 0008, 0044-45, etc.) where the reference matrix (of conductance values for each RPU from the weight array) is the third matrix computed during the transfer cycle. Conclusion The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i): claims 1-20 are rejected. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gokmen (US 2021/0279556) – discloses training a DNN using an RPU and reference array, etc. Kim (US 10,832,773) and (US 2020/0117699) – disclose training a DNN using an RPU and reference array, etc. The examiner requests, in response to this Office action, that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 CFR 1.111(c). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GEORGE GIROUX whose telephone number is (571)272-9769. The examiner can normally be reached M-F 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Omar Fernandez Rivas can be reached at 571-272-2589. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GEORGE GIROUX/Primary Examiner, Art Unit 2128
Read full office action

Prosecution Timeline

Oct 20, 2022
Application Filed
Sep 28, 2025
Non-Final Rejection — §102, §DP
Dec 31, 2025
Response Filed
Mar 25, 2026
Final Rejection — §102, §DP (current)

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
93%
With Interview (+27.1%)
4y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 612 resolved cases by this examiner. Grant probability derived from career allow rate.

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