CTFR 18/051,734 CTFR 84401 DETAILED ACTION This Office Action has been issued in response to Applicant's Amendment filed March 11, 2026. Claims 1-2, 4-7, 9-18, 20-22, and 24-25 have been amended. Claims 1-25 have been examined and are pending. 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Arguments 07-37 AIA Applicant's arguments filed March 11, 2026 have been fully considered but they are not persuasive. Applicant’s amendment to overcome the rejection under 35 USC § 101 have been considered but do not overcome. The amended language should tie the algorithm and the steps more closely to each other. Steps such as “performing the algorithm on each of the individual smaller ciphertexts”, “combining the outputs”. These are merely exemplary and may not be supported by applicant’s specification. Applicant’s remaining arguments are moot in view of the new grounds of rejection . Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-25 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) a mathematical concept. This judicial exception is not integrated into a practical application because the invention does not use the result of the processing for any functional purpose. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The amended language discussing converting an algorithm still does not appear to meet the requirement of a functional purpose, the algorithm is not run and is currently more akin to an intended use for the other steps. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim s 1-25 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 2019/0370631 to Fais et al. (hereinafter “Fais”) and further in view of US Pub. No. 2023/0188317 to Choi et al. (hereinafter “Choi”) and further in view of US Pub. No. 2019/0317741 to Herr et al. (hereinafter “Herr”) . As to Claim 1, Fais discloses a system, comprising a processor set to: initiate processing of a tensor using a [homomorphic encryption (HE)] algorithm that has a [size constraint], the tensor corresponding to a large [ciphertext] that exceeds the [size constraint] (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) pack the tensor corresponding to a large [ciphertext] using a designated packing to generate a plurality of smaller ciphertexts (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) ; as part of the processing of the tensor using the [HE] algorithm, convert a [rotation] operation for performance on the large [ciphertext] to a converted [rotation] operation that is performed on the plurality of smaller [ciphertexts], wherein the converted [rotation] operation [simulates performance] of the [rotation] operation on the large [ciphertext] by computing a [rotation] using the plurality of smaller [ciphertexts], [which removes the size constraint] of the [HE] algorithm (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) . Fais does not explicitly disclose homomorphic encryption and ciphertext and rotation. However, Choi discloses this. Paragraph [0054] of Choi discloses Homomorphic encryption may be an encryption scheme configured to perform various operations on data that is encrypted. In homomorphic encryption, a result of an operation using ciphertexts may become a new ciphertext, and a plaintext obtained by decrypting the ciphertext may be the same as the operation result of the original data before encryption. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition. It would have been obvious to one of ordinary skill in the art before the effective filing of the invention to combine the tensor computation system as disclosed by Fais, with performing a rotation as disclosed by Choi. One of ordinary skill in the art would have been motivated to combine to apply a known technique to a known device. Fais and Choi are directed toward tensor computation system and as such it would be obvious to use the techniques of one in the other. Paragraph [0017] of Fais discloses when performing tensor mathematics. A rotation is understood to be a known mathematical function. Fais does not explicitly disclose size constraint and simulates performance and which removes the size constraint . However, Fais discloses the example convolution engine 118 (FIG. 1) walks the smaller tiles (e.g., processes the smaller tiles stored in the local memory 110 rather than attempting to process the tensor as a whole at one time) to more efficiently process the larger input tensor 106 stored in the system memory 114. Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. It would have been obvious to one of ordinary skill in the art before the effective filing of the invention to combine efficient computing system as disclosed by Fais, with adjusting an algorithm due to constraints as disclosed by Herr. One of ordinary skill in the art would have been motivated to combine to apply a known technique to a known device ready for improvement to yield predictable results. Fais and Herr are directed toward efficient computing systems and as such it would be obvious to use the techniques of one in the other. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. As to Claim 2, Fais-Choi-Herr discloses the system of claim 1, further comprising the processor to: store a smaller ciphertext rotation in a rotation cache and use the stored rotation from the rotation cache for an additional offset on the tensor instead of executing an additional rotation (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 3, Fais-Choi-Herr discloses the system of claim 1, wherein computing the rotation comprises moving a smaller ciphertext and rotating the moved ciphertext (Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 4, Fais-Choi-Herr discloses the system of claim 1. Fais-Choi-Herr does not explicitly disclose wherein the HE algorithm has a tile size constraint or a ciphertext size constraint, and simulating the rotation operations removes the tile size constraint or the ciphertext size constraint (Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm) . Examiner recites the same rationale to combine used for claim 1. As to Claim 5, Fais-Choi-Herr discloses the system of claim 1, further comprising the processor is to process rotations on the plurality of smaller ciphertexts in parallel (Paragraph [0017] of Fais discloses tiles can be processed in parallel to process the entire tensor faster) . As to Claim 6, Fais discloses a computer-implemented method, comprising: initiating, via a processor set, processing of a tensor using a homomorphic encryption (HE) algorithm that has a size constraint, the tensor corresponding to a large ciphertext that exceeds the size constraint (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) packing, via the processor set , a tensor corresponding to a large ciphertext using a designated packing to generate a plurality of smaller ciphertexts (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) ; as part of processing the tensor using the HE algorithm, converting, via the processor set, a rotation operation for performance on the large ciphertext to a converted rotation operation that is performed on the plurality of smaller ciphertexts, wherein the converted rotation operation simulates performance of the rotation operation on the large ciphertext by computing a rotation using the plurality of smaller ciphertexts, which removes the size constraint of the HE algorithm (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) Fais does not explicitly disclose homomorphic encryption and ciphertext and rotation. However, Choi discloses this. Paragraph [0054] of Choi discloses Homomorphic encryption may be an encryption scheme configured to perform various operations on data that is encrypted. In homomorphic encryption, a result of an operation using ciphertexts may become a new ciphertext, and a plaintext obtained by decrypting the ciphertext may be the same as the operation result of the original data before encryption. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition. Examiner recites the same rationale to combine used for claim 1. Fais does not explicitly disclose size constraint and simulates performance and which removes the size constraint . However, Fais discloses the example convolution engine 118 (FIG. 1) walks the smaller tiles (e.g., processes the smaller tiles stored in the local memory 110 rather than attempting to process the tensor as a whole at one time) to more efficiently process the larger input tensor 106 stored in the system memory 114. Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. Examiner recites the same rationale to combine used for claim 1. As to Claim 7, Fais-Choi-Herr discloses the computer-implemented method of claim 6, further comprising storing, via the processor set , a smaller ciphertext rotation in a rotation cache and using the stored rotation from the rotation cache for an additional offset on the tensor instead of executing an additional rotation (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 8, Fais-Choi-Herr discloses the computer-implemented method of claim 6, wherein computing the rotation comprises moving a smaller ciphertext and rotating the moved ciphertext (Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 9, Fais-Choi-Herr discloses the computer-implemented method of claim 6 wherein the algorithm has a tile size constraint or a ciphertext size constraint, and simulating the rotation operation removes the tile size constraint or the ciphertext size constraint (Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm) . Examiner recites the same rationale to combine used for claim 1. As to Claim 10, Fais-Choi-Herr discloses the computer-implemented method of claim 6, comprising processing, via the processor set, rotations on the smaller ciphertexts in parallel (Paragraph [0017] of Fais discloses tiles can be processed in parallel to process the entire tensor faster) . As to Claim 11, Fais discloses a computer program product for simulating rotation operations on large ciphertexts , the computer program product comprising a computer-readable storage medium having program code embodied therewith, the program code executable by a processor set to cause the processor set to: initiate processing of a tensor using a homomorphic encryption (HE) algorithm that has a size constraint, the tensor corresponding to a large ciphertext that exceeds the size constraint (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) pack the tensor corresponding to a large ciphertext using an interleaved packing to generate a plurality of smaller ciphertexts (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) ; as part of the processing of the tensor using the HE algorithm, convert a rotation operation for performance on the large ciphertext to a converted rotation operation that is performed on the plurality of smaller ciphertexts, wherein the converted rotation operation simulates performance of the rotation operation on the large ciphertext by computing a rotation using the plurality of smaller ciphertexts, which removes the size constraint of the HE algorithm (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) . Fais does not explicitly disclose homomorphic encryption and ciphertext and rotation. However, Choi discloses this. Paragraph [0054] of Choi discloses Homomorphic encryption may be an encryption scheme configured to perform various operations on data that is encrypted. In homomorphic encryption, a result of an operation using ciphertexts may become a new ciphertext, and a plaintext obtained by decrypting the ciphertext may be the same as the operation result of the original data before encryption. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition. Examiner recites the same rationale to combine used for claim 1. Fais does not explicitly disclose size constraint and simulates performance and which removes the size constraint . However, Fais discloses the example convolution engine 118 (FIG. 1) walks the smaller tiles (e.g., processes the smaller tiles stored in the local memory 110 rather than attempting to process the tensor as a whole at one time) to more efficiently process the larger input tensor 106 stored in the system memory 114. Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. Examiner recites the same rationale to combine used for claim 1. As to Claim 12, Fais-Choi-Herr discloses the computer program product of claim 11, further comprising program code executable by the processor set to store a smaller ciphertext rotation in a rotation cache and use the stored rotation from the rotation cache for an additional offset on the tensor instead of executing an additional rotation (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 13, Fais-Choi-Herr discloses the computer program product of claim 11, further comprising program code executable by the processor set to move a smaller ciphertext relative to another smaller ciphertext and rotate the moved ciphertext (Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 14, Fais-Choi-Herr discloses the computer program product of claim 11 wherein the HE algorithm has a tile size constraint or a ciphertext size constraint, and simulating the rotation operation removes the tile size constraint or the ciphertext size constraint (Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm) . Examiner recites the same rationale to combine used for claim 1. As to Claim 15, Fais-Choi-Herr discloses the computer program product of claim 11, further comprising program code executable by the processor set to process rotations on the smaller ciphertexts in parallel (Paragraph [0017] of Fais discloses tiles can be processed in parallel to process the entire tensor faster) . As to Claim 16, Fais discloses a system, comprising a processor set to: initiate processing of a multi-dimensional tensor using a homomorphic encryption (HE) algorithm that has a size constraint, the multi-dimensional tensor corresponding to a large ciphertext that exceeds the size constraint (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) pack the multi-dimensional tensor corresponding to the large ciphertext using a designated packing to generate a plurality of smaller multi-dimensional tiles (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) ; as part of the processing of the multi-dimensional tensor using the HE algorithm, convert a rotation operation for performance on the large ciphertext to a converted rotation operation that is performed on the plurality of smaller multi-dimensional tiles, wherein the converted rotation operation simulates performance of the rotation operation on the large ciphertext by computing a rotation using the plurality of smaller multi-dimensional tiles, which removes the size constraint of the HE algorithm (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) Fais does not explicitly disclose homomorphic encryption and ciphertext and rotation. However, Choi discloses this. Paragraph [0054] of Choi discloses Homomorphic encryption may be an encryption scheme configured to perform various operations on data that is encrypted. In homomorphic encryption, a result of an operation using ciphertexts may become a new ciphertext, and a plaintext obtained by decrypting the ciphertext may be the same as the operation result of the original data before encryption. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition. Examiner recites the same rationale to combine used for claim 1. Fais does not explicitly disclose size constraint and simulates performance and which removes the size constraint . However, Fais discloses the example convolution engine 118 (FIG. 1) walks the smaller tiles (e.g., processes the smaller tiles stored in the local memory 110 rather than attempting to process the tensor as a whole at one time) to more efficiently process the larger input tensor 106 stored in the system memory 114. Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. Examiner recites the same rationale to combine used for claim 1. As to Claim 17, Fais-Choi-Herr discloses the system of claim 16, wherein the processor set is to store a smaller multi-dimensional tile rotation in a rotation cache and use the stored rotation from the rotation cache for an additional offset on the multi-dimensional tensor instead of executing an additional rotation (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 18, Fais-Choi-Herr discloses the system of claim 16, wherein the processor set is to move a row of smaller multi-dimensional tiles relative to other rows of smaller multi-dimensional tiles, and rotate the moved row of smaller multi-dimensional tiles (Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 19, Fais-Choi-Herr discloses the system of claim 16 wherein the processor is to use the simulated rotation to convert an algorithm with a tile size constraint or a ciphertext size constraint into an algorithm without any tile size constraint or the ciphertext size constraint (Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm) . Examiner recites the same rationale to combine used for claim 1. As to Claim 20, Fais-Choi-Herr discloses the system of claim 16, wherein the processor set is to process rotations on the smaller multi-dimensional tiles in parallel (Paragraph [0017] of Fais discloses tiles can be processed in parallel to process the entire tensor faster) . As to Claim 21, Fais discloses a computer-implemented method, comprising: initiating, via a processor set, processing of a multi-dimensional tensor using a homomorphic encryption (HE) algorithm that has a size constraint, the multi-dimensional tensor corresponding to a large ciphertext that exceeds the size constraint (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) packing, via the processor set , the multi-dimensional tensor corresponding to the large ciphertext using a designated packing to generate a plurality of smaller multi-dimensional tiles (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) ; as part of the processing of the multi-dimensional tensor using the HE algorithm, convert a rotation operation for performance on the large ciphertext to a converted rotation operation that is performed on the plurality of smaller multi-dimensional tiles, wherein the converted rotation operation simulates performance of the rotation operation on the large ciphertext by computing a rotation using the plurality of smaller multi-dimensional tiles, which removes the size constraint of the HE algorithm (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor) Fais does not explicitly disclose homomorphic encryption and ciphertext and rotation. However, Choi discloses this. Paragraph [0054] of Choi discloses Homomorphic encryption may be an encryption scheme configured to perform various operations on data that is encrypted. In homomorphic encryption, a result of an operation using ciphertexts may become a new ciphertext, and a plaintext obtained by decrypting the ciphertext may be the same as the operation result of the original data before encryption. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition. Examiner recites the same rationale to combine used for claim 1. Fais does not explicitly disclose size constraint and simulates performance and which removes the size constraint . However, Fais discloses the example convolution engine 118 (FIG. 1) walks the smaller tiles (e.g., processes the smaller tiles stored in the local memory 110 rather than attempting to process the tensor as a whole at one time) to more efficiently process the larger input tensor 106 stored in the system memory 114. Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm. Examiner recites the same rationale to combine used for claim 1. As to Claim 22, Fais-Choi-Herr discloses the computer-implemented method of claim 21, comprising storing, via the processor, a smaller multi-dimensional tile rotation in a rotation cache and using the stored rotation from the rotation cache for an additional offset on the multi-dimensional tensor instead of executing an additional rotation (Paragraph [0017] of Fais discloses when performing tensor mathematics, a tensor can be partitioned into multiple smaller tiles, and the smaller tiles can be individually processed to achieve processing of the entire tensor. Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 23, Fais-Choi-Herr discloses the computer-implemented method of claim 21, wherein computing the rotation comprises moving a row of smaller multi-dimensional tiles relative to other rows of smaller multi-dimensional tiles, and rotating the moved row of smaller multi-dimensional tiles (Paragraph [0075] of Choi discloses The processor 200 may perform a rotation operation and addition on a result of the convolution operation. The processor 200 may generate a homomorphic encryption operation result by extracting a valid value from a result of the rotation operation and the addition) . As to Claim 24, Fais-Choi-Herr discloses the computer-implemented method of claim 21. Fais-Choi-Herr does not explicitly disclose wherein the HE algorithm has a tile size constraint or a ciphertext size constraint, and simulating the rotation operation removes the tile size constraint or the ciphertext size constraint (Paragraph [0021] of Herr discloses determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm. Paragraph [0034] of Herr discloses if the size of the input data and/or the size of the output data meets a threshold value (e.g., is greater than a threshold amount), the variant generator 202 determines that the algorithm is a candidate for partitioning. Paragraph [0164] of Herr discloses improve the efficiency of using a computing device by reducing the number of computational cycles needed to execute a workload and increasing the utilization of various heterogeneous processing elements to execute an algorithm) . Examiner recites the same rationale to combine used for claim 1. As to Claim 25, Fais-Choi-Herr discloses the computer-implemented method of claim 21, comprising processing, via the processor, rotations on the smaller multi-dimensional tiles in parallel (Paragraph [0017] of Fais discloses tiles can be processed in parallel to process the entire tensor faster) . Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin S Mai whose telephone number is (571)270-5001. The examiner can normally be reached Monday to Friday 9AM to 5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Philip Chea can be reached on 5712723951. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN S MAI/Primary Examiner, Art Unit 2499 Application/Control Number: 18/051,734 Page 2 Art Unit: 2499 Application/Control Number: 18/051,734 Page 3 Art Unit: 2499 Application/Control Number: 18/051,734 Page 4 Art Unit: 2499 Application/Control Number: 18/051,734 Page 5 Art Unit: 2499 Application/Control Number: 18/051,734 Page 6 Art Unit: 2499 Application/Control Number: 18/051,734 Page 8 Art Unit: 2499 Application/Control Number: 18/051,734 Page 9 Art Unit: 2499 Application/Control Number: 18/051,734 Page 10 Art Unit: 2499 Application/Control Number: 18/051,734 Page 11 Art Unit: 2499 Application/Control Number: 18/051,734 Page 12 Art Unit: 2499 Application/Control Number: 18/051,734 Page 13 Art Unit: 2499 Application/Control Number: 18/051,734 Page 14 Art Unit: 2499 Application/Control Number: 18/051,734 Page 15 Art Unit: 2499 Application/Control Number: 18/051,734 Page 16 Art Unit: 2499 Application/Control Number: 18/051,734 Page 18 Art Unit: 2499 Application/Control Number: 18/051,734 Page 19 Art Unit: 2499 Application/Control Number: 18/051,734 Page 20 Art Unit: 2499 Application/Control Number: 18/051,734 Page 21 Art Unit: 2499 Application/Control Number: 18/051,734 Page 22 Art Unit: 2499 Application/Control Number: 18/051,734 Page 23 Art Unit: 2499
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