Prosecution Insights
Last updated: April 19, 2026
Application No. 18/056,267

PRINTED CIRCUIT BOARDS INCLUDING STRUCTURES FOR SUPPRESSING RADIATION

Non-Final OA §102§103§112
Filed
Nov 17, 2022
Examiner
ROBINSON, KRYSTAL
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
80%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
652 granted / 756 resolved
+18.2% vs TC avg
Minimal -6% lift
Without
With
+-5.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
27 currently pending
Career history
783
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
47.8%
+7.8% vs TC avg
§102
33.6%
-6.4% vs TC avg
§112
10.4%
-29.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 756 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 3 is recites the limitation " guard ring structure " in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim 15 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The terms “the peripheral area is covered” is unclear as to what the peripheral are is covered with. The examiner will interpret the claim to mean “the peripheral area is covered with the shielding structure.” Claim Objections Claim 15 is objected to because of the following informalities: “a portion” in line 2 is duplicated. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5, 6-9, 14-16 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hara et al. (US 2004/0246187). In regards to claim 1, Hara et al. teaches a printed circuit board (figure 9B) comprising: a ground plane (1132); a power plane (1135) having a first main surface (bottom surface) and a second main surface (top surface) opposite to the first main surface (see figure 9B), wherein the second main surface faces (top surface) the ground plane (1132); and a shielding structure (1137; made of metal) partially covering the power plane (1135; figure 9B), the shielding structure (1137) comprising: a metal structure (metal part (1137)) covering (placed over) a peripheral area of the first main surface (bottom surface) from a direction facing the first main surface (bottom surface), and a plurality of vias (there are vias holes in each layer of the circuit board in figure 9B, in which the screw sets (1138) are inserted) electrically and mechanically coupling the metal structure (1137) to the ground plane (1132). In regards to claim 2, Hara et al. teaches the printed circuit board of claim of 1, wherein the plurality of vias (1138, see figure 9A) are arranged around (nearby) a periphery (toward the edge of) of the power plane (1135). In regards to claim 3, Hara et al. teaches the printed circuit board of claim 2, wherein the plurality of vias (1138) of the guard ring structure (see vias in a ring shape in figure 1c) extend vertically between the metal structure (1137) and the ground plane (1132). In regards to claim 4, Hara et al. teaches the printed circuit board of claim 2, wherein the plurality of vias (1138) are evenly spaced apart (symmetrical, figure 9A). In regards to claim 6, Hara et al. teaches the printed circuit board of claim 1, wherein the power plane (1135) extends substantially parallel to the ground plane (1132) and wherein the ground plane (1132) completely covers the second main surface of the power plane (1135) from a vertical direction facing in a direction towards the ground plane (1132)(figure 9B). In regards to claim 7, Hara et al. teaches the printed circuit board of claim 1, wherein the metal structure (1137) comprises a metal sheet (see flat folded sheet in figure 9B). In regards to claim 8, Hara et al. teaches the printed circuit board of claim 7, wherein the metal sheet covers (1137) the peripheral area of the first main surface from a direction facing the first main surface (see figure 9B). In regards to claim 9, Hara et al. teaches the printed circuit board of claim 7, wherein the metal sheet (1137) extends laterally and parallel to the power plane (1135)(see figure 9B). In regards to claim 14, Hara et al. teaches the printed circuit board of claim 1, wherein the shielding structure (1137) is capable to interrupt or at least partially block fringing fields and radiating fields produced by the power plane (1135). In regards to claim 15, Hara et al. teaches the printed circuit board of claim 1, wherein only a portion of the first main surface of the power plane (1135) corresponding to the peripheral area is covered with the shielding structure (1137) and wherein a remainder of the first main surface of the power plane (1135) is uncovered, from the direction facing the first main surface of the power plane (1135)(see figure 9B). In regards to claim 16, Hara et al. teaches a printed circuit board (figure 9B) comprising: a ground plane (1132); a power plane (1135) having a first main surface and a second main surface (top and bottom surface) opposite to the first main surface, wherein the second main surface faces the ground plane (1132); and an shielding structure (1137) that is electrically grounded (via set screws (1138) and configured to partially cover the power plane (1135), the shielding structure (1137) comprising: a metal structure (metal part (1137) covering (positioned over) at least a top corner of the power plane (1135) located at the first main surface (top surface). In regards to claim 20, Hara et al. teaches the printed circuit board of claim 16, wherein the shielding structure (1137) further comprises: a plurality of vias (1138) electrically and mechanically coupling the metal structure (1137) to the ground plane (1132) so as to electrically ground the shielding structure (1137). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hara et al. (US 2004/0246187) in view of Martinez et al. (US 2020/0214124). In regards to claim 5, Hara et al. teaches the printed circuit board of claim 1. Hara et al. does not explicitly teach one or more dielectric layers, wherein at least one of the one or more dielectric layers is arranged between the power plane and the ground plane. Martinez et al. teaches one or more dielectric layers (4), wherein at least one of the one or more dielectric layers (4) is arranged between the power plane (3) and the ground plane (2). It would have been obvious to one of ordinary skilled in the art at the time of the invention to have included between the power/ground planes a dielectric layer since it is well known in the art as a fundamental technique for improving performance, ensuring stability, and reducing interference. The insulating layer acts as a spacer that separates the two conductive copper layers to prevent direct short circuits while enabling a controlled, advantageous interaction between them. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hara et al. (US 2004/0246187). In regards to claim 10, Hara et al. teaches the printed circuit board of claim 7. Hara et al. does not explicitly teach the metal sheet comprises copper. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have made the shielding structure of a copper material to block electromagnetic interference and radio frequency interference; it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Allowable Subject Matter Claims 11-13 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wang (US 6,455,910) teaches a guard ring structure. Pinjabi (US 20200196448) teaches an integrated power delivery board for an integrated circuit. Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to KRYSTAL ROBINSON whose telephone number is (571)272-9258. The examiner can normally be reached on 9-5 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached on (571)-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KRYSTAL ROBINSON/Examiner, Art Unit 2848
Read full office action

Prosecution Timeline

Nov 17, 2022
Application Filed
Jun 01, 2023
Response after Non-Final Action
Jan 22, 2026
Non-Final Rejection — §102, §103, §112
Mar 27, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
80%
With Interview (-5.7%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 756 resolved cases by this examiner. Grant probability derived from career allow rate.

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