Prosecution Insights
Last updated: April 19, 2026
Application No. 18/058,484

NANOPORE CELL WITH SEAMLESS WORKING ELECTRODE AND METHODS OF FORMING THE SAME

Final Rejection §103
Filed
Nov 23, 2022
Examiner
GAMBLE JR, RANDALL LEE
Art Unit
1795
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Roche Sequencing Solutions Inc.
OA Round
2 (Final)
46%
Grant Probability
Moderate
3-4
OA Rounds
2y 5m
To Grant
68%
With Interview

Examiner Intelligence

Grants 46% of resolved cases
46%
Career Allow Rate
13 granted / 28 resolved
-18.6% vs TC avg
Strong +21% interview lift
Without
With
+21.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
33 currently pending
Career history
61
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
56.3%
+16.3% vs TC avg
§102
8.8%
-31.2% vs TC avg
§112
26.1%
-13.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 28 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Claims The Amendment filed August 19th, 2025 has been entered. Claims 14-27 have been previously withdrawn. Claims 1-13 are currently examined herein. Status of the Rejection All 35 U.S.C. § 103 rejections from the previous office action are maintained. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-2 and 4-13 are rejected under 35 U.S.C. 103 as being unpatentable over Cicero (2018/0266980 A1, provided in IDS submitted on 11/23/2022) in view of Foster (US 2018/0299400 A1). Regarding Claim 1, Cicero teaches a method for forming a nanopore cell (a process for constructing an electrochemical cell of a nanopore-based sequencing chip in Figs 13A-13G [para. 0108]), comprising: providing a device structure (device structure described in paras. 0108-0116) comprising: a conductive layer (conductive layer 1302 in Fig. 13A [para. 0110]) disposed on a top portion of a substrate (conductive layer 1302 is disposed in a top portion of the substrate, see Figure 13A [para. 0110]); and an interconnect dielectric layer (a dielectric layer 1303 in Fig. 13A [para. 0110]) overlying the conductive layer (as illustrated in Fig. 13A, dielectric layer 1703 overlays conductive layer 1302); removing a portion of the interconnect dielectric layer to form an electrode support surface (the layer of dielectric 1303 is etched to create an opening to expose a top surface of conductive layer 1302 [para. 0110]) comprising an exposed island of the conductive layer surrounded by a remaining portion of the interconnect dielectric layer (as illustrated in Figure 13A, an exposed island is created of conductive layer 1302, surrounded by dielectric 1303); depositing a porous electrode material on the electrode support surface to form a seamless porous electrode layer comprising columns of the porous electrode material (a porous electrode layer 1310 grown in columns is formed on the conductive layer 1302 in Fig. 13B [para. 0111]); depositing a protective layer (a sacrificial metal layer, such as Ti layer 1311, in Fig. 13C [para. 0112]) on the seamless porous electrode layer (sacrificial metal layer 1311 is deposited on top of the porous electrode layer 1310 [para. 0112]); patterning the seamless porous electrode layer and the protective layer to form a working electrode island (the sacrificial metal layer, such as Ti layer 1311, and the porous TiN electrode layer 1310 are patterned to form a patterned stacked layer 1312 in Fig. 13D [para. 0113]); depositing and patterning a hydrophobic cladding (dielectric layer 1314, such as polyamide, in Fig. 13E [para. 0114]; which is etched to create a cavity 1316 [para. 0115]) on the working electrode island to form the sidewalls of a well of the nanopore cell (dielectric layer 1314 is deposited on the stacked layer 1312 to form the sidewalls of the nanopore cell in Fig. 13E [para. 0114]); and removing at least a portion of the protective layer to expose the porous electrode layer to the well (the protective Ti layer 1311 is removed to expose a portion of the top surface area of porous TiN layer 1310 in Fig. 13G [para. 0116]), wherein the exposed porous electrode layer forms at least a portion of a bottom wall of the well of the nanopore cell (as illustrated in Figure 13G, the working electrode comprised of porous TiN 1310 forms at least a bottom portion of a bottom wall of the well). Cicero does not explicitly teach a planar electrode support surface. Foster teaches a nanopore-based sequencing device (abstract), and teaches forming a planar electrode (working electrodes in cell 500 in Fig. 5, cell 1000 in Fig. 10, and cell 1100 in Fig. 11 are planar electrodes located at the bottom of the nanopore wells [para. 0064]). Cicero and Foster are considered analogous art to the claimed invention because they are in the same field of methods of forming nanopore cells for sequencing. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the step of removing a portion of the interconnect dielectric layer to form an electrode support surface of Cicero to form a planar electrode, as taught by Foster, as the shape of the working electrode directly affects the current and capacitance of the working electrode (Foster, [paras. 0065-0066]). Note that in this case as the shape of the working electrodes in the nanopore wells of Foster are planar in shape, the substrate surface revealed via removing a portion of the interconnect dielectric layer can also be a planar electrode support surface to allow for the formation and shape of the planar working electrode. Regarding Claim 2, modified Cicero teaches the method of claim 1. Cicero teaches wherein the porous electrode material comprises porous TiN (titanium nitride) (the porous electrode 1310 can be TiN [para. 0111]). Regarding Claim 4, modified Cicero teaches the method of claim 1. Cicero teaches wherein removing a portion of the interconnect dielectric comprises blanket etching a portion of the interconnect dielectric (dielectric 1303 is etched to expose a top surface of conductive layer 1302 [para. 0110]). Regarding Claim 5, modified Cicero teaches the method of claim 1. Cicero teaches wherein the protective layer is comprised of a dielectric material (protective layer can be formed using a silicon oxide [para. 0098]). Regarding Claim 6, modified Cicero teaches the method of claim 1. Cicero teaches wherein the protective layer is comprised of silicon oxide (protective layer can be formed using a silicon oxide [para. 0098]). Regarding Claim 7, modified Cicero teaches the method of claim 1. Cicero teaches wherein the protective layer is comprised of a metal material (sacrificial layer 1311 can be a metal such as titanium [para. 0112]). Regarding Claim 8, modified Cicero teaches the method of claim 1. Cicero teaches wherein the protective layer is comprised of titanium (sacrificial layer 1311 can be a metal such as titanium [para. 0112]). Regarding Claim 9, modified Cicero teaches the method of claim 1. Cicero teaches wherein removing at least a portion of the protective layer to expose the porous electrode layer comprises applying removal reagents to the protective layer (sacrificial Ti layer 1311 is removed by a wet etching process using hydrofluoric acid to expose the top surface area of the porous electrode TiN layer 1310 [para. 0116]). Regarding Claim 10, modified Cicero teaches the method of claim 9. Cicero teaches wherein the removal reagents comprise hydrofluoric acid (removal reagent can be hydrofluoric acid [para. 0116]). Regarding Claim 11, modified Cicero teaches the method of claim 9. Cicero teaches wherein the removal reagents are applied using a wet etching process (sacrificial Ti layer 1311 may be etched by a wet etching process [para. 0116]). Regarding Claim 12, modified Cicero teaches the method of claim 9. Cicero teaches wherein the removal reagents are applied to the protective layer without damaging the interconnect dielectric layer (etching processing using reagents, such as hydrofluoric acid, does not damage the polyimide layer 1312, which is the dielectric layer [para. 0116]). Regarding Claim 13, modified Cicero teaches the method of claim 1. Cicero teaches wherein the seamless porous electrode layer and the protective layer are patterned using photolithography and dry etching (patterning of the sacrificial metal layer and the porous TiN electrode layer can be carried out using known lithography patterning process and etching process, such as reactive ion etching [para. 0113]). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Cicero and Foster, as applied to claim 1 above, and in further view of Wei (Label free electrochemiluminescence protocol for sensitive DNA detection with a tris(2,2’-bipyridyl)ruthenium(II) modified electrode based on nucleic acid oxidation. Electrochemistry Communications. 2007; 9, pages 1474-1479). Regarding Claim 3, modified Cicero teaches the method of claim 1. Cicero is silent on wherein the porous electrode material comprises a ruthenium containing material. Wei teaches an electrochemical sensor for detecting DNA (abstract), and teaches an electrode material comprises a ruthenium containing material (working electrode was coated with a carbon nanotube/Nafion/ruthenium(bpy)32+ composite film [first para. col. 1, page 1476]). It would be obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the porous electrode material deposited on the planar electrode support of modified Cicero to include a ruthenium containing material, as taught by Wei, as ruthenium based electrodes allow for sensitive detection of nucleic acids, such as DNA (Wei, [Conclusion, page 1479]). Response to Arguments Applicant’s arguments, see Remarks pgs. 1-4, filed 08/19/2025, with respect to the 35 U.S.C 103 rejections have been fully considered. Applicant’s Argument #1: Applicant traverses the 35 U.S.C 103 prior art rejection for Claim 1, stating that although the primary reference of Cicero does teach forming columns of porous electrode material, Cicero fails to teach forming “a seamless porous electrode layer”, as Figure 12B of Cicero shows seams (Figure 12B of Cicero, reproduced below with Applicant’s annotation of the seam from Arguments submitted 08/18/2025). PNG media_image1.png 521 767 media_image1.png Greyscale Figure 12B of Cicero, Seam Annotated by Applicant Applicant argues that the seam present in Annotated Fig. 12B is different from the instant application, which does not include seams, as illustrated in Figure 15 of the instant application, reproduced below: PNG media_image2.png 652 731 media_image2.png Greyscale Figure 15 of Instant Application Examiner’s Response #1: Applicant’s arguments have been fully considered, but are not persuasive. From the prior art rejection of claim 1 above, Cicero teaches all limitations except using a planar electrode support surface, which is taught by the secondary reference of Foster. As Cicero in view of Foster teaches the limitation “depositing a porous electrode material on the planar electrode support surface”, the limitation “to form a seamless electrode” is an intended result of a positively recited step. The court noted that a "‘whereby clause in a method claim is not given weight when it simply expresses the intended result of a process step positively recited.’" Id. (quoting Minton v. Nat’l Ass’n of Securities Dealers, Inc., 336 F.3d 1373, 1381, 67 USPQ2d 1614, 1620 (Fed. Cir. 2003)). In addition, the electrode layer TiN 1110 of Cicero is seamless as shown in Figure 12A (reproduced below). Cicero does not teach that seams form in the corners of the electrodes. PNG media_image3.png 428 650 media_image3.png Greyscale Figure 12A of Cicero Applicant’s Argument #2: Applicant argues that dependent claim 3 is allowable as the secondary reference of Wei does not cure the deficiencies of claim 1. Examiner’s Response #2: Applicant’s arguments have been fully considered, but are not persuasive as claim 1 remains rejected by Cicero in view of Foster. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RANDALL LEE GAMBLE JR whose telephone number is (703)756-5492. The examiner can normally be reached Mon - Fri 10:00-6:00 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Luan Van can be reached at (571) 272-8521. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.L.G./Examiner, Art Unit 1795 /LUAN V VAN/Supervisory Patent Examiner, Art Unit 1795
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Prosecution Timeline

Nov 23, 2022
Application Filed
May 15, 2025
Non-Final Rejection — §103
Aug 19, 2025
Response Filed
Oct 07, 2025
Final Rejection — §103
Apr 10, 2026
Request for Continued Examination
Apr 13, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
46%
Grant Probability
68%
With Interview (+21.1%)
2y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 28 resolved cases by this examiner. Grant probability derived from career allow rate.

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