DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Germany on 05/29/20. It is noted, however, that applicant has not filed a certified copy of the DE 102020206790.2 application as required by 37 CFR 1.55.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
Switchable element, first recited in claim 1, with claim interpretation under 35 USC 112f being applied to claims 1-3, and 5-20. In review of the disclosure, the switchable element is being interpreted to comprise a memristor, comprising yttrium manganese oxide, bismuth ferrite, bismuth ferrite doped with titanium or equivalent including input and output connections, as in claim 4, specification p. 7.
Current conformity unit as in claim 15.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the claim 9 limitation wherein the second threshold voltage is different from the first threshold voltage must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The abstract of the disclosure is objected to because is longer than 150 words in length. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).I.C.
Furthermore, the specification p. 6, description with respect to figure 4 appears to have a typographical error stating “a true random number generator which can be used for as a cryptographic key”.
The specification is objected to because claim element “current conformity unit” claim 21 invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the specification fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. See rejection under 35 USC 112(b) below as to the specific elements of the claimed means that are lacking and thus not described in the specification. No new matter should be entered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 19, and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 8 of U.S. Patent No.12438104. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 8 of US Patent No. 12438104 would anticipate claim 1 of 18059530 and be obvious over claims 19-20 of 18059530. See representative claim mapping below.
Application 18059530
Patent 12438104
1. An apparatus for generating a sequence of random numbers, the apparatus comprising:
1. (Original) Apparatus for generating a binary numerical sequence, the apparatus comprising: (the binary sequence is random based on the random voltages in the body of the claim)
a switchable element switchable to a first state by applying a first bias voltage, and switchable to a second state by applying a second bias voltage different from the first bias voltage;
two or more memristors, wherein the apparatus is configured to apply a first write voltage or a second write voltage, different from the first write voltage, as a write voltage to each of the two or more memristors, and/or to apply a first read voltage or a second read voltage, different from the first read voltage, as a read voltage to each of the two or more memristors,
wherein the switchable element is configured, when switched to the first state by the first bias voltage, to output a first output voltage comprising a first random or pseudorandom voltage value from a first range of voltage values and wherein the switchable element is configured, when switched to the second state by the second bias voltage, to output a second output voltage comprising a second random or pseudorandom voltage value from a second range of voltage values; and
wherein each memristor of the two or more memristors is configured to output, in dependence on the write voltage applied to the memristor and/or in dependence on the read voltage applied to the memristor, an output voltage with a first random or pseudo-random voltage value from a first voltage value range or with a second random or pseudo-random voltage value from a second voltage value range;
a comparator configured to output, if the first output voltage from the first range of values is smaller than or equal to a first threshold voltage, a first numerical value; and output, if the first output voltage from the first range of values is greater than the first threshold voltage, a second numerical value different from the first numerical value;
and one or more comparators, wherein each of the one or more comparators is assigned to precisely one of the two or more memristors; wherein each comparator of the one or more comparators is configured to output a binary output value in dependence on a comparison between the output voltage of the one of the two or more memristors having assigned thereto the comparator and a threshold voltage, and wherein the apparatus is configured to generate the binary numerical sequence in dependence on the binary output value of each of the one or more comparators, wherein each comparator of the one or more comparators is configured to perform the comparison between the output voltage of the one of the two or more memristors being assigned to the comparator and the same threshold voltage, wherein each of the one or more comparators is configured to use as the threshold voltage the output voltage of one of the two or more memristors.
wherein the comparator is configured, if the second output voltage from the second range of value is smaller than or equal to a second threshold voltage, to output the first numerical value, and if the second output voltage from the second range of values is greater than the second threshold voltage, to output the second numerical value; or if the second output voltage from the second range of values is smaller than or equal to a second threshold voltage, to output the second numerical value, and if the second output voltage from the second range of values is greater than the second threshold voltage, to output the first numerical value.
8. (Original) Apparatus according to claim 1 wherein each of the one or more comparators is configured to output a first binary value as the binary output value if the first output voltage from the first value range is smaller than or equal to the threshold voltage; and to output a second binary value, different from the first binary value, as the binary output value if the first output voltage from the first value range is larger than the threshold voltage.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 15 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim limitation “current conformity unit” recited in claim 15 invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. See rejection under 35 USC 112(b) below as to the specific reasons these elements are lacking structure, material, or acts for performing the entire claimed function that result in this associated rejection for lack of written description of these required elements.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 lines 17-24 recite two clauses modified by the term “or”. It is not clear whether, in this apparatus claim the comparator is configured for both alternatives selectively, or whether the comparator is configured for one alternative only. For purposes of examination, Examiner interprets that the comparator is configured for one of the alternatives only. Claims 2-18 inherit the same deficiency based on dependence. Claims 19 and 20 executing methods are being interpreted as only one alternative is required by the claim.
Claim 1 further recites a first threshold voltage and a second threshold voltage. It is unclear whether the first and second threshold voltages are the same or different. For purposes of examination, Examiner interprets as the same. Claims 2-18 inherit the same deficiency based on dependence. Claims 19 and 20 each recite substantially the same limitation and are rejected for the same reason.
Claim 10 lines 2-9, and claim 11 lines 2-6 each recite two clauses modified by the term “and/or”. It is not clear whether, in this apparatus claim the first and second threshold voltages is configured for both alternatives selectively, or whether the comparator is configured for one alternative only. Furthermore it is not clear if the “and” is required based on inclusion of “or”. For purposes of examination, Examiner interprets that the first and second threshold voltages are limited by one of the alternatives only. Claim 11 inherits the same deficiency based on dependence.
Claim 17 lines 17-24 recite three clauses modified by the term “and/or”. It is not clear whether, in this apparatus claim the plurality of memristors are each configured for all alternatives selectively, or whether the plurality of memristors are each configured for one alternative only. For purposes of examination, Examiner interprets that the plurality of memristors are each configured for one of the alternatives only.
Claim 15 limitation “current conformity unit” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function.
The specification provides no written description a mere restatement of the unit and function performed, and the drawings merely disclose the current conformity unit as a black box. See figure 4, specification p. 9.
Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, 10-14, and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 20140268994 A1 Rose et al., (hereinafter “Rose”).
Regarding claim 1, Rose teaches the following:
a switchable element switchable to a first state by applying a first bias voltage, and switchable to a second state by applying a second bias voltage different from the first bias voltage (fig 1 100 memristor, for switchable element, [0048], [0037] for switchable to a first state by applying first bias voltage, and switchable to a second state by applying a second bias voltage different from the first bias voltage);
wherein the switchable element is configured, when switched to the first state by the first bias voltage, to output a first output voltage comprising a first random or pseudorandom voltage value from a first range of voltage values and wherein the switchable element is configured, when switched to the second state by the second bias voltage, to output a second output voltage comprising a second random or pseudorandom voltage value from a second range of voltage values ([0050] control signals are inputs and are manipulated to keep the memristors on the verge of state change, [0052], set, reset for switching to first and second state by above cited bias voltages [0053] random output of the memristive cell, fig 5 output voltage shown); and
a comparator configured to output, if the first output voltage from the first range of values is smaller than or equal to a first threshold voltage, a first numerical value; and output, if the first output voltage from the first range of values is greater than the first threshold voltage, a second numerical value different from the first numerical value (fig 1 110 comparator, [0046] Vth for threshold voltage);
wherein the comparator is configured,
if the second output voltage from the second range of value is smaller than or equal to a second threshold voltage, to output the first numerical value, and if the second output voltage from the second range of values is greater than the second threshold voltage, to output the second numerical value ([0046]); or
if the second output voltage from the second range of values is smaller than or equal to a second threshold voltage, to output the second numerical value, and if the second output voltage from the second range of values is greater than the second threshold voltage, to output the first numerical value ([0046]).
Regarding claim 4, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the switchable element is a memristor (fig 1 100 memristor, for switchable element, [0048]).
Regarding claim 10, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the first threshold voltage is defined such that a statistical probability that the first output voltage comprising the first random or pseudorandom voltage value is greater than the first threshold voltage comprises a value between 45% and 55% ([0044] 50% between 45% and 55%, with [0034] 2% variation), and/or
wherein the second threshold voltage is defined such that a statistical probability that the second output voltage comprising the second random or pseudorandom voltage value is greater than the second threshold voltage comprises a value between 45% and 55% ([0044] 50% between 45% and 55%, with [0034] 2% variation).
Regarding claim 11, in addition to the teachings addressed in the claim 10 analysis, Rose teaches the following:
wherein the first threshold voltage is set such that the statistical probability that the first output voltage comprising the first random or pseudorandom voltage value is greater than the first threshold voltage is 50% ([0044] set to 50%), and/or
wherein the second threshold voltage is set such that the statistical probability that the second output voltage comprising the second random or pseudorandom voltage value is greater than the first threshold voltage is 50% ([0044] set to 50%).
Regarding claim 12, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the sequence of random numbers is a binary sequence of random numbers ([0052-0053]),
wherein an output of the first numerical value or the second numerical value from the comparator corresponds to exactly one random number of the binary sequence of random numbers ([0052-0053]).
Regarding claim 13, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the apparatus is configured to form a random number of the sequence of random numbers using several numerical values output from the comparator (abstract [0004], fig 1, [0053], apparatus of figure 1 as configured in figure 6 [0057]).
Regarding claim 14, in addition to the teachings addressed in the claim 13 analysis, Rose teaches the following:
wherein the apparatus is configured to form said random number of the sequence of random numbers using said several numerical values output from the comparator by having each of said several numerical values form exactly one binary digit of said random number of the sequence of random numbers in binary notation (abstract [0004], fig 1, [0053], apparatus of claim 1 as configured in figure 6).
Regarding claim 16, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the apparatus comprises two or more memristors (the apparatus of claim 1 as configured in figure 6, [0057]).
Regarding claim 17, in addition to the teachings addressed in the claim 16 analysis, Rose teaches the following:
wherein the plurality of memristors are arranged in series, and/or
wherein the plurality of memristors are arranged in parallel in a line array, and/or
wherein the plurality of memristors are arranged in a crossbar array (fig 6).
Regarding claim 18, in addition to the teachings addressed in the claim 1 analysis, Rose teaches the following:
wherein the switchable element is a first switchable element (fig 1 100),
wherein the comparator is a first comparator (fig 1 110), and
wherein the apparatus further comprises a further switchable element and a further comparator to generate random numbers of the sequence of random numbers (fig 6 further 100 and comparators configured in as in claim 1).
Claim 19 is directed to a method that would be practiced by the apparatus of claim 1. All steps recited in the method of claim 19 are practiced by the apparatus of claim 1 as configured. The claim 1 analysis applies equally to claim 19.
Claim 20 is directed to a non-transitory digital storage medium having stored thereon a computer program for performing the method as in claim 19. All steps recited in the method of claim 19 are practiced by claim 20. The claim 19 analysis applies equally to claim 20.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Rose in view of A. Bogusz et al., Bipolar resistive switching in YMnO3/Nb: SrTiO3 pn-heterojunction, Nanotechnology 27, IOP Publishing, 2016 (hereinafter “Bogusz”).
Regarding claim 5, Rose teaches the claim 1 limitations. Rose discloses the switchable element as a memristor comprising TiO based, not explicitly disclosing the switchable element comprising yttrium manganese oxide. However, in the same field of endeavor Bogusz discloses using yttrium manganese oxide in a resistive switching device employed in resistive random access memory (RRAM) (abstract, Introduction). It would have t would have been obvious to one of ordinary skill in the art before the effective filing date to substitute Bogusz’ yttrium manganese oxide RRAM for the TiO RRAM of Rose. It would have been obvious to achieve the benefit of low operating voltages for off/on resistive switching (Conclusion).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Rose in view of JP 2015220445 A Akiji et al. (hereinafter “Akiji”).
Regarding claim 6, Rose teaches the claim 1 limitations. Rose discloses the switchable element as a memristor comprising TiO based, not explicitly disclosing the switchable element comprising a bismuth ferrite and/or titanium-doped bismuth ferrite. However, in the same field of endeavor Akiji discloses a resistance change memory, wherein the resistance change memory comprises bismuth ferrite (abstract, background art of translation). It would have been obvious to one of ordinary skill in the art before the effective filing date to substitute Akiji’s bismuth ferrite for the TiO of Rose. It would have been obvious to achieve the benefit of increased stability of the resistive change of the memristor of Rose (abstract, background art of Akiji translation).
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Rose in view of US 20210357185 A1 Cagli (hereinafter “Cagli”).
Regarding claim 7 and claim 8 Rose teaches the claim 1 limitations. Rose is silent with respect to absolute values of the first and second range of voltage values. However, in the same field of endeavor Cagli discloses an apparatus similar to Rose comprising using resistive RAM memory as a noise source for random number generation in cooperation with a comparator with a threshold value for comparison ([0005], [0014-0015], [0038-0042], fig 4). Cagli further discloses setting the reference voltage very low with respect to the supply voltage, such as .1 volt ([0056]), which would result in the largest absolute value of the first range of voltage values being at least twice, and at least four times as large as the absolute value of the second range of voltage values. It would have been obvious to one of ordinary skill in the art before the effective filing date to set the reference voltage according to Cagli to achieve the benefit of a larger number of voltage pulses being detected and the flow rate of the sequence of bits to be more substantial ([0057]).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Rose in view of T. Ahmed et al., Inducing tunable switching behavior in a single memristor, Applied Materials Today, 11, 280-290, 2018 (hereinafter “Ahmed”).
Regarding claim 15, Rose teaches the claim 1 limitations. Rose is silent with respect to a current conformity unit which applies a predefined input current to the switchable element when the first bias voltage is applied. However, in the same field of endeavor Ahmed discloses a current compliance applied during the initial electroforming (abstract, 3.2). It would have been obvious to one of ordinary skill in the art before the effective filing date to apply Ahmed’s current compliance to Rose in order for the achieve a current conformity unit which applies a predefined input current to the switchable element when the first bias voltage is applied. It would have been obvious to achieve the benefit of opening new pathways for ultra-dense resistive memory architectures including non-conventional computation (conclusion).
Allowable Subject Matter
Claims 2-3, and 9 would be allowable if rewritten to overcome the rejections under 35 USC 112(b) and rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter. Applicant claims apparatus for generating a sequence of random numbers, the apparatus comprising a switchable element and a comparator configured as in claim 1.
The apparatus as in claim 2 further limits to the comparator of claim 1 configured to output, in a first output step, the first numerical value or the second numerical value as a first output value, wherein the apparatus is configured to apply either the first bias voltage or the second bias voltage to the switchable element depending on whether the comparator outputs the first numerical value or the second numerical value, wherein the switchable element is configured to output a further output voltage comprising a random or pseudo-random voltage value, depending on whether the first bias voltage or the second bias voltage has been applied, from the first range of voltage values or from the second range of voltage values, and wherein the comparator is configured to output, in a second output step, as a second output value, the first numerical value or the second numerical value depending on the further output voltage.
The primary reason for indication of allowable subject matter as to claim 2 includes the limitations in combination with the remaining limitations wherein the application of the first or second bias voltage to the switchable element depends on whether the comparator outputs the first numerical value or the second numerical value as claimed.
Rose is the closest prior art found. Rose teaches the claimed invention according to the above claim mappings. Rose is silent with respect to a dependency between the comparator output and application of a bias voltage. Therefore Rose does not teach or suggest the above highlighted limitations of claim 2.
Cagli discloses a random number generator circuit comprising a noise source comprising a memristor and a comparator (fig 4, [0005]). Cagli is silent with respect to a dependency between the comparator output and application of a bias voltage. Therefore Cagli does not teach or suggest the above highlighted limitations of claim 2.
The apparatus as in claim 9 further limits the comparator of claim 1 wherein the second threshold voltage is different from the first threshold voltage.
Rose teaches the claimed invention according to the above claim mappings. Rose is silent with respect to different threshold voltages. Therefore Rose does not teach or suggest the above highlighted limitations of claim 9 in combination with the remaining limitations.
Cagli discloses a random number generator circuit comprising a noise source comprising a memristor and a comparator (fig 4, [0005]). Cagli further discloses setting a threshold voltage, but is silent with respect to first and second threshold voltages that are different. Therefore Cagli does not teach or suggest the above highlighted limitations of claim 9 in combination with the remaining limitations.
Conclusion
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/EMILY E LAROCQUE/Examiner, Art Unit 2182
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