CTNF 18/059,923 CTNF 85336 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. DETAILED ACTION Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim s 1 – 3, 7, and 9 – 12 are rejected under 35 U.S.C. 103 as being unpatentable over “Glass Substrate With Integrated Waveguides for Surface Mount Photonic Packaging” by Brusberg et al, JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 39, NO. 4, pp. 912 - 919, 2021 (hereinafter Brusberg) in view of Lim et al (US 2020/0310052 A1) . Regarding claim 1 , Brusberg describes (Fig. 1; Sections I and II) an apparatus, comprising: an integrated circuit (IC) die (ASIC), a photonic integrated circuit (PIC) die (a pair of PICs in Fig. 1) coupled to optical interconnects (comprising PIC waveguides); a substrate layer (in yellow) comprising one or more redistribution layers (RDLs) patterned on electrical contacts of the IC die and the PIC die; a glass layer (glass packaging substrate in blue color) having an upper surface and a lower surface, the upper surface including a cavity (as seen in Fig. 1), the cavity having therein a plurality of through-glass vias (TGVs) extending substantially perpendicularly to the lower surface (as seen in Fig. 1; 2 nd para. of Section V); and the IC die and the PIC die attached (by solder bumps and the RDL) to the glass layer such that the substrate layer is located in the cavity and the second portion of the optical interconnects (PIC waveguides) are flush with the upper surface of the glass layer (for optical coupling with IOX glass waveguides). While Brusberg does not expressly teach that the IC die and the PIC die can be immersed in, and encapsulated by, a mold structure , Lim discloses (Fig. 6B; Abstract; para. 0121 – 0128) a module 600 that has structural features similar to those in the upper module in Fig. 1 of Brusberg and comprises an IC die 620a,602b and a PIC die 606 that are immersed in, and encapsulated by, a mold structure 608 (para. 0124). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the IC die and the PIC die in Brusberg can be immersed in, and encapsulated by, a mold structure in order to have protection against environmental factors, such as moisture, oxidization, contamination, etc (para. 0073 and 0121). The Brusberg – Lim combination considers an apparatus comprising: a mold structure comprising a face having a first (central) portion with electrical contacts for an IC die and a PIC die (as evident from Fig. 1 of Brusberg and Fig. 6B of Lim), and a (peripheral) second portion comprising optical interconnects (between the PIC waveguides and IOX glass waveguides); a substrate layer comprising one or more redistribution layers (RDLs) patterned on the electrical contacts on the first (central) portion (according to Fig. 1 of Brusberg and Fig. 6B of Lim); a glass layer (glass packaging substrate) having an upper surface and a lower surface, the upper surface including a cavity, the cavity having therein a plurality of through-glass vias (TGVs) extending substantially perpendicularly to the lower surface; and the mold structure attached to the glass layer (by solder bumps and the RDL) such that the substrate layer is located in the cavity and the second portion of the mold structure is flush with the upper surface of the glass layer (for optical coupling between the PIC waveguides and IOX glass waveguides). In light of the foregoing analysis, the Brusberg – Lim combination teaches expressly or renders obvious all of the recited limitations. Regarding claim 2 , Brusberg describes (Fig. 1) the substrate layer comprises one or more vias, and illustrates a well-known fact that vias can have tapered walls (Fig. 15 shows that TGVs formed by etching the (relatively thick) glass layer from both sides (top and bottom) thereof). Hence, the Brusberg – Lim combination renders obvious that the one or more vias of the substrate layer can also have walls that taper outward traveling axially away from the first portion if the vias are formed by etching the (relatively thin) substrate layer only from its bottom side. Regarding claim 3 , the Brusberg – Lim combination considers that the one or more RDLs provide local electrical communication between the IC and the PIC ( “Dice 620 b , 620 c may be electrically connected to PIC die 606, and die 620 a may be connected to dice 620 b , 620 c ” at para. 0123 ). Regarding claim 7 , the Brusberg – Lim combination considers that the apparatus further comprises a waveguide (IOX glass waveguides in Figs. 1 and 7 of Brusberg) in the glass layer to provide optical communication through the glass layer (Section II). Regarding claim 9 , Brusberg describes (Fig. 8; Section III) that the apparatus further comprises a fiber array unit (FAU) (an MT-16 ferrule with optical fibers) attached to the glass layer and in optical communication with the PIC via a terminus of a waveguide (at least one of a PIC waveguide and an IOX glass waveguide). Regarding claims 10 and 11 , Brusberg describes (Fig. 1) that the substrate layer comprises a first one or more RDLs, and the apparatus further comprises a second (bottom) one or more RDLs located on the lower surface of the glass layer (glass packaging substrate) and an arrangement of solder bumps located on the second (bottom) one or more RDLs located on the lower surface of the glass layer. Regarding claim 12 , Brusberg illustrates (Fig. 1) a substrate package that comprises the described apparatus, and further comprises a printed circuit board (PCB) (connected to the solder bumps located on the second (bottom) one or more RDLs located on the lower surface of the glass layer) . 07-21-aia AIA Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Brusberg in view of Lim, and further in view of Liu et al (US 2015/0214074 A1) . Regarding claim 4 , Brusberg illustrates (Fig. 1) that the solder bumps of the PIC are immersed in, and surrounded by, a material (in light blue color), but does not detail it. However, Liu discloses (Fig. 6; Abstract; para. 0017 – 0031) an IC die 106 and disposed/mounted in a cavity 100 by being coupled to solder bumps 108 such that the solder bumps 108 are immersed in, and surrounded by, a material 104 that is cured and (additionally) bonds the IC die 106 in the cavity. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the solder bumps of the PIC are immersed, in accordance with the teachings of Liu, in a bond film/material. The motivation is that temperature-induced warpage can be reduced (para. 0016 and 0048 of Liu) which would ensure stable optical coupling between the PIC waveguides and the IOX glass waveguides. The Brusberg – Lim combination – Liu combination considers a bond film located in between the cavity (its vertical sidewalls) and the substrate layer (with the top RDLs), as seen in Fig. 1 of Brusberg . 07-21-aia AIA Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Brusberg in view of Lim, and further in view of Taha et al (US 2023/0084003 A1) . Regarding claim 8 , while the Brusberg – Lim combination does not detail components of the glass layer/substrate other than its waveguides (IOX glass waveguides), Taha discloses (Fig. 34B; para. 0240 – 0242) a substrate/spacer comprising both an optical waveguide 3486 and mirrors 3412B. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the glass layer/substrate in Brusberg can additionally comprise, in accordance with the teachings of Taha, a mirror and/or other suitable optical components in order to provide/enhance optical coupling and/or optical routing (para. 0242 and 0244 of Taha) . 07-21-aia AIA Claim s 13 – 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Brusberg in view of Lim, in view of Liu, and further in view of Hatakeyama et al (US 2016/0154312 A1) . Regarding claim 13 , the teachings of Brusberg, Lim, and Liu combine (see the arguments and motivation for combining, as provided above for claims 1 and 4) to consider a method, comprising: fabricating a mold structure (according to Lim) comprising a face having a first (central) portion with electrical contacts for an integrated circuit (IC) die and a photonic integrated circuit (PIC) die, and a second (peripheral) portion comprising optical interconnects for the PIC (as detailed above for claim 1); patterning one or more redistribution layers (RDLs) on the electrical contacts on the first (central) portion; overlaying the one or more RDLs with a bond film (a film/material covering solder bonds, according to Liu); and removing the bond film over the second (peripheral) portion (in order to expose the PIC waveguides for optical coupling with the IOX glass waveguides). The Brusberg – Lim combination – Liu combination considers the use of photolithography (para. 0002 of Liu) which commonly uses polymer materials/photoresists for layer patterning, but does not further detail such processes. However, Hatakeyama discloses (Figs. 1A – 1F; Abstract; para. 0022 – 0025 and 0084 – 0093) a photolithographic process for layer patterning that uses a photoresist pattern 30a, a thermal decomposable polymer layer 60 formed on the photoresist pattern 30a and removed/decomposed by thermal treatment (Figs. 1D and 1F), and a metal etch stop (para. 0091). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the photolithographic step of the method of the Brusberg – Lim – Liu combination, when applied to forming/depositing/locating and subsequently removing a protective mask on the second (peripheral) portion, can include such steps as: locating a thermal decomposable polymer layer on the second portion; and locating a metal etch stop over the second portion. The benefits of a thermal decomposable polymer layer and a metal etch stop include prevention of pattern collapse (Abstract of Hatakeyama) and improved control over an etched depth, respectively. In light of the foregoing analysis, the Brusberg – Lim – Liu – Hatakeyama (BLLH) combination teaches expressly or renders obvious all of the recited limitations. As an aside and relevant comment , it is also noted that the order of recited processing steps is non-limiting. Regarding claims 14 – 16 , the BLLH combination teaches expressly or renders obvious all of the recited limitations, as detailed above for claims 2, 1, and 4, respectively. Regarding claim 18 , the BLLH combination renders obvious that the bond film (according to Liu) may have a lower thickness than the height of the solder bumps immersed in it, in which case there is an air gap between the one or more RDLs and a wall of the cavity, above the bond film . Allowable Subject Matter The subject matter pertaining to claims 5, 17, and 19 would be allowable, if Applicant rewrites them in independent form including all of the limitations of the base claims and any intervening claims. The reason for indicating allowable subject matter for claims 5 and 17 is that none of the prior art of record, taken alone or in combination, teaches expressly or renders obvious a bond film extending upward around a periphery of the substrate layer to a height greater than a thickness of the bond film. The bond film of the Brusberg – Lim combination – Liu combination does not extend around a periphery of the substrate layer. The reason for indicating allowable subject matter for claim 19 is that none of the prior art of record, taken alone or in combination, teaches expressly or renders obvious a step of etching the bond film from TGV openings. The bond film of the BLLH combination is not etched from TGV openings. Claims 6 and 20 would be allowable by virtue of their dependence on claims 5 and 19 respectively. Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2021/0104637 A1 Figs. 2, 15, 16 US 2017/0254968 A1 Fig. 5 US 2015/0061126 A1 Figs. 1,2 US 2023/0384543 A1 Figs. 1,6 Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT TAVLYKAEV whose telephone number is (571)270-5634. The examiner can normally be reached 10:00 am - 6:00 pm, Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached on (571)272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERT TAVLYKAEV/Primary Examiner, Art Unit 2896 Application/Control Number: 18/059,923 Page 2 Art Unit: 2896 Application/Control Number: 18/059,923 Page 3 Art Unit: 2896 Application/Control Number: 18/059,923 Page 4 Art Unit: 2896 Application/Control Number: 18/059,923 Page 5 Art Unit: 2896 Application/Control Number: 18/059,923 Page 6 Art Unit: 2896 Application/Control Number: 18/059,923 Page 7 Art Unit: 2896 Application/Control Number: 18/059,923 Page 8 Art Unit: 2896 Application/Control Number: 18/059,923 Page 9 Art Unit: 2896 Application/Control Number: 18/059,923 Page 10 Art Unit: 2896 Application/Control Number: 18/059,923 Page 11 Art Unit: 2896
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