DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-23 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-9, 12-25 of copending Application No. 17/936,861 in view of Bulygin in view of Durham. Although the claims at issue are not identical, they are not patentably distinct from each other as described below.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
As per claim 1, the pending application 17/936,861 claims
An apparatus for monitoring a processing device from a trusted domain, the apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions to:
obtain information on a failure report related to a component of the processing device, with a possible failure having occurred at runtime of the processing device; (claim 1, An apparatus for configuring a processing device, the apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions to: obtain information on a failure related to a component of the processing device, with the failure having occurred at runtime of the processing device)
The pending application 17/936,861 does not expressly claim
receive a request for monitoring the processing device from the trusted domain;
authenticate the request;
provide the information on the failure report in the trusted domain.
However, Bulygin teaches
receive a request for monitoring the processing device ([0026] a user may request an on-demand scan of the host device)
provide the information on the failure report ([0017] collected information is delivered from the local agent back to the cloud-hosted service)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of pending application 17/936,861 with that of Bulygin because by enabling access to the vulnerabilities in the hardware and firmware layer of the devices, the hardware and firmware manufacturers and distributors can better monitor for attacks at the hardware/firmware level (Bulygin, [0003]).
Furthermore, Durham teaches
the trusted domain; ([0013] the private key identifies the client as a trusted device in the network)
authenticate the request; ([0013] shared cryptographic key is provisioned to multiple devices in a secure communication)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of pending application 17/936,861 in view of Bulygin with that of Durham because by authenticating the request in this manner, the result of the combination has a predictable outcome of ensuring that devices can communicate securely (Durham, [0013]).
As per claim 2, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus of claim 1, wherein the machine-readable instructions further comprise (claim 1, an apparatus…, the apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine readable instructions)
instructions to determine information on a microcode update to be applied to the processing device to remedy a failure related to the component, (claim 1, determine information on a microcode update to be applied to the processing device to remedy the failure related to the component)
and to configure the processing device to apply the microcode update (claim 1, configure the processing device to apply the microcode update)
As per claim 3, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the machine-readable instructions further comprise instructions to decode the request (Durham, [0013] decrypt secure data for communication over network with server).
As per claim 4, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the machine-readable instructions further comprise instructions to forward information on the request to a secure arbitration module for processing the request based on microcode related to the request (Durham, [0038] embedded controller agent may be coupled with embedded firmware agent. Embedded controller agent and embedded firmware agent may be configured to provide manageability and/or security functionality to the system in a secure and convenient manner. The “secure arbitration module” is interpreted as any module that contains security elements that is used to dispute transactions. In this case the embedded security elements would dispute whether the request is authenticated or not before proceeding. If the Applicant wishes to narrow the scope of this claim language, they can do so by bringing in details the Specification such as from page 17 line 9-26)
As per claim 5, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 4, wherein the machine-readable instructions further comprise instructions to receive information on the failure report (Bulygin, [0028] receives information from a host device) from the secure arbitration module. (Durham, [0038] embedded controller agent may be coupled with embedded firmware agent. Embedded controller agent and embedded firmware agent may be configured to provide manageability and/or security functionality to the system in a secure and convenient manner)
As per claim 6, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the information on the failure report related to the component comprises information on a circuit-level failure affecting the component (claim 2, The apparatus according to claim 1, wherein the information on the failure related to the component comprise information on a circuit-level failure affecting the component)
As per claim 7, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the information on the failure report related to the component is based on a failure related to the component occurring in the field (claim 3, The apparatus according to claim 1, wherein the information on the failure related to the component is based on a failure related to the component occurring in the field)
As per claim 8, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain the information on the failure report related to the component of the processing device from an in-field scan circuitry of the processing device (claim 4, The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain the information on the failure related to the component of the processing device from an in-field scan circuitry of the processing device.)
As per claim 9, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain the information on the failure report related to the component after an interrupt being raised by a trusted domain (Durham, [0013] the private key identifies the client as a trusted device in the network) in-field scan circuitry of the processing device (claim 5, The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain the information on the failure related to the component after an interrupt being raised by an in-field scan circuitry of the processing device.)
As per claim 10, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 2, wherein the machine-readable instructions comprise instructions to determine the information on the microcode update to be applied to the processing device to remedy the failure related to the component based on a mapping between failures and microcode updates (claim 6, The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to determine the information on the microcode update to be applied to the processing device to remedy the failure related to the component based on a mapping between failures and microcode updates)
As per claim 11, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 10, wherein the machine-readable instructions comprise instructions to update the mapping between the failures and microcode updates. (claim 7, The apparatus according to claim 6, wherein the machine-readable instructions comprise instructions to update the mapping between the failures and microcode updates.)
As per claim 12, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 10, wherein the mapping is an operator-defined policy supplied by an operator of a computer system comprising the processing device. (claim 8, The apparatus according to claim 6, wherein the mapping is an operator-defined policy supplied by an operator of a computer system comprising the processing device.)
As per claim 13, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain second information on a failure of a component of the processing device occurring in other computer systems, to determine information on a microcode update to be applied to the processing device to remedy the failure related to the component included in the second information, and to configure the processing device to apply the microcode update. (claim 9, The apparatus according to claim 1, wherein the machine-readable instructions comprise instructions to obtain second information on a failure of a component of the processing device occurring in other computer systems, to determine information on a microcode update to be applied to the processing device to remedy the failure related to the component included in the second information, and to configure the processing device to apply the microcode update.)
As per claim 14, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 2, wherein the microcode update affects one or more elements of the group of
an operating frequency of the component of the processing device, (claim 12, The apparatus according to claim 1, wherein the microcode update affects an operating frequency of the component of the processing device.)
a use of one or more components of the processing device for performing an instruction being exposed by an instruction set architecture of the processing device, (claim 13, The apparatus according to claim 1, wherein the microcode update affects a use of one or more components of the processing device for performing an instruction being exposed by an instruction set architecture of the processing device.)
instructions to emulate a functionality originally provided by the component, (claim 14, The apparatus according to claim 1, wherein the microcode update comprises instructions to emulate a functionality originally provided by the component.)
a shared use of one or more components of the processing device in simultaneous multithreading, or (claim 15, The apparatus according to claim 1, wherein the microcode update affects a shared use of one or more components of the processing device in simultaneous multi- threading.)
instructions being exposed by an instruction set architecture of the processing device. (claim 16, The apparatus according to claim 1, wherein the microcode update affects the instructions being exposed by an instruction set architecture of the processing device.)
As per claim 15, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 2, wherein the microcode update relates to one or more elements of the group of
an input/output controller of the processing device, affecting the use of at least a part of an interface being coupled to the processing device, (claim 17, The apparatus according to claim 1, wherein the microcode update relates to an in- put/output controller of the processing device, affecting the use of at least a part of an interface being coupled to the processing device.)
a memory controller of the processing device, affecting the use of at least a portion of memory included in a computer system comprising the processing device, or (claim 18, The apparatus according to claim 1, wherein the microcode update relates to a memory controller of the processing device, affecting the use of at least a portion of memory included in a computer system comprising the processing device.)
a storage controller of the processing device, affecting the use of at least a portion of storage circuitry included in a computer system comprising the processing device. (claim 19, The apparatus according to claim 1, wherein the microcode update relates to a storage controller of the processing device, affecting the use of at least a portion of storage circuitry included in a computer system comprising the processing device.)
As per claim 16, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 2, wherein the microcode update is configured to disable the component or portions of logic within the component. (claim 20, The apparatus according to claim 1, wherein the microcode update is configured to disable the component.)
As per claim 17, pending application 17/936,861 in view of Bulygin in view of Durham claims
The apparatus according to claim 1, wherein the processing device is an XPU, the XPU being one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), an Artificial Intelligence (AI) accelerator, an accelerator card and offloading circuitry. (claim 21, The apparatus according to claim 1, wherein the processing device is an XPU, the XPU being one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), an Artificial Intelligence (AI) accelerator, an accelerator card and offloading circuitry.)
As per claim 18, the claim recites similar claim limitation as claim 1. Claim 18 further recites
…a plurality of processing devices…
…a plurality of components of the plurality of processing devices
…plurality of failure reports…
(Bulygin, [0016] the security monitoring mechanism may be deployed for use by multiple organizations and may include one or more host devices such as laptops, desktop computers, and/or other computing devices. A local agent may be installed on each of the host devices in each group in order to collect information from the respective host devices).
As per claim 19, pending application 17/936,861 in view of Bulygin in view of Durham claims
A computer system comprising the apparatus according to claim 1 and the processing device. (claim 22, A computer system comprising the apparatus according to claim 1 and the processing device.)
As per claim 20, pending application 17/936,861 in view of Bulygin in view of Durham claims
The computer system according to claim 19, wherein the apparatus is implemented as part of a system firmware of the computer system. (claim 23, The computer system according to claim 22, wherein the apparatus is implemented as part of a system firmware of the computer system.)
As per claim 21, the claim recites similar claim limitation as claim 1 and thus is rejected for similar reason.
As per claim 22, pending application 17/936,861 in view of Bulygin in view of Durham claims
A non-transitory, computer-readable medium comprising a program code that, when the program code is executed on a processor, a computer, or a programmable hardware component, causes the processor, computer, or programmable hardware component to perform the method of claim 21. (claim 25, A non-transitory machine-readable storage medium including program code, when executed, to cause a machine to perform the method of claim 24.)
As per claim 23, pending application 17/936,861 in view of Bulygin in view of Durham claims
A method for monitoring a processing device from an application in a trusted domain, the method comprising transmitting a request for monitoring the processing device in the trusted domain; and receiving information on a failure report about the processing device in the trusted domain. (Bulygin, [0028] if a scheduled scan start is detected, the method includes receiving information from a host device)
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4 recites “microcode;” however there is no antecedent basis. The Examiner suggests modifying it to read “a microcode.”
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-23 are rejected under 35 U.S.C. 101 as being directed to an abstract idea without significantly more.
Below is an evaluation using the 2019 Revised Patent Subject Matter Eligibility Guidance.
Per claim 1,
Step 1 is satisfied because the claim recites a machine.
At step 2a prong 1, an abstract idea is recited: “authenticate the request” is a mental process that can be conducted by ensuring that the request is coming from a person with an approved credential.
At step 2a prong 2, additional elements that integrate into judicial exception into a practical application is note recited.
The following limitation are additional elements that amount to adding insignificant extra-solution activity to the judicial exception. See MPEP §§ 2106.04(d), 2106.05(g).
Receive a request for monitoring the processing device from the trusted domain
Obtain information on a failure report related to a component of the processing device, with a possible failure having occurred at runtime of the processing device
Provide the information on the failure report in the trusted domain.
The following limitation are additional elements that generally links the use of judicial exception to a particular technological environment or field of use. See MPEP §§ 2106.04(d), 2106.05(h).
monitoring a processing device from a trusted domain
The following limitation are additional elements that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP § 2106.05(f)(2).
An apparatus, interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions
At step 2b, additional elements that integrate into judicial exception into significantly more is not recited.
The following limitation are additional elements that amount to adding insignificant extra-solution activity to the judicial exception. See MPEP § 2106.05(g). Furthermore, the additional element is directed to receiving or transmitting data over a network, which the courts have recognized as well-understood, routine, and conventional when they are claimed in a generic manner (MPEP 2106.05(d)(II)).
Receive a request for monitoring the processing device from the trusted domain
Obtain information on a failure report related to a component of the processing device, with a possible failure having occurred at runtime of the processing device
Provide the information on the failure report in the trusted domain.
The following limitation are additional elements that generally links the use of judicial exception to a particular technological environment or field of use. See MPEP §§ 2106.04(d), 2106.05(h).
monitoring a processing device from a trusted domain
The following limitation are additional elements that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP § 2106.05(f)(2).
An apparatus, interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions
Per claim 2,
At step 2a prong 1, an abstract idea is recited: “to determine information on a microcode update to be applied to the processing device to remedy a failure related to the component” could be done by deciding what microcode fix would fix the issue.
At step 2a prong 2, The claim fails to recite additional element that integrate the judicial exception into a practical application. The limitation “to configure the processing device to apply the microcode update,” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer. See MPEP §§ 2106.04(d), 2106.05(f)(1).
At step 2b, the claim does not recite additional elements that amount to significantly more than the judicial exception. The limitation “to configure the processing device to apply the microcode update,” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer. See MPEP §§ 2106.04(d), 2106.05(f)(1).
Per claim 3, “decode a request” could be done by applying a mathematical computation. No additional claim limitations are recited.
Per claim 4, the additional limitation “to forward information on the request to a secure arbitration module for processing the request based on microcode related to the request” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 5, the additional limitation “to receive information on the failure report from the secure arbitration module” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 6, the additional limitation “wherein the information on the failure report related to the component comprises information on a circuit-level failure affecting the component” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 7, the additional limitation “wherein the information on the failure report related to the component is based on a failure related to the component occurring in the field” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 8, the additional limitation “to obtain the information on the failure report related to the component of the processing device from an in-field scan circuitry of the processing device” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 9, the additional limitation “to obtain the information on the failure report related to the component after an interrupt being raised by a trusted domain in-field scan circuitry of the processing device” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II).
Per claim 10-12, the following limitations are offered. However, the limitations are considered a mental process that can practically be performed in the human mind, with or without the use of a physical aid such as pen and paper (including an observation, evaluation, judgment, opinion).
Claim 10: to determine the information on the microcode update to be applied to the processing device to remedy the failure related to the component based on a mapping between failures and microcode updates. This is akin to deciding which update to apply in order to fix the issue.
Claim 11: to update the mapping between the failures and microcode updates. This is akin to mentally adjusting your analysis on which failures map to the update.
Claim 12: the mapping is an operator-defined policy supplied by an operator of a computer system comprising the processing device. This is akin to remembering the mapping that was instructed by an operator.
Per claim13, “to determine information on a microcode update to be applied to the processing device to remedy the failure related to the component included in the second information” is considered a mental process; akin to determining which update to perform in order to fix the issue. The claim limitation, “to obtain second information on a failure of a component of the processing device occurring in other computer systems,” is recited however it is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II). The claim limitation, “to configure the processing device to apply the microcode update,” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer.
Per claim 14 and 15 offers claim limitations that are considered generally linking the use of the judicial exception to a particular technological environment or field of use.
Per claim 16, the claim limitation, “wherein the microcode update is configured to disable the component or portions of logic within the component” is simply an extension of the “determining” mental step in the parent claim.
Per claim 17, “wherein the processing device is an XPU, the XPU being one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), an Artificial Intelligence (AI) accelerator, an accelerator card and offloading circuitry” is links the use of the judicial exception to a particular technological environment or field of use.
Per claim 18, “to authenticate the request” is considered a mental step, akin to determining whether the request came from a source with a valid credential. The following limitations are also recited however is considered an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional element is directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II):
to receive a request for monitoring a plurality of processing devices from the trusted domain
to obtain information on a plurality of failure reports related to a plurality of components of the plurality of processing devices, with a possible failure having occurred at runtime of the plurality of processing devices
to provide the information on the plurality of failure reports in the trusted domain.
Per claim 19, the additional limitations “a computer system” and “the processing device” is recited however they are considered an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process.
Per claim 20, “wherein the apparatus is implemented as part of a system firmware of the computer system” is an additional element that generally links the use of the judicial exception to a particular technological environment or field of use.
Per claim 21, it recites similar claim limitations as claim 1 and therefore is rejected for similar reasons.
Per claim 22, “a non-transitory, computer-readable medium comprising a program code that, when the program code is executed on a processor, a computer, or a programmable hardware component, causes the processor, computer, or programmable hardware component to perform the method” is considered an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process.
Per claim 23, the following limitations are recited however they are considered additional elements that amount to adding insignificant extra-solution activity to the judicial exception. Furthermore, the additional elements are directed to receiving or transmitting data over a network which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II):
transmitting a request for monitoring the processing device in the trusted domain
receiving information on a failure report about the processing device in the trusted domain
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 10-13, 15-16, 18-19, 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Kuo (US 20070283222 A1) from henceforth referred to as Kuo in view of Bulygin et al (US 20200074086 A1) from henceforth referred to as Bulygin in further view of Durham et al (WO 2005101794 A1) from henceforth referred to as Durham.
Per claim 1, Kuo teaches
An apparatus for monitoring a processing device …, the apparatus comprising interface circuitry (FIG. 1, external interface 114), machine-readable instructions ([0029] instructions), and processing circuitry to execute the machine-readable instructions (FIG. 1, integrated circuit 104) to:
receive a request ([0039] receives commands instructions from a user, client, computer, network, or a module) for monitoring the processing device… ([0063] “monitoring” via error check module that detects whether an error has occurred during an operation and repeats this step until an error is detected)
obtain information on a failure report related to a component of the processing device, with a possible failure having occurred at runtime of the processing device; ([0050] an error checking module discovers that an error has occurred during an operation performed by the integrated circuit and the module checks the status register to discover the type of error, or the operation that caused the error)
…. the failure report…. ([0050] collected information about the error)
Kuo fails to teach
a trusted domain
authenticate the request;
provide the information… in the trusted domain
However, Bulygin teaches
provide the information ([0017] collected information is delivered from the local agent back to the cloud-hosted service)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo with that of Bulygin because by enabling access to the vulnerabilities in the hardware and firmware layer of the devices, the hardware and firmware manufacturers and distributors can better monitor for attacks at the hardware/firmware level (Bulygin, [0003]).
Kuo in view of Bulygin fails to teach
…trusted domain
authenticate the request
However, Durham teaches
…trusted domain ([0013] the private key identifies the client as a trusted device in the network)
authenticate the request ([0013] shared cryptographic key is provisioned to multiple devices in a secure communication)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin with that of Durham because by authenticating the request in this manner, the result of the combination has a predictable outcome of ensuring that devices can communicate securely (Durham, [0013]).
Per claim 2, Kuo in view of Bulygin in view of Durham teaches
The apparatus of claim 1, wherein the machine-readable instructions further comprise instructions to determine information on a microcode update to be applied to the processing device to remedy a failure related to the component (Kuo, [0064] the control settings module checks the knowledge database for an entry corresponding to the error), and to configure the processing device to apply the microcode update (Kuo, [0064] the control settings module retrieves the system settings corresponding to the error entry from the knowledge base; the control settings module sets the control registers based on the system settings that it retrieved).
Per claim 3, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 1, wherein the machine-readable instructions further comprise instructions to decode the request (Durham, [0013] decrypt secure data for communication over network with server).
Per claim 4, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 1, wherein the machine-readable instructions further comprise instructions to forward information on the request to a secure arbitration module for processing the request based on microcode related to the request (Durham, [0038] embedded controller agent may be coupled with embedded firmware agent. Embedded controller agent and embedded firmware agent may be configured to provide manageability and/or security functionality to the system in a secure and convenient manner. The “secure arbitration module” is interpreted as any module that contains security elements that is used to dispute transactions. In this case the embedded security elements would dispute whether the request is authenticated or not before proceeding. If the Applicant wishes to narrow the scope of this claim language, they can do so by bringing in details the Specification such as from page 17 line 9-26)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin with that of Durham because by authenticating the request in this manner, the result of the combination has a predictable outcome of ensuring that devices can communicate securely (Durham, [0013]).
Per claim 5, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 4, wherein the machine-readable instructions further comprise instructions to receive information on the failure report (Bulygin, [0028] receives information from a host device) from the secure arbitration module. (Durham, [0038] embedded controller agent may be coupled with embedded firmware agent. Embedded controller agent and embedded firmware agent may be configured to provide manageability and/or security functionality to the system in a secure and convenient manner)
Per claim 6, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 1, wherein the information on the failure report related to the component comprises information on a circuit-level failure affecting the component (Kuo, [0060] errors due to design defects)
Per claim 7, Kuo in view of Bulygin in further view of Durham teaches
The apparatus according to claim 1, wherein the information on the failure report related to the component is based on a failure related to the component occurring in the field (Kuo, [0050] the error checking module discovers that the error has occurred during an operation; the module can then check a status register to discover the type of error, or the operation that caused the error)
Per claim 10, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 2, wherein the machine-readable instructions comprise instructions to determine the information on the microcode update to be applied to the processing device to remedy the failure (Kuo, [0064] the control settings module checks the knowledge database for an entry corresponding to the error) related to the component based on a mapping between failures and microcode updates. (Kuo, [0041] knowledge database may be a look-up table; it has an error list, a recovery settings list, etc. [0042] error list is a list of errors that are known to occur in an integrated circuit. For each error listed in the error list, there are one or more system control settings listed in the recovery settings list. The system control settings in the recovery settings list are system control register settings which are known to have resolved the corresponding errors from the error list in previous recovery attempts)
Per claim 11, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 10, wherein the machine-readable instructions comprise instructions to update the mapping between the failures and microcode updates. (Kuo, [0066] update module updates the knowledge database with a new error entry and corresponding recovery settings based on the error that occurred, and the system settings that resolved the error)
Per claim 12, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 10, wherein the mapping is an operator-defined policy supplied by an operator of a computer system comprising the processing device. (Kuo, [0039] the integrated receives updates to the knowledge database from the external interface which receives commands, instructions, and microcode updates from a user, client, etc. It is the Examiner’s interpretation that the “user” in the prior art teaches “operator” in the claim limitation)
Per claim 13, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 1
Kuo further teaches
wherein the machine-readable instructions comprise instructions to obtain …. information on a failure of a component of the processing device (Kuo, [0050] the error check module discovers the type of error or the operation that caused the error)
to determine information on a microcode update to be applied to the processing device to remedy the failure related to the component included in the second information (Kuo, [0064] control settings module checks the knowledge database for an entry corresponding to the error)
to configure the processing device to apply the microcode update. (Kuo, [0064] the control settings module sets the control registers based on the system settings that is retrieved)
Bulygin further teaches
…second information…in other computer systems (Bulygin, [0016] local agent can be installed on multiple host devices to collect information)
Per claim 15, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 2, wherein the microcode update (Kuo, [0051] the control setting module changes the contents of one or more system control registers) relates to one or more elements of the group of
an input/output controller of the processing device, affecting the use of at least a part of an interface being coupled to the processing device,
a memory controller of the processing device, affecting the use of at least a portion of memory included in a computer system comprising the processing device, or
a storage controller of the processing device, affecting the use of at least a portion of storage circuitry included in a computer system comprising the processing device.
(Kuo, [0042] the system control settings may define the direct memory access)
Per claim 16, Kuo in view of Bulygin in view of Durham teaches
The apparatus according to claim 2, wherein the microcode update is configured to disable the component or portions of logic within the component ([0011] set of system control settings changes the logic path of one or more system signals. It is the Examiner’s interpretation that this will essentially “disable” the logic path to the original system signals)
As per claim 18, the claim recites similar claim limitation as claim 1. Claim 18 further recites
…a plurality of processing devices…
…a plurality of components of the plurality of processing devices
…plurality of failure reports…
(Bulygin, [0016] the security monitoring mechanism may be deployed for use by multiple organizations and may include one or more host devices such as laptops, desktop computers, and/or other computing devices. A local agent may be installed on each of the host devices in each group in order to collect information from the respective host devices).
Per claim 19, Kuo in view of Bulygin in view of Durham teaches
A computer system comprising the apparatus according to claim 1 and the processing device. (Bulygin, [0016] host devices)
Per claim 21, the claim recites similar claim limitation as claim 1 and thus is rejected for similar reasons.
Per claim 22, Kuo in view of Bulygin in view of Durham teaches
A non-transitory, computer-readable medium comprising a program code that, when the program code is executed on a processor, a computer, or a programmable hardware component, causes the processor, computer, or programmable hardware component to perform the method of claim 21. (Kuo, [0032] a computer readable medium executes a program of machine-readable instructions on a digital processing apparatus)
Per claim 23, Kuo in view of Bulygin in view of Durham teaches
A method for monitoring a processing device from an application in a trusted domain, the method comprising transmitting a request for monitoring the processing device in the trusted domain; and receiving information on a failure report about the processing device in the trusted domain. (Bulygin, [0028] if a scheduled scan start is detected, the method includes receiving information from a host device)
Claims 8-9, 14, 17, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kuo in view of Bulygin in further view of Durham in further view of Shanbhogue et al (US 20160364308 A1) from henceforth referred to as Shanbhogue.
Per claim 8, Kuo in view of Bulygin in further view of Durham teaches
The apparatus according to claim 1
Kuo further teaches
wherein the machine-readable instructions comprise instructions to obtain the information on the failure report related to the component of the processing device ([0050] the error checking module discovers that the error has occurred during an operation; the module can then check a status register to discover the type of error, or the operation that caused the error)
However, Kuo in view of Bulygin in further view of Durham fails to teach
…from an in-field scan circuitry of the processing device
Shanbhogue teaches
…from an in-field scan circuitry of the processing device ([0015] multiple types of in-field testing)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin in further view of Durham with that of Shanbhogue to teach in-field scan circuitry because the combination offers a predictable result of minimizing unplanned downtime and offering quicker system failure debug (Shanbhogue, [0014]).
Per claim 9, Kuo in view of Bulygin in further view of Durham teaches
The apparatus according to claim 1
Kuo further teaches
wherein the machine-readable instructions comprise instructions to obtain the information on the failure report related to the component after an interrupt being raised ([0050] the error checking module receives an interrupt alerting the error check module that an error has occurred; the module then checks the status register to discover “the types of error, or the operation that caused the error”)
Durham further teaches
…a trusted domain…. ([0013] the private key identifies the client as a trusted device in the network)
However, Kuo in view of Bulygin in further view of Durham fails to teach
…in-field scan circuitry of the processing device
Shanbhogue teaches
…in-field scan circuitry of the processing device ([0015] multiple types of in-field testing)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin in further view of Durham with that of Shanbhogue to teach in-field scan circuitry because the combination offers a predictable result of minimizing unplanned downtime and offering quicker system failure debug (Shanbhogue, [0014]).
Per claim 14, Kuo in view of Bulygin in further view of Durham teaches
The apparatus according to claim 2
Kuo further teaches
The microcode update ([0051] the control setting module changes the contents of one or more system control registers)
Kuo in view of Bulygin in further view of Durham fails to teach
… one or more elements of the group of
an operating frequency of the component of the processing device,
a use of one or more components of the processing device for performing an instruction being exposed by an instruction set architecture of the processing device,
instructions to emulate a functionality originally provided by the component,
a shared use of one or more components of the processing device in simultaneous multithreading, or
instructions being exposed by an instruction set architecture of the processing device.
Shanbhogue teaches
… one or more elements of the group of
an operating frequency of the component of the processing device,
a use of one or more components of the processing device for performing an instruction being exposed by an instruction set architecture of the processing device,
instructions to emulate a functionality originally provided by the component,
a shared use of one or more components of the processing device in simultaneous multithreading, or
instructions being exposed by an instruction set architecture of the processing device.
([0064] the core that is being tested may support simultaneous multithreading))
Kuo in view of Bulygin in further view of Durham teaches microcode update in order to remedy detected errors, and Shanbhogue teaches microcode update for affected cores and that such a core can support simultaneous multithreading. It is obvious to a person of ordinary skill in the art to combine the teachings of Kuo in view of Bulygin in further view of Durham with that of Shanbhogue because Shanbhogue’s teaching is a specific implementation of what is being described in Kuo in view of Bulygin in further view of Durham’s teaching.
Per claim 17, Kuo in view of Bulygin in further view of Durham teaches
The apparatus according to claim 1
Kuo in view of Bulygin in further view of Durham fails to teach explicitly
wherein the processing device is an XPU, the XPU being one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), an Artificial Intelligence (AI) accelerator, an accelerator card and offloading circuitry.
Shanbhogue teaches
wherein the processing device is an XPU, the XPU being one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), an Artificial Intelligence (AI) accelerator, an accelerator card and offloading circuitry. ([0066] the processor may include graphics processor)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin in further view of Durham with that of Shanbhogue because a graphics processor is a specific example of the processor being utilized in Kuo in view of Bulygin in further view of Durham.
Per claim 20, Kuo in view of Bulygin in view of Durham teaches
The computer system according to claim 19
Kuo in view of Bulygin in view of Durham fails to teach
wherein the apparatus is implemented as part of a system firmware of the computer system.
Shanbhogue teaches
wherein the apparatus is implemented as part of a system firmware of the computer system. ([0028] the method can be performed by various combinations of hardware, software and/or firmware)
It is obvious to a person of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Kuo in view of Bulygin in further view of Durham with that of Shanbhogue because being implemented as part of a system firmware is a specific example of the how the method can be implemented in Kuo in view of Bulygin in further view of Durham.
Conclusion
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/K.L.R./Examiner, Art Unit 2114
/ASHISH THOMAS/Supervisory Patent Examiner, Art Unit 2114