DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites the limitation "the width dimension". There is insufficient antecedent basis for this limitation in the claim as only “a depth dimension” and “a channel dimension” are declared prior. For examination purposes, the Examiner interprets "the width dimension" as "the channel dimension".
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claims 5-11 will be addressed first.
Regarding claim 5, at Step 1, the claim is directed to a three-dimensional convolution device, which is a statutory category of invention (Machine).
At Step 2A Prong 1, Examiner notes that the claims are directed towards an abstract idea. The claim language has been reproduced below:
A three-dimensional convolution device, comprising: a buffer;
a direct memory access (DMA) circuit, reading input data from an external memory and storing the input data to the buffer;
a dimension transposing circuit, reading the input data from the buffer, and performing a dimension transposing operation on the input data to consecutively arrange a plurality of elements of the input data in a depth dimension and a channel dimension to generate first data (mathematical calculation and/or mental process);
and a convolution circuit, performing in blocks a convolution on the first data and second data that corresponds to first weight data to generate computed data (mathematical calculation);
wherein, the dimension transposing circuit further rearranges the computed data according to an original dimensional format of the input data to generate output data (mental process).
The limitations “consecutively arrange a plurality of elements of the input data in a depth dimension and a channel dimension” and “further rearranges the computed data according to an original dimensional format of the input data” are mental processes as Fig. 3 of Applicant’s specification demonstrates arranging a tensor with twelve sets of data based on height, width, and depth dimensions, which is a reasonable process to be done by a human with pen and paper. Furthermore, it would be reasonable for the human mind to rearrange computed data back to the original format of the twelve sets of data. Therefore, the limitations are considered mental processes.
At Step 2A Prong 2, the additional elements are bolded above. The additional elements do not integrate the abstract ideas into a practical application because the computer elements, which are recited at a high level of generality, provide conventional computer functions that do not impose any meaningful limits on practicing the abstract ideas. See MPEP 2106.05(f). The limitations “buffer”, “direct memory access (DMA) circuit”, “dimension transposing circuit”, and “convolution circuit” are recited at a high level of generality such that they are the equivalent of reciting “apply it” to the judicial exception. The limitations “reading input data from an external memory and storing the input data to the buffer” and “reading the input data from the buffer” are insignificant extra-solution activities of storing and retrieving information from memory. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
At Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. As set forth in step 2A prong 2 analysis, the functions “reading input data from an external memory and storing the input data to the buffer” and “reading the input data from the buffer” are recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Furthermore, the “buffer”, “direct memory access (DMA) circuit”, “dimension transposing circuit”, and “convolution circuit” are the equivalent of adding the words “apply it” to the judicial exception and are mere instructions to implement the abstract idea on a computer. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 6, under Step 2A Prong 2, the claim recites additional element “stores the second data, and a plurality of elements of the second data in the depth dimension and the width dimension are consecutively arranged”. The additional element does not integrate the abstract ideas into a practical application because the “stores the second data, and a plurality of elements of the second data in the depth dimension and the width dimension are consecutively arranged” does not impose any meaningful limits on practicing the abstract idea, as it is an insignificant extra-solution activity of data storage. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. The function of storing information in memory is recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 7, it is directed to the mathematical concept and/or mental process of “performs the dimension transposing operation on the first weight data to consecutively arrange a plurality of elements of the first weight data in the depth dimension and the channel dimension to generate the second data.”
Under Step 2A Prong 2, the claim recites additional elements “the DMA circuit further reads the first weight data from the external memory to the buffer” and “the dimension transposing circuit further reads the first weight data from the buffer”. The additional elements do not integrate the abstract ideas into a practical application because the reading data from memory or buffer does not impose any meaningful limits on practicing the abstract idea, as it is an insignificant extra-solution activity of data storage. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. The function of storing information in memory is recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 8, it is directed to the mathematical concept of correspond to different depths to perform the convolution, the elements correspond to a same width and a same height.
Under Step 2A Prong 2, the claim recites additional element “the convolution circuit consecutively reads a plurality of elements of the first data”. The additional element does not integrate the abstract ideas into a practical application because “consecutively reads a plurality of elements of the first data” does not impose any meaningful limits on practicing the abstract idea, as it is an insignificant extra-solution of mere data gathering. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. The function of retrieving information from memory is recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 9, the claim merely recites functions for performing the convolution that further mathematically limit the mathematical concepts, or provide additional mathematical functions, of claim 5. They do not include additional elements that would require further analysis under steps 2A prong 2 and step 2B.
Regarding claim 10, it is directed to the mathematical concept and/or mental process of “performs the dimension transposing operation on the second weight data to consecutively arrange a plurality of elements of the first weight data in the depth dimension and the channel dimension to generate the third data.”
Under Step 2A Prong 2, the claim recites additional elements “the DMA circuit further reads the second weight data from the external memory to the buffer” and “the dimension transposing circuit further reads the second weight data from the buffer”. The additional elements do not integrate the abstract ideas into a practical application because the reading data from memory or buffer does not impose any meaningful limits on practicing the abstract idea, as it is an insignificant extra-solution activity of data storage. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. The function of storing information in memory is recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 11, under Step 2A Prong 2, the claim recites additional elements “stored through the buffer and the DMA circuit to the external memory” and “the convolution circuit reads in blocks the first data through the DMA circuit and the buffer”. The additional element does not integrate the abstract ideas into a practical application because the storing and retrieving information from memory or buffer do not impose any meaningful limits on practicing the abstract idea, as it is an insignificant extra-solution activity of data storage or retrieving data. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. The function of storing and retrieving information in memory is recognized by the courts as well-understood routine and conventional. See MPEP 2106.05(d)(II). Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claims 1-4, the claims are directed to a method that would be practiced by the apparatus of claims 5, 8, 7, 9, respectively, respectively. All steps performed by the method of claims 1-4 are executed by the apparatus in claims 5, 8, 7, 9, respectively, as configured. The analysis of claims 5, 8, 7, 9, applies equally to claims 1-4.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (US 20190163717 A1, hereinafter “Li”) in view of Whatmough et al. (US 20190311243 A1, hereinafter “Whatmough”). Claims 5-8 will be addressed first.
As per claim 5, Li teaches A three-dimensional convolution device, comprising: a buffer (Li: Fig. 11 elements 1131, 1135);
a dimension transposing circuit, reading the input data from the buffer, and performing a dimension transposing operation on the input data to consecutively arrange a plurality of elements of the input data in a depth dimension and a channel dimension to generate first data (Li: Fig. 1; [0034]);
and a convolution circuit, performing in blocks a convolution on the first data and second data that corresponds to first weight data to generate computed data (Li: Fig. 3 element S315; [0076]);
However, Li does not teach a direct memory access (DMA) circuit, reading input data from an external memory and storing the input data to the buffer; wherein, the dimension transposing circuit further rearranges the computed data according to an original dimensional format of the input data to generate output data.
Whatmough teaches a direct memory access (DMA) circuit, reading input data from an external memory and storing the input data to the buffer (Whatmough: Fig. 1 element 112);
wherein, the dimension transposing circuit further rearranges the computed data according to an original dimensional format of the input data to generate output data (Whatmough: Fig. 6; [0051]-[0054], wherein the output feature map is arranged in the original dimensions of the input feature map).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the device of Li with the DMA and data rearrangement of Whatmough. One would have been motivated to combine these references because both references disclose arrangement of data for convolution operations, and the method of Whatmough provides efficient dataflow (Whatmough: abstract; [0046]).
As per claim 6, Li/Whatmough further teaches The three-dimensional convolution device according to claim 5, wherein the external memory further stores the second data, and a plurality of elements of the second data in the depth dimension and the width dimension are consecutively arranged (Li: [0101]).
As per claim 7, Li/Whatmough further teaches The three-dimensional convolution device according to claim 5, wherein the DMA circuit further reads the first weight data from the external memory to the buffer (Whatmough: [0018]), and the dimension transposing circuit further reads the first weight data from the buffer and performs the dimension transposing operation on the first weight data to consecutively arrange a plurality of elements of the first weight data in the depth dimension and the channel dimension to generate the second data (Li: Fig. 3 element S310; [0062]).
As per claim 8, Li/Whatmough further teaches The three-dimensional convolution device according to claim 5, wherein the convolution circuit consecutively reads a plurality of elements of the first data that correspond to different depths to perform the convolution, wherein the elements correspond to a same width and a same height (Li: [0077]).
As per claims 1-3, the claims are directed to a method that implements the same or similar features as the device of claims 5, 8, 7, respectively, and are therefore rejected for at least the same reasons therein.
Claims 4, 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Li/Whatmough in further view of Zhang et al. (US 20200074288 A1, hereinafter “Zhang”). Claims 9-11 will be addressed first.
As per claim 9, Li/Whatmough further teach The three-dimensional convolution device according to claim 5, the convolution circuit performs in blocks of an operation of the first convolution layer on the first data and the second data to generate buffer data (Li: Fig. 3 element S315; [0076]), and performs in blocks an operation of the second convolution layer on the buffer data and third data that corresponds to second weight data to generate the computed data (Li: Fig. 3 element S315; [0076]).
However, Li/Whatmough does not teach wherein the convolution comprises a first convolution layer and a second convolution layer,
Zhang teaches wherein the convolution comprises a first convolution layer and a second convolution layer (Zhang: [0076], a multi-layer convolution operation).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the convolution operation of Li with the multi-layer convolution method of Zhang. One would have been motivated to combine these references because both references disclose performing convolution operations, and combining prior art elements according to known methods to yield predictable results (applying the convolution operation of Li to multiple convolution layers).
As per claim 10, Li/Whatmough/Zhang further teach The three-dimensional convolution device according to claim 9, wherein the DMA circuit further reads the second weight data from the external memory to the buffer (Zhang: Fig. 1B element 121; [0069]), and the dimension transposing circuit further reads the second weight data from the buffer and performs the dimension transposing operation on the second weight data to consecutively arrange a plurality of elements of the first weight data in the depth dimension and the channel dimension to generate the third data (Li: Fig. 3 element S310; [0062]).
As per claim 11, Li/Whatmough teaches The three-dimensional convolution device according to claim 5,
However, Li/Whatmough does not teach wherein the first data generated by the dimension transposing circuit is stored through the buffer and the DMA circuit to the external memory, and the convolution circuit reads in blocks the first data through the DMA circuit and the buffer.
Zhang teaches wherein the first data generated by the dimension transposing circuit is stored through the buffer and the DMA circuit to the external memory, and the convolution circuit reads in blocks the first data through the DMA circuit and the buffer (Zhang: Fig. 1B elements 121, 124-126; [0075]; [0091]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the convolution operation of Li with the multi-layer convolution method of Zhang for at least the same reasons as discussed above in claim 9.
As per claim 4, the claim is directed to a method that implements the same or similar features as the device of claim 9, and is therefore rejected for at least the same reasons therein. Furthermore, Li/Whatmough/Zhang teaches performing a dimension transposing operation on second weight data to consecutively arrange a plurality of elements of the second weight data in the depth dimension and the channel dimension to further generate third data (Li: Fig. 3 element S310; [0062]);
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHAT N LE whose telephone number is (571)272-0546. The examiner can normally be reached Monday-Friday 8:30AM-5PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew T Caldwell can be reached at (571) 272-3702. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/P.N.L./
Phat LeExaminer, Art Unit 2182 (571) 272-0546
/ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182
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