CTNF 18/071,237 CTNF 98266 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 08-06 AIA Claim s 5 and 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention or species , there being no allowable generic or linking claim. Election was made without traverse in the reply filed on February 16, 2026 . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 22 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claim 22 cites the air core inductor comprising “a plurality of conductive loops” but the specification and drawings to not clearly point out what is intended to be interpreted as “conductive loops.” Examiner notes that the first conductive structure and second conductive structures comprise a conductive material looped around the core substrate. For examination purposes, “conductive loops” are interpreted to refer to a conductive material of the first and second conductive structure “looping” around the core substrate as part of the air core inductor. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim (s) 1, 3-4, 6, 8, 10 and 21-25 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Zhang (US 20190274217 A1) . Regarding Claim 1, Zhang teaches a package core (shown Fig. 2I), comprising: a core substrate (205); a first opening (252 left, see also [0045] which describes plugs 213 of the final device being omitted with openings 252 being air filled) through the core substrate (shown Fig. 2H); a second opening (252 right) through the core substrate and adjacent to the first opening; a first structure (central portion 261 and 212) around the core substrate between the first opening and the second opening (shown Fig. 2I), wherein the first structure is electrically conductive (see [0041]); and a second structure (left and right portions of 261 and 212) around the core substrate outside of the first opening and the second opening (shown Fig. 2I), wherein the second structure is electrically conductive. Regarding Claim 3, Zhang teaches the package core of claim 1, wherein the first structure and the second structure comprise an inductor (see [0031] and Fig. 1A). Regarding Claim 4, Zhang teaches the package core of claim 1, wherein an air gap is provided between the first structure and the second structure (see described in [0045] which describes omitting plugs 213 and filling openings 252 with air). Regarding Claim 6, Zhang teaches the package core of claim 1, wherein a sidewall of the first structure and a sidewall of the second structure are tapered (see [0036] which describes tapered openings, wherein a sidewalls of the first and second structures are shaped to match the openings). Regarding Claim 8, Zhang teaches the package core of claim 1, wherein the core substrate comprises glass (see [0023]). Regarding Claim 10, Zhang teaches the package core of claim 1, wherein the package core is coupled to a processor of a computing system (see Figs. 3-4 and [0048-0049]). Regarding Claim 21 , Zhang teaches a package substrate (see Fig. 2I), comprising: a core (205), wherein the core comprises glass (see [0023]); buildup layers (208A and 208B, see also [0023] describing “build-up” layers) above and below the core (shown Fig. 2I); and an air core inductor embedded in the core (defined by conductive portions 261 separated by air gap filling openings 252 in place of plug 213, see also [0045]), wherein the air core inductor comprises a first conductive structure (261, central portion) and a second conductive structure (261 left and right) that are separated from each other by an air gap (filling space 213, see also [0045]). Regarding Claim 22 , Zhang teaches the package substrate of claim 21, wherein the air core inductor comprises a plurality of conductive loops (interpreted as loops of conductive material surrounding the air gaps, shown Fig. 2I). Regarding Claim 23 , Zhang teaches the package substrate of claim 21, wherein the first conductive structure and the second conductive structure pass through a thickness of the core (shown Fig. 2I). Regarding Claim 24 , Zhang teaches an electronic system (device of Fig. 3 and [0048]), comprising: a board (380); a package substrate (370) coupled to the board (shown Fig. 3), wherein the package substrate comprises: an air core inductor (310, see also [0045] which describes the disclosed inductor having an air gap in the core filling the space of plug 213 and Fig. 2I) embedded in a core of the package substrate; and a die (340) coupled to the package substrate (shown Fig. 3). Regarding Claim 25 , Zhang teaches the electronic system of claim 24, wherein the air core inductor passes through a thickness of the core (shown Fig. 2I), and wherein sidewalls of the air core inductor are tapered (see [0036]) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 20190274217 A1) in further view of Do (US 20200066634 A1) . Regarding Claim 2, Zhang teaches the package core of claim 1, but does not explicitly teach a seed layer being provided between the core substrate and the first structure and between the core substrate and the second structure. Zhang describes the conductive layers 261 being formed by electroplating (see However, implementing seed layers between conductive materials and substrate materials are common in the art. For example, Do describes a seed layer being deposited over a dielectric layer wherein a subsequent conductor is electroplated over the dielectric and patterned. It would be obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to implement a seed layer between the conductive layers and core substrate of Zhang as this would enhance material deposition (see also Do: [0101]). More specifically, this modification would teach a seed layer being provided between the core substrate and the first structure and between the core substrate and the second structure . 07-21-aia AIA Claim s 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 20190274217 A1) in further view of Garner (US 20210359185 A1) . Regarding Claim 7, Zhang teaches the package core of claim 6, wherein a tapered sidewall would be tapered at least along a first direction, with other shapes being alluded to in paragraph [0034]. For example, Garner teaches a device wherein vias may be tapered along multiple directions (see also Garner: [0032] and Fig. 2D). It would be obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to implement a suitable shape for minimizing an inner diameter of a via of the device of Zhang as this would enable close proximity to adjacent components thus minimizing overall device footprint (see also Garner: [0032-0034]). More specifically, this modification would teach that the sidewall of the first structure and the sidewall of the second structure are each tapered in a first direction and a second direction. Regarding Claim 9, Zhang teaches the package core of claim 1, but is silent regarding a thickness of the core substrate and aspect ratio of the first and second openings. Garner teaches a method of forming vias (see Figs. 2A-2D) similar to the opening of Zhang used in electronic components, like inductors (see Garner: [0034]) wherein a thickness of a glass substrate may be 300 microns (see [0028]) and an aspect ratio of the vias may be greater than 5:1 (see also [0032]). It would be obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to implement the dimensions and techniques described by Garner to the device of Zhang as this would enable relaxed alignment tolerances during manufacturing and close proximity between electronic components, thus reducing overall device footprint (see also [0033-0034]). Specifically, Garner as applied to Zhang would teach a thickness of the core substrate being between 50 microns and 1000 microns and wherein aspect ratios of the first opening and the second opening are approximately 5:1 or greater . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : Koga (US 20200357734 A1) teaches an inductor made from a glass core substrate. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASEY PAUL BOATMAN whose telephone number is (703)756-4778. The examiner can normally be reached M-F 7:30 AM - 5:30 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.P.B./Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893 Application/Control Number: 18/071,237 Page 2 Art Unit: 2893 Application/Control Number: 18/071,237 Page 3 Art Unit: 2893 Application/Control Number: 18/071,237 Page 4 Art Unit: 2893 Application/Control Number: 18/071,237 Page 5 Art Unit: 2893 Application/Control Number: 18/071,237 Page 6 Art Unit: 2893 Application/Control Number: 18/071,237 Page 7 Art Unit: 2893 Application/Control Number: 18/071,237 Page 8 Art Unit: 2893