DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3, 6, 7, 10, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over US 2014/0001439 A1 (Chen) in view of US 2018/0323071 A1 (Shatalov).
Regarding claim 1, Chen discloses, A semiconductor structure (semiconductor structure (100); FIG. 1A; [0012]), comprising:
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a substrate (substrate (102); FIG. 1A; [0012]);
a[n] AlN/AlGaN seed layer (AlN/AlGaN seed layer (104 and 108) FIG. 1A; [0012] and [0013])1 arranged on the substrate (102); and
an AIGaN epitaxial layer (AlGaN epitaxial layer (116); FIG. 1A; [0014] and [0007]) formed on the AIN/AlGaN seed layer (104 and 108).
But Chen does not appear to explicitly disclose,
a patterned seed layer;
wherein a side, facing the AlGaN epitaxial layer, of the patterned AlN/AlGaN seed layer is provided with a plurality of openings, and an area of the AlGaN epitaxial layer over the plurality of openings is unsupported by a surface of the patterned AlN/AlGaN seed layer.
However, in analogous art, Shatalov discloses that is was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor structure (semiconductor structure (10); FIG. 2; [0039]) having a substrate (substrate (12); FIG. 2; [0039]) can be predicably formed to include a group III-V material patterned seed layer (group III-V material patterned (patterned (14A and 14B); FIG. 2; [0041]) seed layer (seed layer (14 and 16); FIG. 2; [0040]) on substrate (12) and a group III-V material epitaxial layer (group III-V material epitaxial layer (18); FIG. 2; [0040] and [0041]) on group III-V material patterned (14A and 14B) seed layer (14 and 16). Shatalov also discloses that a side of the group III-V material patterned (14A and 14B) seed layer (14 and 16) facing the group III-V material epitaxial layer (18) includes a plurality of openings (openings (16A and 16B); FIG. 2; [0042]) and that an area of the group III-V material epitaxial layer (18) over the plurality of openings (16A and 16B) is unsupported by a surface of the group III-V material patterned (14A and 14B) seed layer (14 and 16) (annotated FIG. 2, below). Shatalov additionally discloses that the presence of openings (16A and 16B) in the group III-V material patterned (14A and 14B) seed layer(14 and 16) can reduce internal stresses, threading dislocations (19), and cracks in the semiconductor layers of semiconductor structure (10) ([0043]). Shatalov further discloses that patterns (14A and 14B) can control a characteristic size and density of openings (16A and 16B) ([0042]).
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In an alternative embodiment, Shatalov discloses a semiconductor structure (semiconductor structure (30); FIG. 2; [0054]) having a substrate (substrate (12); FIG. 2; [0039]) can be predicably formed to include a patterned seed layer (patterned seed layer (34 and 36); annotated FIG. 4, below; [0054]) on substrate (12) and a layer (layer (38); FIG. 4; [0054]) on patterned seed layer (34 and 36). Shatalov also discloses that a side of the patterned seed layer (34 and 36) facing layer (38) includes a plurality of openings (openings (36A); FIG. 4; [0054]) and that an area of layer (18) over the plurality of openings (36A) is unsupported by a surface of the patterned seed layer (34 and 36) (annotated FIG. 4, below).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen and Shatalov before him/her to pattern the AIN/AlGaN seed layer (104 and 108) of Chen to control a characteristic size and density of a plurality of openings provided in the patterned AIN/AlGaN seed layer (104 and 108), as taught by Shatalov, and that a side, facing the AlGaN epitaxial layer (116), of the patterned AlN/AlGaN seed layer (104 and 108) is provided with the plurality of openings, and an area of the AlGaN epitaxial layer (116) over the plurality of openings is unsupported by a surface of the patterned AlN/AlGaN seed layer (104 and 108), as also taught by Shatalov, thereby reducing internal stresses, threading dislocations, and cracks in the semiconductor layers of semiconductor structure (100) of Chen.
Regarding claim 3, Chen in view of Shatalov discloses, The semiconductor structure (100) according to claim 1, wherein the patterned AIN/AIGaN seed layer ((104 and 108) of Chen) is a superlattice structure comprising a patterned AlN layer and a patterned AlGaN layer stacked alternately ([0006] of Shatalov--reduces biaxial tensile strain), and the superlattice structure is arranged between the substrate (102 of Chen) and the AlGaN epitaxial layer (116 of Chen).
Regarding claim 6, Chen in view of Shatalov discloses, The semiconductor structure (100) according to claim 1, wherein the patterned AIN/AIGaN seed layer ((104 and 108) of Chen) comprises a first AlN layer (first AlN layer (104(a) and/or 104(b); FIG. 1A; [0013], all of Chen) and a superlattice structure comprising a patterned AlN layer and a patterned AlGaN layer stacked alternatively ([0006] of Shatalov--reduces biaxial tensile strain).
Regarding claim 7, Chen in view of Shatalov discloses, The semiconductor structure (semiconductor structure (300); FIG. 3C; [0016], all of Chen) according to claim 1, wherein the patterned AIN/AIGaN seed layer ((104 and 108) of Chen) comprises an AlXGa1-XN layer (AlXGa1-XN layer(308(a)); FIG. 3C; [0022], all of Chen) in which Al composition decreases from the substrate ((102) and [0022], both of Chen) toward the AlGaN epitaxial layer ((116) of Chen), wherein 0.55≤x≤1 ([0022])—the disclosed range of x can comprise from about 0.9 to about 0.7 which lies inside recited range of wherein 0.55<x≤1 and, therefore, anticipates the recited range of wherein 0.55<x≤1. See, MPEP 2131.03(I)—A Specific Example In The Prior Art Which Is Within A Claimed Range Anticipates The Range.
Regarding claim 10, Chen in view of Shatalov does not appear to explicitly disclose, wherein a patterning depth in a thickness direction of the patterned AlN/AlGaN seed layer((104 and 108) of Chen) is less than or equal to a thickness of the patterned AlN/AlGaN seed layer ((104 and 108) of Chen).
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chen and Shatalov before him/her, that there are a finite number of predicable solutions for a patterning depth in a thickness direction of the patterned AlN/AlGaN seed layer (104 and 108 of Chen) of Chen in view of Shatalov with respect to a thickness of the patterned AlN/AlGaN seed layer ((104 and 108 of Chen) of Chen in view of Shatalov—i.e., the patterning depth in a thickness direction of the patterned AlN/AlGaN seed layer (104 and 108) can be (i) greater than or equal to a thickness of the patterned AlN/AlGaN seed layer ((104 and 108) or (ii) less than or equal to a thickness of the patterned AlN/AlGaN seed layer ((104 and 108)—and, absent unexpected results, it would have been obvious to try each of these two possibilities (including that a patterning depth in a thickness direction of the patterned AlN/AlGaN seed layer((104 and 108) of Chen) is less than or equal to a thickness of the patterned AlN/AlGaN seed layer ((104 and 108) of Chen), as recited in dependent claim 10) because each of these two possibilities have a reasonable expectation of success. See, MPEP 2143(E) –"Obvious To Try" – Choosing From a Finite Number of Identified, Predictable Solutions, With a Reasonable Expectation of Success.
Regarding claim 11, Chen discloses, A method for manufacturing (method for manufacturing (400); FIG. 4; [0027]) a semiconductor structure (semiconductor structure (100); FIG. 1A; [0012]), comprising:
growing a[n] AlN/AlGaN seed layer (AlN/AlGaN seed layer (104 and 108) FIG. 1A; [0007], [0012], and [0013])2 on a substrate (substrate (102); FIG. 1A; [0012]); and
growing an AIGaN epitaxial layer (AlGaN epitaxial layer (116); FIG. 1A; [0014] and [0007]) on the AIN/AlGaN seed layer (104 and 108).
But Chen does not appear to explicitly disclose,
a patterned seed layer;
wherein a side, facing the AlGaN epitaxial layer, of the patterned AlN/AlGaN seed layer is provided with a plurality of openings, and an area of the AlGaN epitaxial layer over the plurality of openings is unsupported by a surface of the patterned AlN/AlGaN seed layer.
However, in analogous art, Shatalov discloses that is was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor structure (semiconductor structure (10); FIG. 2; [0039]) having a substrate (substrate (12); FIG. 2; [0039]) can be predicably formed to include a group III-V material patterned seed layer (group III-V material patterned (patterned (14A and 14B); FIG. 2; [0041]) seed layer (seed layer (14 and 16); FIG. 2; [0040]) on substrate (12) and a group III-V material epitaxial layer (group III-V material epitaxial layer (18); FIG. 2; [0040] and [0041]) on group III-V material patterned (14A and 14B) seed layer (14 and 16). Shatalov also discloses that a side of the group III-V material patterned (14A and 14B) seed layer (14 and 16) facing the group III-V material epitaxial layer (18) includes a plurality of openings (openings (16A and 16B); FIG. 2; [0042]) and that an area of the group III-V material epitaxial layer (18) over the plurality of openings (16A and 16B) is unsupported by a surface of the group III-V material patterned (14A and 14B) seed layer (14 and 16) (annotated FIG. 2, above). Shatalov additionally discloses that the presence of openings (16A and 16B) in the group III-V material patterned (14A and 14B) seed layer(14 and 16) can reduce internal stresses, threading dislocations (19), and cracks in the semiconductor layers of semiconductor structure (10) ([0043]). Shatalov further discloses that patterns (14A and 14B) can control a characteristic size and density of openings (16A and 16B) ([0042]).
In an alternative embodiment, Shatalov discloses a semiconductor structure (semiconductor structure (30); FIG. 2; [0054]) having a substrate (substrate (12); FIG. 2; [0040]) can be predicably formed to include a patterned seed layer (patterned seed layer (34 and 36); annotated FIG. 4, above; [0054]) on substrate (12) and a layer (layer (38); FIG. 4; [0054]) on patterned seed layer (34 and 36). Shatalov also discloses that a side of the patterned seed layer (34 and 36) facing layer (38) includes a plurality of openings (openings (36A); FIG. 4; [0054]) and that an area of layer (18) over the plurality of openings (36A) is unsupported by a surface of the patterned seed layer (34 and 36) (annotated FIG. 4, above).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen and Shatalov before him/her to pattern the AIN/AlGaN seed layer (104 and 108) of Chen to control a characteristic size and density of a plurality of openings provided in the patterned AIN/AlGaN seed layer (104 and 108), as taught by Shatalov, and that a side, facing the AlGaN epitaxial layer (116), of the patterned AlN/AlGaN seed layer (104 and 108) is provided with the plurality of openings, and an area of the AlGaN epitaxial layer (116) over the plurality of openings is unsupported by a surface of the patterned AlN/AlGaN seed layer (104 and 108), as also taught by Shatalov, thereby reducing internal stresses, threading dislocations, and cracks in the semiconductor layers of semiconductor structure (100) of Chen.
Claims 2, 4, 5, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Shatalov and further in view of US 7,915,626 B1 (Allerman).
Regarding claim 2, Chen in view of Shatalov discloses, The semiconductor structure (100) according to claim 1, wherein the patterned AIN/AlGaN seed layer ((104 and 108) of Chen) comprises a first AlN layer (first AlN layer (104(a) and/or 104(b); FIG. 1A; [0013], all of Chen), an AlXGa1-xN layer (AlXGa1-xN layer (108(a), 108(b) and/or 108(c)); FIG. 1A; [0013], all of Chen).
But Chen in view of Shatalov does not appear to explicitly disclose
and a second AIN layer stacked in sequence,
and the second AIN layer has a patterned structure; wherein x<0.5.
However, in analogous art, Allerman discloses a semiconductor structure (FIGs. 1a and 1c)
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having a substrate (substrate (1); FIGs. 1a and 1c; Col. 3, line 20) and a patterned Group III nitride seed layer (patterned Group III nitride seed layer (2); annotated FIG. 1a, above; Col. 3, lines 20-21).
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Allerman also discloses a Group III nitride epitaxial layer (Group III nitride layer (4); FIG. 1C; Col. 3, lines 25-26 and Col. 4, lines 23-24) formed on patterned Group III nitride seed layer (2). Allerman additionally discloses that patterned Group III nitride seed layers are useful for growing AlxGa1-xN to greater thicknesses without cracking and with greatly reduced threading dislocation (TD) density as compared with conventionally grown materials (Col. 3, lines 6-10). Allerman further discloses that a second patterned AIN layer may be stacked in sequence (Col. 7, lines 1-3 and line 20) to produce further improvements in dislocation density and crack-free thickness (Col. 7, lines 4-5). Allerman still further discloses that (the second AIN layer has a patterned structure; wherein 0≤x≤1 (Col. 7, lines 23-26).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen, Shatalov, and Allerman before him/her that the patterned AIN/AlGaN seed layer ((104 and 108) of Chen in view of Shatalov include a second patterned AIN layer stacked in sequence to produce further improvements in dislocation density and crack-free thickness, as taught by Allerman, and the second AIN layer has a patterned structure; wherein x<0.5 because the recited range of wherein x<0.5 lies inside the range of 0≤x≤1 disclosed by Allerman. See, MPEP 2144.05(I)— In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Regarding claim 4, Chen in view of Shatalov discloses a material of a layer is different from AIN and AIGaN ([0046] of Shatalov—“indium nitride (InN), gallium nitride (GaN), . . . silicon nitride (SiN), any of their alloys, and/or the like”).
But, Chen in view of Shatalov does not appear to explicitly disclose, wherein the superlattice structure further comprises a film layer.
However, in analogous art, Allerman discloses that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor structure (FIG. 1b) can be predicably formed to include a film layer (film layer (3); FIG. 1b; Col. 3, line 22) for nucleation.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen, Shatalov, and Allerman before him/her that the superlattice structure ([0006] of Shatalov) of Chen in view of Shatalov further comprises a film layer for nucleation, as taught by Allerman, and a material of the film layer is different from AIN and AIGaN ([0046] of Shatalov).
Regarding claim 5, Chen in view of Shatalov and further in view of Allerman discloses, The semiconductor structure (100) according to claim 4, wherein the material of the film layer (3 of Allerman) is GaN ([0046] of Shatalov).
Regarding claim 12, Chen in view of Shatalov discloses, The method for manufacturing (400) a semiconductor structure (100) according to claim 11, wherein the growing the patterned AlN/AlGaN seed layer ((104 and 108) of Chen) on the substrate (102) comprises:
growing an AlN/AlGaN seed layer of a flat sheet structure ((104 and 108) and FIG. 1A of Chen) on a substrate of a flat sheet structure ((102) and FIG. 1A of Chen).
But, Chen in view of Shatalov does not appear to explicitly disclose, etching the AlN/AlGaN seed layer to obtain the patterned AlN/AlGaN seed layer.
However, in analogous art, Allerman discloses that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a patterned Group III nitride seed layer (patterned Group III nitride seed layer (2); annotated FIG. 1a, above; Col. 3, lines 20-21) may be predicably fabricated by etching (Col. 7, lines 1-19). Allerman also discloses that the resulting structure in AlN or AlGaN can be used to reduce dislocation density and cracking in overgrown AlGaN films (Col. 7, lines 19-22).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen, Shatalov, and Allerman before him/her that the AlN/AlGaN seed layer ((104 and 108) and FIG. 1A of Chen) of Chen in view of Shatalov can be predicably etched to obtain the patterned AlN/AlGaN seed layer ((104 and 108) of Chen) of Chen in view of Shatalov, as taught by Allerman, to reduce dislocation density and cracking in overgrown AlGaN films, as also taught by Allerman.
Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Shatalov and further in view of US 2004/0155248 A1 (Fukuda).
Regarding claim 8, Chen in view of Shatalov does not appear to explicitly disclose, wherein the AlGaN epitaxial layer comprises impurities.
However, in analogous art, Fukuda discloses a semiconductor structure (FIG. 1) having an AlGaN layer comprising impurities ([0059]) and that these impurities improve electrostatic discharge (ESD) tolerance ([0059]). Fukuda also discloses that these impurities may include magnesium (Mg) ([0059]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen, Shatalov, and Fukuda before him/her to include impurities in the AlGaN epitaxial layer (116 of Chen) of Chen in view of Shatalov to improve ESD tolerance, as taught by Fukuda.
Regarding claim 9, Chen in view of Shatalov and further in view of Fukuda discloses, The semiconductor structure (100) according to claim 8, wherein the impurities comprise In element or Mg element ([0059] of Fukuda).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Shatalov and further in view of US 2015/0255677 A1 (Dechoux).
Regarding claim 13, Chen in view of Shatalov does not appear to explicitly disclose, wherein the growing the patterned AlN/AlGaN seed layer ((104 and 108) of Chen) on the substrate (102) comprises:
growing an island-structured AlN/AlGaN seed layer on a flat-sheet-structured substrate; and stopping a growth of the island-structured AlN/AlGaN seed layer to obtain the patterned AlN/AlGaN seed layer before the island-structured AlN/AlGaN seed layer coalesces to form a flat-sheet-structured AlN/AlGaN seed layer.
However, in analogous art, Dechoux discloses that it is well-known to grow an island-structured III-V seed layer on seed island structure (island-structured III-V seed layer (18, 24, 26 and 28); FIG. 4I; [0075], [0091] and [0094]) on a flat-sheet-structured substrate (flat-sheet-structured substrate (14); FIG. 4C; [0090]). Dechoux also discloses that the material forming the seed islands is selected to promote wire growth according to the same polarity ([0075]). Dechoux additionally discloses that seed islands (18) promote growth of the III-V seed layer from the top thereof, rather than either the lateral sides thereof or the remainder of substrate (14), thereby stopping a growth of island-structured III-V seed layer (18, 24, 26, and 28) before the island-structured III-V seed layer (18, 24, 26, and 28) coalesces to form a flat-sheet-structured III-V seed layer ([0075]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Chen, Shatalov, and Dechoux before him/her to grow an island-structured AlN/AlGaN seed layer ((104 and 108) of Chen) on a flat-sheet-structured substrate (102 and FIG. 1A of Chen) of Chen in view of Shatalov, as taught by Dechoux, and to stop a growth of the island-structured AlN/AlGaN seed layer ((104 and 108) of Chen) to obtain the patterned AlN/AlGaN seed layer ((104 and 108) of Chen) of Chen in view of Shatalov before the island-structured AlN/AlGaN seed layer coalesces to form a flat-sheet-structured AlN/AlGaN seed layer, as also taught by Dechoux, thereby promoting wire growth according to the same polarity and/or promoting growth of the AlN/AlGaN seed layer ((104 and 108) of Chen) from the top of the island structure, rather than either the lateral sides thereof or the remainder of substrate (102 of Chen) of Chen in view of Shatalov, as additionally taught by Dechoux.
Response to Amendments and Arguments
Applicant’s amendment to the drawings and paragraph [0029] of the specification in the “Response To Advisory Action And Request For Continued Examination” filed on January 14, 2026 (hereinafter the “Response”) have overcome the objection to the drawings in the Final Office Action dated October 16, 2025 (hereinafter the “Final Office Action”). For clarity of the written record, in withdrawing the objection to the drawings, the Examiner is relying on Applicant’s statement on page seven (7) of the Response that no new matter has been added to the drawings and specification by these amendments thereto.
Also, Applicant’s amendment to independent claims 1 and 11 and statements on pages eight (8)-nine (9) of the Response (which the Examiner is relying on as being true) have overcome the rejection of claims 1-13 under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, in the Final Office Action. Additionally, Applicant’s amendment of independent claims 1 and 11 and remarks on pages nine (9)-ten (10) of the Response regarding the rejection thereof under 35 U.S.C. 103 in the Final Office Action have been fully considered. However, they are not deemed persuasive in light of the new grounds of rejection of amended independent claims 1 and 11, as detailed above in this Office Action.
Furthermore, Applicant’s arguments on page ten (10) of the Response regarding dependent claims 2-10, 12, and 13 have been fully considered. However, they are not deemed persuasive based on the grounds of rejection thereof detailed above in this Office Action.
Notwithstanding the above, to facilitate compact prosecution, the Examiner respectfully requests that Applicant please consider a telephone interview with the Examiner to discuss proposed claim amendments to overcome the current rejection of claims 1-13 in this Office Action. The Examiner would welcome such a discussion of these proposed amendments and is available at the number provided below.
Conclusion
Any inquiry concerning this communication or earlier communications from the Examiner should be directed to Erik A. Anderson whose telephone number is (703) 756-1217. The Examiner can normally be reached Monday-Friday 8:30 a.m.-4:30 p.m. (Pacific Time Zone).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, William B. Partridge, can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/ERIK A. ANDERSON/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
1 Please see, paragraph [0027] of the specification which states that AlN/AlGaN seed layer “may be a composite layer structure formed by stacking AlN layers and AlGaN layers).
2 Please see, paragraph [0027] of the specification which states that AlN/AlGaN seed layer “may be a composite layer structure formed by stacking AlN layers and AlGaN layers).
Prosecution Insights