Status of Claims
In the communication filed on 12/22/2025, claims 1-20 are pending. Claims 1, 9, 11-13, and 15-16 are amended. No claims are new. No claims are presently cancelled.
Response to Arguments
The prior objections to the Claims are withdrawn due to the amendments.
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the arguments do not apply to the combination of references being used in the current rejection.
The prior 103 rejections of the independent claims relied upon Tang et al. (US 2013/0214789 A1) in view of Izawa (US 2018/0024198 A1) and Li (US 2019/0056457 A1).
The current 103 rejections of the independent claims rely upon Ke (US 2013/0200850 A1) in view of Tang and Li. The newly-cited primary reference Ke teaches a typical battery monitoring and balancing circuit as widely seen in the prior art (similar to the instant application’s Fig. 1, labeled as “prior art”). Tang and Li are used to teach improvements (similar to the instant application’s Fig. 2A, depicting the independent claims’ subject matter). The examiner intends for this revised rejection to more clearly explain a circuit designer’s train of thought to arrive at the circuit structure of the independent claims.
It is noted that the independent claims 1, 9, and 16 each are amended to incorporate new subject matter (“a reference voltage between said third terminal and said fourth terminal”) that changes the claims’ scopes. Thus, this action is proper as a final rejection, necessitated by amendment.
Allowable Subject Matter
Claims 5-6, 11-12, and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The allowable subject matter of claims 5-6, 11-12, and 18-19 is indicated for the same reasons as is detailed in the prior office action (see Non-Final Rejection filed 08/28/2025).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-4 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Ke (US 2013/0200850 A1) in view of Tang et al. (US 2013/0214789 A1) and Li (US 2019/0056457 A1).
Regarding Claim 1, Ke discloses a battery monitoring circuit (“cell balancing circuit 300”; see annotated Fig. 3, included infra) comprising the following features.
Ke further discloses a bypath circuit (¶ [16]: “a first shunt path including a switch 301 and a resistor 311 is coupled to the cell CELL-A in parallel for enabling a shunt current for the cell CELL-A”) comprising a first terminal coupled to a positive terminal of a battery cell (CELL-A), and comprising a second terminal coupled to a negative terminal of said battery cell (CELL-A).
Ke further discloses a controller (“controller 320”, including “control unit 307”; Fig. 3), coupled (¶ [16]: “320 coupled to the first, second and third shunt paths”) to said bypath circuit (301 & 311).
Ke further discloses said controller (320) is configured to control turning on (¶ [17]: “if the cell CELL-A is detected to be unbalanced, the control unit 307 turns on the switch 301 to enable a shunt current to flow from a positive terminal of the cell CELL-A through the switch 301 and the resistor 311 to a negative terminal of the cell CELL-A”) and off (¶ [17]: “if the cell CELL-A becomes balanced at time Tl, e.g., the voltage difference between the cell CELL-A and another cell is reduced to below a predetermined threshold, the control unit 307 turns off the switch 301 … to disable the shunt current”) said bypath circuit (301 & 311).
Ke further discloses said controller (320) is configured to monitor a status (Fig. 6, step 605; ¶ [20]: “320 monitors cell voltage of each cell and balances any unbalanced cells, measures and stores the balance time of each cell”) of said battery cell (CELL-A) when a selected bypath circuit (301 & 311) is off (balancing is started in step 606, after step 605; thus, during step 605, the voltage of “CELL-A” is measured when “301” is off).
PNG
media_image1.png
886
1195
media_image1.png
Greyscale
Ke does not disclose “a resistive component comprising a third terminal and a fourth terminal, wherein said third terminal is coupled to said second terminal; a reference signal source, coupled to said fourth terminal, and configured to provide a reference signal to said resistive component to cause said resistive component to generate a reference voltage”.
As addressed supra, Ke discloses a controller coupled to said bypath circuit. However, Ke does not disclose the controller is also coupled to “said resistive component, and said reference signal source”.
As addressed supra, Ke discloses the controller is configured to control turning on and off said bypath circuit. However, Ke does not disclose the controller is also configured to control turning on and off “said reference signal source”.
As addressed supra, Ke discloses the controller is configured to monitor a status of a selected battery cell of said battery cells when a selected bypath circuit of said bypath circuits, coupled to said selected battery cell, is off. However, Ke does not disclose this monitoring occurs when the selected bypath circuit “and said reference signal source are off”.
Ke further does not disclose the controller “is further configured to sense a first test voltage between said first terminal of said bypath circuit and said fourth terminal of said resistive component when said bypath circuit and said reference signal source are on, and is further configured to generate a status signal indicative of an operating status of said battery monitoring circuit according to said first test voltage”.
As detailed infra, Tang teaches additional features to improve accuracy of a traditional battery monitoring/balancing circuit by incorporating a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell.
Tang teaches (see annotated Fig. 4, included infra) a resistive component (“resistor 332”; Fig. 4) comprising a third terminal (T2) and a fourth terminal (right side of “332”).
Tang further teaches said third terminal (T2) is coupled (through “273”) to said second terminal (S).
Tang further teaches a reference signal source (“current generator 260”, including “current sources 382 and 384”; Figs. 2, 4; ¶ [32]), coupled to said fourth terminal (“382” couples to the fourth terminal through “332”; further, “384” couples to the fourth terminal through “392”, “331”, and “342”; Fig. 4).
Tang further teaches said reference signal source (260) is configured to provide a reference signal (“compensation current Icomp2”; Figs. 2, 4; ¶ [53]) to said resistive component (“332”; current through “332” is sum of “Icons2” and “Icomp2”) to cause said resistive component (332) to generate a reference voltage (differential voltage across “332”; Fig. 4) between said third terminal (T2) and said fourth terminal (right side of “332”).
Tang further discloses a controller (“measurement circuit 240”, including “ADC 352” and “control circuit 362”; Figs. 2, 4), coupled to said bypath circuit (422, 271, & 331; ¶ [40]: “362 turns the switch 422 on and off”), said resistive component (“332”; Fig. 4 shows “240” couples to “332” through “342” and/or “344”), and said reference signal source (“260”; Fig. 2 shows “CTRL” signal from “240” to “260”).
Tang further teaches the controller (“240”, including “352” + “362”) is configured to control turning on and off said bypath circuit (422, 271, & 331; ¶ [40]: “362 turns the switch 422 on and off”) and said reference signal source (“260”; Fig. 7 shows detailed schematic of “260” wherein “Icomp1” and “Icomp2” can be turned on/off with MOSFETs “761-763” and “767-768”).
Tang further teaches the controller (240) is configured to monitor a status (“cell voltage”) of said battery cell (211) when said bypath circuit (422, 271, & 331) and said reference signal source (260) are off (¶ [58]: “when measuring the cell voltage for cell 211, … need not generate compensation currents Icomp1 and Icomp2 because the currents consumed by the level shifter 220 can be ignored”).
Tang further teaches said controller (240) is further configured to sense a first test voltage (differential input voltage to “342” is amplified to output “VOUTP” and then input to be sensed by “ADC 352”) between said first terminal (right side of “331”; see annotated Fig. 4) of said bypath circuit (422, 271, & 331) and said fourth terminal (right side of “332”; see annotated Fig. 4) of said resistive component (332) when said bypath circuit (422, 271, & 331) and said reference signal source (260) are on (per ¶ [43]: “VOUTP” is sensed while both “422” and “Icomp2” are on).
PNG
media_image2.png
989
1621
media_image2.png
Greyscale
Tang further teaches a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the battery monitoring circuit disclosed by Ke to incorporate a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell, as taught by Tang, to improve the accuracy of the cell voltage measurements.
Li teaches said controller (“battery management system (BMS) 204” including “fault detection circuitry 264”; Figs. 2A-2B; includes “detection circuits 208, 218, and 214” per ¶ [27]) is further configured to generate a status signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A; ¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) indicative of an operating status (¶ [26]: “264 can also detect whether an open circuit is present between the status detection circuitry 262 and the current sensor 258 based on the voltages of the pins ISP and ISN”) of said battery monitoring circuit (circuits of Figs. 2A-2B, except for “battery cells 202”) according to said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A).
Li further teaches the controller’s configuration to generate a status signal according to the first test voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the controller disclosed by the combo of Ke & Tang to be configured to generate a status signal according to the first test voltage, as taught by Li, to mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 2, the combo of Ke, Tang, & Li teaches the battery monitoring circuit of claim 1.
Ke further discloses said bypath circuit (301 & 311) comprises a balance circuit (301 & 311) configured to balance (¶ [17]: “if the cell CELL-A is detected to be unbalanced, the control unit 307 turns on the switch 301 to enable a shunt current to flow from a positive terminal of the cell CELL-A through the switch 301 and the resistor 311 to a negative terminal of the cell CELL-A”) a voltage of said battery cell (CELL-A) with voltages of a set of battery cells (CELL-B & CELL-C) coupled to said battery cell (CELL-A).
Regarding Claim 3, the combo of Ke, Tang, & Li teaches the battery monitoring circuit of claim 1.
The combo of Ke, Tang, & Li said reference signal source (incorporated from Tang: “current generator 260”, including “current sources 382 and 384”; Figs. 2, 4; ¶ [32]) comprises a current source (Tang: “current source 384”; Figs. 2, 4), and said reference signal (Tang: “compensation current Icomp2”; Fig. 4; ¶ [53]) provided by said reference signal source (Tang: “260”) comprises a current (Tang: “Icomp2”).
Regarding Claim 4, the combo of Ke, Tang, & Li teaches the battery monitoring circuit of claim 1.
The combo of Ke, Tang, & Li teaches said controller (Ke: “320”; modified per teachings of Tang & Li).
Ke does not disclose “said controller is configured to generate a monitoring circuit fault signal, comprised in said status signal, if said first test voltage is outside a safe range determined by said reference voltage, and wherein said monitoring circuit fault signal is indicative of a fault in said battery monitoring circuit”.
Li further teaches said controller (“battery management system (BMS) 204” including “fault detection circuitry 264”; Figs. 2A-2B; includes “detection circuits 208, 218, and 214” per ¶ [27]) is configured to generate a monitoring circuit fault signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A; ¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”), comprised in said status signal (228), if said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A) is outside a safe range (safe range per ¶ [40]: “if the first terminal ISP is well-connected … then a voltage VR1 … less than a third threshold TH3”) determined by said reference voltage (“VTH3” input to “comparator 570”; Fig. 5A; ¶ [41]: “if the output 228 indicates that the voltage VR1 on the first resistor R1 is greater than the third threshold TH3, then the control logic 226 determines than an open circuit is present at the first terminal ISP”).
Li further teaches said monitoring circuit fault signal (228) is indicative of a fault (¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) in said battery monitoring circuit (Figs. 2A-2B circuits, except for “202”; per ¶ [24], “ISP” is a pin on the “BMS 204”).
Li further teaches a monitoring circuit fault signal with criteria determined from said reference voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]) such as a disconnected pin of the BMS.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the controller disclosed by the combo of Ke, Tang, & Li to incorporate a monitoring circuit fault signal with criteria determined from said reference voltage, as further taught by Li, mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 7, the combo of Ke, Tang, & Li teaches the battery monitoring circuit of claim 1.
The combo of Ke, Tang, & Li teaches said controller (Ke: “320”; modified per teachings of Tang & Li).
Ke does not disclose “said controller comprises: a first level shifter comprising a first monitoring terminal coupled to said positive terminal through a first resistive component, and also comprising a second monitoring terminal coupled to said negative terminal through a second resistive component, and configured to sense a voltage of said battery cell by receiving a first current from said battery cell through said first resistive component; and a compensation circuit coupled to said negative terminal through said second resistive component, and configured to draw a second current from said battery cell through said second resistive component.”
Tang further teaches said controller (“measurement circuit 240”, including “ADC 352” and “control circuit 362”; Figs. 2, 4) comprises a first level shifter (“level shifter 220” including amplifiers “341” + “342”; Figs. 2, 4; see Fig. 4 - annotated, V02, included infra) comprising a first monitoring terminal (“T1”; Fig. 4) coupled to said positive terminal (“V+”; Figs. 2, 4) through a first resistive component (“231”; Fig. 4).
PNG
media_image3.png
907
1364
media_image3.png
Greyscale
Tang further teaches said first level shifter (220) also comprising a second monitoring terminal (“T2”; Fig. 4) coupled to said negative terminal (“V-”; Figs. 2, 4) through a second resistive component (“232”; Fig. 4).
Tang further teaches said first level shifter (220) is also configured to sense a voltage (per ¶ [32]: “VCELL” calculated from “VOUTP” and “VOUTN”, outputs from “220”) of said battery cell (211) by receiving a first current (“Icons1”; Fig. 4; “220” receives “Icons1” when “392” is off, disabling “Icomp1” as part of the calculation of “VCELL” per ¶ [32, 34, 41-42]) from said battery cell (211) through said first resistive component (231).
Tang further teaches a compensation circuit (“current generator 260”, which produces “Icomp1” and “Icomp2”; Fig. 4) coupled to said negative terminal (V-) through said second resistive component (232).
Tang further teaches said compensation circuit (260) is configured (the combination of current source “382” and current sink “384” draws the second current “Icons2” through “232”; Fig. 4) to draw a second current (“Icons2”; Fig. 4) from said battery cell (211) through said second resistive component (232).
Tang further teaches the first level shifter and the compensation circuit to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the controller disclosed by the combo of Ke, Tang, & Li to incorporate a first level shifter and a compensation circuit, as further taught by Tang, to improve the accuracy of the cell voltage measurements.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Ke (US 2013/0200850 A1) in view of Tang et al. (US 2013/0214789 A1), Li (US 2019/0056457 A1), and Li et al. (US 2009/0195213 A1, hereinafter “Li-2”).
Regarding Claim 8, the combo of Ke, Tang, & Li teaches the battery monitoring circuit of claim 7.
The combo of Ke, Tang, & Li teaches said compensation circuit (incorporated from Tang: “260”).
Ke does not disclose “said compensation circuit comprises a second level shifter configured to sense a voltage of an adjacent battery cell coupled in series to said battery cell by receiving a current from said adjacent battery cell through said second resistive component.”
Li-2 teaches said compensation circuit (“compensation circuit 330”; Figs. 3A-3B) comprises a second level shifter (“converter “338”; Fig. 3B) configured to sense a voltage of an adjacent battery cell (“cell 302_1”; Figs. 3A-3B) coupled in series to said battery cell (“cell 302_2”; Fig. 4) by receiving a current from said adjacent battery cell (positive input of “338” receives current from adjacent “cell 302_1”) through the connection from the negative terminal (connection between “302_1” and “302_2”) of the battery cell (302_2).
Li-2 further teaches the second level shifter in the compensation circuit to improve the accuracy (¶ [3]) of the cell voltage measurements by considering the adjacent cell voltage in the generation of the compensation current and reference voltage (¶ [31-32]). This approach reduces cost of the voltage trimming process (¶ [3]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the compensation circuit disclosed by the combo of Ke, Tang, and Li to incorporate a second level shifter in the compensation circuit, as taught by Li-2, to reduce the cost and improve the voltage measurement accuracy of the battery monitoring circuit.
Li-2 does not teach the current is received “through said second resistor”. However, Tang’s compensation circuit (260) is connected to both the battery cell (211) and the adjacent battery cell (212) through the second resistive component (232). Thus, the combination of Ke, Tang, Li, and Li-2 (as set forth supra) teaches that the compensation circuit (incorporated from Tang), including the second level shifter (incorporated from Li-2), receives a current from said adjacent battery cell (Tang: “212”) through said second resistive component (Tang: “232”).
Claims 9-10, 13, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Ke (US 2013/0200850 A1) in view of Tang et al. (US 2013/0214789 A1), Sugimura (US 2013/0069597 A1), and Li (US 2019/0056457 A1).
Regarding Claim 9, Ke discloses a battery pack (Fig. 3; ¶ [16]: “the battery pack can include any number of cells”; see annotated Fig. 3, included supra in claim 1 section) comprising a plurality of battery cells (CELL-A, CELL-B, CELL-C).
Ke further discloses a battery monitoring circuit (“cell balancing circuit 300”; Fig. 3), coupled to said battery cells (CELL-A, CELL-B, CELL-C), and configured to monitor (¶ [20]: “320 monitors cell voltage of each cell and balances any unbalanced cells, measures and stores the balance time of each cell”) said battery cells (CELL-A, CELL-B, CELL-C), said battery monitoring circuit (300) comprising the following features.
Ke further discloses a plurality of bypath circuits (¶ [16]: “a first shunt path including a switch 301 and a resistor 311 is coupled to the cell CELL-A in parallel for enabling a shunt current for the cell CELL-A”; ¶ [16]: “a second shunt path including a switch 302 and a resistor 312 is coupled to the cell CELL-B”; ¶ [16]: “a third shunt path including a switch 303 and a resistor 313 is coupled to the cell CELL-C”) coupled to said battery cells (CELL-A, CELL-B, CELL-C)
Ke further discloses each bypath circuit (see “first shunt path” including “301” & “311” for example) of said bypath circuits (301-303 & 311-313) comprises: a respective first terminal coupled to a positive terminal of a corresponding battery cell (CELL-A) of said battery cells, and a respective second terminal coupled to a negative terminal of said corresponding battery cell (CELL-A).
Ke further discloses a controller (“controller 320”, including “control unit 307”; Fig. 3), coupled (¶ [16]: “320 coupled to the first, second and third shunt paths”) to said bypath circuits (301-303 & 311-313).
Ke further discloses said controller (320) is configured to control turning on (¶ [17]: “if the cell CELL-A is detected to be unbalanced, the control unit 307 turns on the switch 301 to enable a shunt current to flow from a positive terminal of the cell CELL-A through the switch 301 and the resistor 311 to a negative terminal of the cell CELL-A”) and off (¶ [17]: “if the cell CELL-A becomes balanced at time Tl, e.g., the voltage difference between the cell CELL-A and another cell is reduced to below a predetermined threshold, the control unit 307 turns off the switch 301 … to disable the shunt current”) said bypath circuits (301-303 & 311-313).
Ke further discloses said controller (320) is configured to monitor a status (Fig. 6, step 605; ¶ [20]: “320 monitors cell voltage of each cell and balances any unbalanced cells, measures and stores the balance time of each cell”) of said battery cell (CELL-A) when a selected bypath circuit (¶ [16]: “a first shunt path including a switch 301 and a resistor 311 is coupled to the cell CELL-A in parallel for enabling a shunt current for the cell CELL-A”) of said bypath circuits (301-303 & 311-313), coupled to said selected battery cell (CELL-A), is off (balancing is started in step 606, after step 605; thus, during step 605, the voltage of “CELL-A” is measured when “301” is off).
Ke does not disclose “a plurality of resistive components coupled to said bypath circuits, wherein each resistive component of said resistive components comprises: a respective third terminal coupled to said second terminal of a corresponding bypath circuit of said bypath circuits, and a respective fourth terminal; a reference signal source, coupled to said respective fourth terminal of said each resistive component, and configured to provide a reference signal to a selected resistive component of said resistive components to cause said selected resistive component to generate a reference voltage between said respective third terminal and said respective fourth terminal”.
As addressed supra, Ke discloses a controller coupled to said bypath circuits. However, Ke does not disclose the controller is also coupled to “said resistive components, and said reference signal source”.
As addressed supra, Ke discloses the controller is configured to control turning on and off said bypath circuits. However, Ke does not disclose the controller is also configured to control turning on and off “said reference signal source”.
Ke further does not disclose the controller “is further configured to sense a first test voltage between said first terminal of said selected bypath circuit and said fourth terminal of said selected resistive component when said selected bypath circuit and said reference signal source are on, and further configured to generate a status signal indicative of an operating status of said battery monitoring circuit according to said first test voltage, and wherein said selected resistive component is coupled to said selected bypath circuit”.
Tang teaches each resistive component (“resistor 332”; Fig. 4) comprises a respective third terminal (“T2”; Fig. 4) coupled (through “273”) to said second terminal (S”) of a corresponding bypath circuit (“422” + “271” + “331”), and a respective fourth terminal (“382” couples to the fourth terminal through “332”; further, “384” couples to the fourth terminal through “392”, “331”, and “342”; Fig. 4).
Tang further teaches a reference signal source (“current generator 260”, including “current sources 382 and 384”; Figs. 2, 4; ¶ [32]), coupled to said respective fourth terminal (“382” couples to the fourth terminal through “332”; further, “384” couples to the fourth terminal through “392”, “331”, and “342”; Fig. 4) of said each resistive component (332).
Tang further teaches said reference signal source (260) is configured to provide a reference signal (“compensation current Icomp2”; Figs. 2, 4; ¶ [53]) to a selected resistive component (“332”; current through “332” is sum of “Icons2” and “Icomp2”) to cause said selected resistive component (332) to generate a reference voltage (differential voltage across “332”; Fig. 4) between said respective third terminal (T2) and said respective fourth terminal (right side of “332”).
Tang further discloses a controller (“measurement circuit 240”, including “ADC 352” and “control circuit 362”; Figs. 2, 4), coupled to said bypath circuit (“422” + “271” + “331”; ¶ [40]: “362 turns the switch 422 on and off”), said resistive component (“332”; Fig. 4 shows “240” couples to “332” through “342” and/or “344”), and said reference signal source (“260”; Fig. 2 shows “CTRL” signal from “240” to “260”).
Tang further discloses the controller (“240”, including “352” + “362”) is configured to control turning on and off said bypath circuit (422, 271, & 331; ¶ [40]: “362 turns the switch 422 on and off”) and said reference signal source (“260”; Fig. 7 shows detailed schematic of “260” wherein “Icomp1” and “Icomp2” can be turned on/off with MOSFETs “761-763” and “767-768”).
Tang further discloses said controller (240) is further configured to sense a first test voltage (differential input voltage to “342” is amplified to output “VOUTP” and then input to be sensed by “ADC 352”) between said first terminal (right side of “331”; see annotated Fig. 4) of said selected bypath circuit (422, 271, & 331) and said fourth terminal (right side of “332”; see annotated Fig. 4) of said selected resistive component (332) when said selected bypath circuit (422, 271, & 331) and said reference signal source (260) are on (per ¶ [43]: “VOUTP” is sensed while both “422” and “Icomp2” are on).
Tang further discloses said selected resistive component (332) is coupled (“332” is coupled to “331” by “342”; further, “332” coupled to “422” through “273”; Fig. 4) to said selected bypath circuit (422, 271, & 331).
Tang further teaches a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the battery monitoring circuit disclosed by Ke to incorporate a current source to produce a reference voltage across the selected resistive component connected to the negative terminal of the selected battery cell, as taught by Tang, to improve the accuracy of the cell voltage measurements.
Though the combo of Ke & Tang teaches a resistive component coupled to said bypath circuits, these references does not teach “a plurality of resistive component coupled to said bypath circuits”. Instead, Tang teaches a switch matrix/group instead of multiple resistive component circuits. However, it is well known in the art that a plurality of symmetrical resistive component paths may be used instead to reduce the number of switches and associated control complexity.
Sugimura teaches a battery monitoring circuit (Fig. 6) comprising a plurality of resistive components (“R” of Fig. 7A, each within “19n” of Fig. 6) coupled to said bypath circuits (“Rbaln” & “SWn”; Fig. 6), wherein each of the resistive components connects from the third terminal (to bypath circuit) to the fourth terminal (to monitoring components and reference signal source).
It is evident from the inspection of Sugimura’s Fig. 6 and Tang’s Fig. 2 that Sugimura’s battery monitoring circuit has significantly fewer switches due to the lack of a switch matrix/group and instead uses more resistors, which results in reduced control complexity.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the battery monitoring circuit disclosed by the combo of Ke & Tang to incorporate a plurality of resistive component coupled to said bypath circuits rather than a switch matrix, as taught by Sugimura, to reduce the number of switches and associated control complexity.
Li teaches said controller (“battery management system (BMS) 204” including “fault detection circuitry 264”; Figs. 2A-2B; includes “detection circuits 208, 218, and 214” per ¶ [27]) is further configured to generate a status signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A; ¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) indicative of an operating status (¶ [26]: “264 can also detect whether an open circuit is present between the status detection circuitry 262 and the current sensor 258 based on the voltages of the pins ISP and ISN”) of said battery monitoring circuit (circuits of Figs. 2A-2B, except for “battery cells 202”) according to said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A).
Li further teaches the controller’s configuration to generate a status signal according to the first test voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]).
It would have been obvious to one of ordinary skill in the art to modify the controller disclosed by the combo of Ke, Tang & Sugimura to be configured to generate a status signal according to the first test voltage, as taught by Li, to mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 10, the combo of Ke, Tang, Sugimura, and Li teaches the battery pack of claim 9.
The combo of Ke, Tang, Sugimura, & Li teaches said controller (Ke: “320”; modified per teachings of Tang & Li).
Ke does not disclose “said controller is configured to generate a monitoring circuit fault signal, comprised in said status signal, if said first test voltage is outside a safe range determined by said reference voltage, and wherein said monitoring circuit fault signal is indicative of a fault in said battery monitoring circuit”.
Li further teaches said controller (“battery management system (BMS) 204” including “fault detection circuitry 264”; Figs. 2A-2B; includes “detection circuits 208, 218, and 214” per ¶ [27]) is configured to generate a monitoring circuit fault signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A; ¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”), comprised in said status signal (228), if said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A) is outside a safe range (safe range per ¶ [40]: “if the first terminal ISP is well-connected … then a voltage VR1 … less than a third threshold TH3”) determined by said reference voltage (“VTH3” input to “comparator 570”; Fig. 5A; ¶ [41]: “if the output 228 indicates that the voltage VR1 on the first resistor R1 is greater than the third threshold TH3, then the control logic 226 determines than an open circuit is present at the first terminal ISP”).
Li further teaches said monitoring circuit fault signal (228) is indicative of a fault (¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) in said battery monitoring circuit (Figs. 2A-2B circuits, except for “202”; per ¶ [24], “ISP” is a pin on the “BMS 204”).
Li further teaches a monitoring circuit fault signal with criteria determined from said reference voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]) such as a disconnected pin of the BMS.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the controller disclosed by the combo of Ke, Tang, Sugimura, & Li to incorporate a monitoring circuit fault signal with criteria determined from said reference voltage, as further taught by Li, mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 13, the combo of Ke, Tang, Sugimura, and Li teaches the battery pack of claim 9.
The combo of Ke, Tang, Sugimura, & Li teaches said controller (Ke: “320”; modified per teachings of Tang & Li).
Ke does not disclose “said controller comprises: a first level shifter comprising a first monitoring terminal coupled to said positive terminal of said selected battery cell through a first resistive component, and also comprising a second monitoring terminal coupled to said negative terminal of said selected battery cell through a second resistive component, and configured to sense a voltage of said selected battery cell by receiving a first current from said selected battery cell through said first resistive component; and a compensation circuit coupled to said negative terminal of said selected battery cell through said second resistive component, and configured to draw a second current from said selected battery cell through said second resistive component.
Tang further teaches said controller (“measurement circuit 240”, including “ADC 352” and “control circuit 362”; Figs. 2, 4) comprises a first level shifter (“level shifter 220” including amplifiers “341” + “342”; Figs. 2, 4; see Fig. 4 - annotated, V02, included supra) comprising a first monitoring terminal (“T1”; Fig. 4) coupled to said positive terminal (“V+”; Figs. 2, 4) of said selected battery cell (211) through a first resistive component (“231”; Fig. 4).
Tang further teaches said first level shifter (220) also comprising a second monitoring terminal (“T2”; Fig. 4) coupled to said negative terminal (“V-”; Figs. 2, 4) of said selected battery cell (211) through a second resistive component (“232”; Fig. 4).
Tang further teaches said first level shifter (220) is also configured to sense a voltage (per ¶ [32]: “VCELL” calculated from “VOUTP” and “VOUTN”, outputs from “220”) of said selected battery cell (211) by receiving a first current (“Icons1”; Fig. 4; “220” receives “Icons1” when “392” is off, disabling “Icomp1” as part of the calculation of “VCELL” per ¶ [32, 34, 41-42]) from said selected battery cell (211) through said first resistive component (231).
Tang further teaches a compensation circuit (“current generator 260”, which produces “Icomp1” and “Icomp2”; Fig. 4) coupled to said negative terminal (V-) of said selected battery cell (211) through said second resistive component (232).
Tang further teaches said compensation circuit (260) is configured (the combination of current source “382” and current sink “384” draws the second current “Icons2” through “232”; Fig. 4) to draw a second current (“Icons2”; Fig. 4) from said selected battery cell (211) through said second resistive component (232).
Tang further teaches the first level shifter and the compensation circuit to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the controller disclosed by the combo of Ke, Tang, Sugimura, & Li to incorporate a first level shifter and a compensation circuit, as further taught by Tang, to improve the accuracy of the cell voltage measurements.
Regarding Claim 15, the combo of Ke, Tang, Sugimura, and Li teaches the battery pack of claim 9.
Ke further discloses said selected bypath circuit (301 & 311) comprises a balance circuit (301 & 311) configured to balance (¶ [17]: “if the cell CELL-A is detected to be unbalanced, the control unit 307 turns on the switch 301 to enable a shunt current to flow from a positive terminal of the cell CELL-A through the switch 301 and the resistor 311 to a negative terminal of the cell CELL-A”) a voltage of said selected battery cell (CELL-A) with voltages of other battery cells (CELL-B & CELL-C) of said plurality of battery cells (CELL-A, CELL-B, CELL-C).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Ke (US 2013/0200850 A1) in view of Tang et al. (US 2013/0214789 A1), Sugimura (US 2013/0069597 A1), Li (US 2019/0056457 A1), and Li et al. (US 2009/0195213 A1, hereinafter “Li-2”).
Regarding Claim 14, the combo of Ke, Tang, Sugimura, and Li teaches the battery pack of claim 13.
The combo of Ke, Tang, Sugimura, & Li teaches said compensation circuit (incorporated from Tang: “260”).
Ke does not disclose “said compensation circuit comprises a second level shifter configured to sense a voltage of an adjacent battery cell coupled in series to said selected battery cell by receiving a current from said adjacent battery cell through said second resistive component.”
Li-2 teaches said compensation circuit (“compensation circuit 330”; Figs. 3A-3B) comprises a second level shifter (“converter “338”; Fig. 3B) configured to sense a voltage of an adjacent battery cell (“cell 302_1”; Figs. 3A-3B) coupled in series to said selected battery cell (“cell 302_2”; Fig. 4) by receiving a current from said adjacent battery cell (positive input of “338” receives current from adjacent “cell 302_1”) through the connection from the negative terminal (connection between “302_1” and “302_2”) of the battery cell (302_2).
Li-2 further teaches the second level shifter in the compensation circuit to improve the accuracy (¶ [3]) of the cell voltage measurements by considering the adjacent cell voltage in the generation of the compensation current and reference voltage (¶ [31-32]). This approach reduces cost of the voltage trimming process (¶ [3]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the compensation circuit disclosed by the combo of Ke, Tang, Sugimura, & Li to incorporate a second level shifter in the compensation circuit, as taught by Li-2, to reduce the cost and improve the voltage measurement accuracy of the battery monitoring circuit.
Li-2 does not teach the current is received “through said second resistor”. However, Tang’s compensation circuit (260) is connected to both the battery cell (211) and the adjacent battery cell (212) through the second resistive component (232). Thus, the combination of Ke, Tang, Sugimura, Li, and Li-2 (as set forth supra) teaches that the compensation circuit (incorporated from Tang), including the second level shifter (incorporated from Li-2), receives a current from said adjacent battery cell (Tang: “212”) through said second resistive component (Tang: “232”).
Claims 16-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Ke (US 2013/0200850 A1) in view of Tang et al. (US 2013/0214789 A1) and Li (US 2019/0056457 A1).
Regarding Claim 16, Ke discloses a method (¶ [6]: “method for balancing multiple cells of a battery … monitoring an unbalanced condition of the first cell”) for monitoring a battery (Fig. 3; ¶ [16]: “the battery pack can include any number of cells”; see annotated Fig. 3, included supra in claim 1 section), said method comprising the following.
Ke further discloses controlling (via “controller 320”, including “control unit 307”; Fig. 3) turning on (¶ [17]: “if the cell CELL-A is detected to be unbalanced, the control unit 307 turns on the switch 301 to enable a shunt current to flow from a positive terminal of the cell CELL-A through the switch 301 and the resistor 311 to a negative terminal of the cell CELL-A”) and off (¶ [17]: “if the cell CELL-A becomes balanced at time Tl, e.g., the voltage difference between the cell CELL-A and another cell is reduced to below a predetermined threshold, the control unit 307 turns off the switch 301 … to disable the shunt current”) a bypath circuit (¶ [16]: “a first shunt path including a switch 301 and a resistor 311 is coupled to the cell CELL-A in parallel for enabling a shunt current for the cell CELL-A”) of a battery monitoring circuit (“cell balancing circuit 300”; Fig. 3).
Ke further discloses said bypath circuit (301 & 311) comprises a first terminal coupled to a positive terminal of a battery cell (CELL-A), and comprises a second terminal coupled to a negative terminal of said battery cell (CELL-A).
Ke further discloses monitoring a status (Fig. 6, step 605; ¶ [20]: “320 monitors cell voltage of each cell and balances any unbalanced cells, measures and stores the balance time of each cell”) of said battery cell (CELL-A) when said bypath circuit (301 & 311) is off (balancing is started in step 606, after step 605; thus, during step 605, the voltage of “CELL-A” is measured when “301” is off).
As addressed supra, Ke discloses controlling turning on and off said bypath circuit. However, Ke does not disclose controlling turning on and off “a reference signal source”.
Ke further does not disclose “providing, using said reference signal source, a reference signal to a resistive component of said battery monitoring circuit, to cause said resistive component to generate a reference voltage between a third terminal of said resistive component and a fourth terminal of said resistive component, wherein said third terminal is coupled to said second terminal of said bypath circuit, and wherein said fourth terminal is coupled to said reference signal source”.
As addressed supra, Ke discloses monitoring a status of said battery cell when said bypath circuit is off, coupled to said selected battery cell. However, Ke does not disclose this monitoring occurs when said bypath circuit “and said reference signal source are off”.
Ke further does not disclose “sensing a first test voltage between said first terminal and said fourth terminal when said bypath circuit and said reference signal source are on; and generating a status signal indicative of an operating status of said battery monitoring circuit according to said first test voltage.”
Tang further discloses controlling (via “240”, including “352” + “362”; Fig. 4) turning on and off a bypath circuit (combo of “422”, “271”, and “331”; Fig. 4) and a reference signal source (“current generator 260” in Figs. 2, 4; Fig. 7 shows detailed schematic of “260” wherein “Icomp1” and “Icomp2” can be turned on/off with MOSFETs “761-763” and “767-768”) of a battery monitoring circuit (majority of “200”, except for “210”; “200” shown in full in Fig. 2; detailed circuit “400” for single cell “211” shown in Fig. 4).
a negative terminal (“V-”) of said battery cell (“211”).
Tang further discloses providing, using said reference signal source (260), a reference signal (“compensation current Icomp2”; Figs. 2, 4; ¶ [53]) to a resistive component (“resistor 332”; Fig. 4) of said battery monitoring circuit (Figs. 2, 4), to cause said resistive component (332) to generate a reference voltage (differential voltage across “332”; Fig. 4) between a third terminal (T2) of said resistive component (332) and a fourth terminal (right side of “332”) of said resistive component (332)
Tang further teaches said third terminal (T2) is coupled (through “273”) to said second terminal (S) of said bypath circuit (422, 271, & 331).
Tang further teaches said fourth terminal (right side of “332”; see annotated Fig. 4) is coupled to said reference signal source (“260” including “382” + “384”; “382” couples to the fourth terminal through “332”; further, “384” couples to the fourth terminal through “392”, “331”, and “342”; Fig. 4).
Tang further teaches sensing (via controller “240”, including “352” + “362”; Fig. 4) a first test voltage (differential input voltage to “342” is amplified to output “VOUTP” and then input to be sensed by “ADC 352”) between said first terminal (right side of “331”; see annotated Fig. 4) and said fourth terminal (right side of “332”; see annotated Fig. 4) when said bypath circuit (422, 271, & 331) and said reference signal source (260) are on (per ¶ [43]: “VOUTP” is sensed while both “422” and “Icomp2” are on).
Tang further teaches a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method disclosed by Ke to incorporate a current source to produce a reference voltage across a resistor connected to the negative terminal of the battery cell, as taught by Tang, to improve the accuracy of the cell voltage measurements.
Li teaches generating a status signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A; ¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) indicative of an operating status (¶ [26]: “264 can also detect whether an open circuit is present between the status detection circuitry 262 and the current sensor 258 based on the voltages of the pins ISP and ISN”) of said battery monitoring circuit (circuits of Figs. 2A-2B, except for “battery cells 202”) according to said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A).
Li further teaches generating a status signal according to the first test voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method disclosed by the combo of Ke & Tang to generate a status signal according to the first test voltage, as taught by Li, to mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 17, the combo of Ke, Tang, & Li teaches the method of claim 16.
Li teaches said status signal (“output 228” from “(VR1, VR2) detection circuit 214”; Figs. 2B, 5A) comprises a monitoring circuit fault signal (228) indicative of a fault (¶ [41]: “output 228 indicates … that an open circuit is present at the first terminal ISP”) in said battery monitoring circuit (Figs. 2A-2B circuits, except for “202”; per ¶ [24], “ISP” is a pin on the “BMS 204”).
Li further teaches said method (Fig. 8; ¶ [16, 61-67]) further comprises generating (from “(VR1, VR2) detection circuit 214”) said monitoring circuit fault signal (“228”) if said first test voltage (“VR1”, voltage of pin “ISP”; Figs. 2A-2B, 5A) is outside a safe range (safe range per ¶ [40]: “if the first terminal ISP is well-connected … then a voltage VR1 … less than a third threshold TH3”) determined by said reference voltage (“VTH3” input to “comparator 570”; Fig. 5A; ¶ [41]: “if the output 228 indicates that the voltage VR1 on the first resistor R1 is greater than the third threshold TH3, then the control logic 226 determines than an open circuit is present at the first terminal ISP”).
Li further teaches generating a monitoring circuit fault signal with criteria determined from said reference voltage to mitigate the risk of damage to the battery pack that arises if there is a fault in the battery monitoring circuit (¶ [2, 5]) such as a disconnected pin of the BMS.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method disclosed by the combo of Ke, Tang, & Li to generate a monitoring circuit fault signal with criteria determined from said reference voltage, as further taught by Li, mitigate the risk of damage to the battery pack from a fault in the battery monitoring circuit.
Regarding Claim 20, the combo of Ke, Tang, & Li teaches the method of claim 16.
Ke does not disclose “sensing, using a first level shifter, a voltage of said battery cell by receiving a first current from said battery cell through a first resistive component, wherein said first level shifter comprises a first monitoring terminal coupled to said positive terminal of said battery through said first resistive component, and also comprises a second monitoring terminal coupled to said negative terminal of said battery cell through a second resistive component; and drawing, using a compensation circuit, a second current from said battery cell through said second resistive component, wherein said compensation circuit is coupled to said negative terminal of said battery cell through said second resistive component.”
Tang further teaches sensing (Fig. 9, step 910), using a first level shifter (“level shifter 220” including amplifiers “341” + “342”; Figs. 2, 4; see Fig. 4 - annotated, V02, included supra), a voltage (per ¶ [32]: “VCELL” calculated from “VOUTP” and “VOUTN”, outputs from “220”) of said battery cell (211) by receiving a first current (“Icons1”; Fig. 4; “220” receives “Icons1” when “392” is off, disabling “Icomp1” as part of the calculation of “VCELL” per ¶ [32, 34, 41-42]) from said battery cell (211) through a first resistive component (“231”; Fig. 4).
Tang further teaches said first level shifter (220) comprises a first monitoring terminal (“T1”; Fig. 4) coupled to said positive terminal (“V+”; Figs. 2, 4) through said first resistive component (231).
Tang further discloses said first level shifter (220) also comprises a second monitoring terminal (“T2”; Fig. 4) coupled to said negative terminal (“V-”; Figs. 2, 4) of said battery cell (211) through a second resistive component (“232”; Fig. 4).
Tang further teaches drawing (the combination of current source “382” and current sink “384” draws the second current “Icons2” through “232”; Fig. 4), using a compensation circuit (“current generator 260”, which produces “Icomp1” and “Icomp2”; Fig. 4), a second current (“Icons2”; Fig. 4) from said battery cell (211) through said second resistive component (232).
Tang further teaches said compensation circuit (260) is coupled to said negative terminal (V-) of said battery cell (211) through said second resistive component (232).
Tang further teaches the first level shifter and the compensation circuit to improve the accuracy of the cell voltage measurements (¶ [3-4, 29, 45]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method disclosed by the combo of Ke, Tang, & Li to incorporate a first level shifter and a compensation circuit, as further taught by Tang, to improve the accuracy of the cell voltage measurements.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Daniel P McFarland whose telephone number is (571)272-5952. The examiner can normally be reached Monday-Friday, 7:30 AM - 4:00 PM Eastern.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DANIEL P MCFARLAND/ Examiner, Art Unit 2859
/DREW A DUNN/ Supervisory Patent Examiner, Art Unit 2859
Prosecution Insights