Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
The present application is a continuation of provisional application no. 63/284,775 as filed on 12/01/2021, as required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 04/11/2023 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Objections
Claim 3 is objected to because of the following informalities: Appropriate correction is required. Claim 3 recites “The arrangement of method of claim 2” which implies claim 2 is a method. For the purpose of examination, examiner interpret all limitations as “The arrangement of claim 2” Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “recent” in claim 1 is a relative term which renders the claim indefinite. The term “resent” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claims 2 – 5 are rejected as they are being directly or indirectly dependent upon rejected claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Rodrigues (US 20210097378 A1) in view of Nagano (US 4149143 A) further in view of Pérez-López (NPL: Multipurpose self-configuration of programmable photonic circuits) further in view of Gunjal (US 20200296172 A1)
Regarding claim 1, Rodrigues teaches input circuitry configured to receive analog sensor signals; (0052): The connection between the optical fiber 360 and the apparatus 140 may be a fiber to silicon photonics waveguide transition, a fiber-to-fiber connection, a tapered waveguide, or another suitable pathway that maintains the optical signal 110 as an analog optical signal and that is generally dependent on an implementation of the ONN 160 (e.g., photonic integrated circuit (PIC), fiber bundle, etc.) and/or the apparatus 140. (0034): Accordingly, the optical input 120 maintains the optical signal 110 as an analog light wave as represented by the darkened connections between the various components.
optical conversion circuitry configured to convert the analog sensor signals into analog optical sensor signals (0052): The connection between the optical fiber 360 and the apparatus 140 may be a fiber to silicon photonics waveguide transition, a fiber-to-fiber connection, a tapered waveguide, or another suitable pathway that maintains the optical signal 110 as an analog optical signal and that is generally dependent on an implementation of the ONN 160 (e.g., photonic integrated circuit (PIC) [optical conversion circuitry], fiber bundle, etc.) and/or the apparatus 140. (0034): Accordingly, the optical input 120 maintains the optical signal 110 as an analog light wave as represented by the darkened connections between the various components. [analog sensor signals into analog optical sensor signals]
the silicon photonic recurrent neural network configured to receive as input the analog optical sensor signals and transform the analog optical sensor signals with (0052): The connection between the optical fiber 360 and the apparatus 140 may be a fiber to silicon photonics [silicon photonic] waveguide transition, a fiber-to-fiber connection, a tapered waveguide, or another suitable pathway that maintains the optical signal 110 as an analog optical signal and that is generally dependent on an implementation of the ONN 160 (e.g., photonic integrated circuit (PIC), fiber bundle, etc.) and/or the apparatus 140. (0053): In general, the ONN 160 can include a combination of the noted elements in particular arrangements to achieve the functionality of artificial neural networks (ANNs) such as convolutional neural networks, recurrent neural networks [recurrent neural network] (0034): Accordingly, the optical input 120 maintains the optical signal 110 as an analog light wave as represented by the darkened connections between the various components. (0080): Thus, the modular network components can be inserted into any of 700, 710, 720, and 800 to form multi-system optical neural networks where nonlinear activation can be processed intermediately [followed by a nonlinear transformation] (e.g., RELU or another nonlinear activator). (0045): Consequently, the ONN 160 can further include photoreceivers at an output layer that convert the result produced by the ONN 160 [output the transformed analog optical sensor signals] into an electronic form for subsequent processing by the computing device 170…Thus, the photonic apparatus 100 maintains the optical signal 110 as an analog optical signal throughout an optical pathway [analog optical] including reception in the apparatus 100 and processing of the optical signal 110 by the ONN 160 and any potentially inserted modular network components.
Rodrigues does not teach digital conversion circuitry configured to receive and digitize the transformed analog optical sensor signals and output the digitized transformed analog optical sensor signals to digital control circuitry;
Nagano teaches digital conversion circuitry configured to receive and digitize the transformed analog optical sensor signals and output the digitized transformed analog optical sensor signals to digital control circuitry; (C8:L42-44): has a linear relationship with the optical signal, as introduced in the input terminal [input the analog optical sensor signals] (C14:L25-31): The signal VPEAK formed based on the fifth optical signal is kept of the said level, and during that period the signals Z and SELECTB applied to the data selector 1-7 are all logic zeros so that the signals obtained from the output terminals Q1, Q2, . . . Q6 of the analog-digital [digitize the transformed analog optical sensor signals] control circuit [digital control circuitry] 1-6 are applied to the inputs [configured to receive] of the 6-bit digital-analog converter 1-8. (C3:L59-64 & Fig. 1): An analog-digital control circuit 1-6 is structured to be responsive to the analog-digital control clock signals SAD and TAD from the pulse generator 1-2 and a control signal CO1 from the comparator 1-9 to transfer the 6-bit outputs Q1, Q2, . . . Q6 [output the digitized transformed]
Accordingly, it would have been obvious to a person having ordinary skill in the art
before the effective filing date of the claimed invention, having the teaching of Rodrigues and Nagano before them, to include Nagano’s digital conversion circuitry which would allow Rodrigues’s convert the received analog sensor signal to an optical analog sensor signal. One would have been motivated to make such a combination in order to provide an improved image sensor output correcting system to the provided video signal while also providing high speed scanning operation without degrading the correction function, as suggested by Nagano (US 4149143 A) (C1:L64-3)
Rodrigues and Nagano do not teach the digital control circuitry configured to receive as input the digitized transformed analog optical sensor signals and output actuator control signals in response to the digitized transformed analog optical sensor signals input.
Pérez-López teaches the digital control circuitry configured to receive as input the digitized transformed analog optical sensor signals and output actuator control signals in response to the digitized transformed analog optical sensor signals input. (P2:C2): The FPPGA main architecture shown in Fig. 1b includes the core, several high-performance blocks (HPBs) and optical input [input analog optical sensor signals]/output ports (P9:C1): When dealing with a real system, this vector can represent the electrical signal feeding each phase actuator or photonic actuator in general (P8:C1): In addition, a significant challenge resides in the efficient management of control circuit complexity (P2: Figure 1, D): electronic control subsystem, signals and software procedures to control the programmable photonic integrated circuit [control signals in response to the digitized transformed analog optical sensor signals input] (P3:C1): In this work, all the reported methods employ the closed loop control system illustrated in Fig. 1d. It includes an electrical IC to read a signal proportional to the optical power at every external optical port in the circuit (Np), an electronic processor to run the algorithms and a driving circuitry to configure the phases at every TBU [actuator], described by the vector v
Accordingly, it would have been obvious to a person having ordinary skill in the art
before the effective filing date of the claimed invention, having the teaching of Rodrigues, Nagano and Pérez-López before them, to include Pérez-López’s actuator control signal which would allow Rodrigues and Nagano’s to interface with an actuator. One would have been motivated to make such a combination in order to set an optimized initial point for some optimization methods and enhancing their convergence, as suggested by Pérez-López (NPL: Multipurpose self-configuration of programmable photonic circuits) (P5:C1)
Rodrigues, Nagano, and Pérez-López do not teach temporal correlation of the input with its recent past
Gunjal teaches temporal correlation of the input with its recent past (0051): At step 680, for each node/microservice (and/or its neighbors) that underwent changes in the recent past (LN * Tm, where LN is the estimated number of iterations required to relearn the temporal patterns), the process marks the nodes as tainted, discards the predictions, and resets the learning models of the respective nodes.
Accordingly, it would have been obvious to a person having ordinary skill in the art
before the effective filing date of the claimed invention, having the teaching of Rodrigues, Nagano, Pérez-López, and Gunjal before them, to include Gunjal’s temporal correlation with its recent past which would allow Rodrigues, Nagano and Pérez-López’s to improve time series modeling. One would have been motivated to make such a combination in order prune marked nodes from the prediction model and reset the learning model of the respective nodes for return data, as suggested by Gunjal (US 20200296172 A1) (0051)
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Rodrigues (US 20210097378 A1) in view of Nagano (US 4149143 A) further in view of Pérez-López (NPL: Multipurpose self-configuration of programmable photonic circuits) further in view of Gunjal (US 20200296172 A1) further in view of HAMERLY (US 20230274156 A1)
Regarding claim 2, Rodrigues, Nagano, and Pérez-López. Rodrigues teaches the system of claim 1, wherein the silicon photonic recurrent neural network (0052): The connection between the optical fiber 360 and the apparatus 140 may be a fiber to silicon photonics [silicon] waveguide transition, a fiber-to-fiber connection, a tapered waveguide, or another suitable pathway that maintains the optical signal 110 as an analog optical signal and that is generally dependent on an implementation of the ONN 160 (e.g., photonic integrated circuit (PIC), fiber bundle, etc.) and/or the apparatus 140. (0053): In general, the ONN 160 can include a combination of the noted elements in particular arrangements to achieve the functionality of artificial neural networks (ANNs) such as convolutional neural networks, recurrent neural networks [recurrent neural network]
Rodrigues, Nagano, and Pérez-López do not teach a micro-ring weight bank (MWB), a balanced photodetector (BPD) and a micro-ring modulator neuron of which an output is optically connected to an input of the MWB.
HAMERLY teaches a micro-ring weight bank (MWB), a balanced photodetector (BPD) and a micro-ring modulator neuron of which an output is optically connected to an input of the MWB. (0044): Again, the server 110 includes a broadband WDM source 111 that emits an optical carrier with multiple channels, such as an optical frequency comb, and is coupled to a weight bank of micro-ring [micro-ring weight bank] (or disk) modulators [micro-ring modulator] (0066): Ring resonators 134 filter each WDM channel for detection by balanced photodetectors [balanced photodetector] 435 as described above. (0039): whose input is optically coupled to the light source 111 and whose outputs are coupled to input ports of a polarizing beam splitter [output is optically connected to an input of the MWB]
Accordingly, it would have been obvious to a person having ordinary skill in the art
before the effective filing date of the claimed invention, having the teaching of Rodrigues, Nagano, Pérez-López, Gunjal, and HAMERLY before them, to include HAMERLY’s micro-ring which would allow Rodrigues, Nagano, Pérez-López and Gunjal’s to filter and modulate data. One would have been motivated to make such a combination in order to improve performance and reduce energy consumption, as suggested by HAMERLY (US 20230274156 A1) (0052 & 0102)
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Rodrigues (US 20210097378 A1) in view of Nagano (US 4149143 A) further in view of Pérez-López (NPL: Multipurpose self-configuration of programmable photonic circuits) further in view of Gunjal (US 20200296172 A1) further in view of HAMERLY (US 20230274156 A1) further in view of Larger (NPL: High-Speed Photonic Reservoir Computing Using a Time-Delay-Based Architecture: Million Words per Second Classification)
Regarding claim 3, Rodrigues, Nagano, Pérez-López and HAMERLY. Rodrigues teaches the system of claim 2, wherein the silicon photonic recurrent neural network (0052): The connection between the optical fiber 360 and the apparatus 140 may be a fiber to silicon photonics [silicon] waveguide transition, a fiber-to-fiber connection, a tapered waveguide, or another suitable pathway that maintains the optical signal 110 as an analog optical signal and that is generally dependent on an implementation of the ONN 160 (e.g., photonic integrated circuit (PIC), fiber bundle, etc.) and/or the apparatus 140. (0053): In general, the ONN 160 can include a combination of the noted elements in particular arrangements to achieve the functionality of artificial neural networks (ANNs) such as convolutional neural networks, recurrent neural networks [recurrent neural network]
Rodrigues, Nagano, Pérez-López and HAMERLY do not teach a single node time delayed reservoir.
Larger teaches a single node time delayed reservoir. (P4:S2B:C1): Practically, this offers enhanced correlation-length capabilities (or “memory”) for the reservoir, up to several time delays [time delayed reservoir]. Instead of a 1∶1 [a single node] (i.e. one input to one node) spanning of each input sample over all the K nodes of a time delay
Accordingly, it would have been obvious to a person having ordinary skill in the art
before the effective filing date of the claimed invention, having the teaching of Rodrigues, Nagano, Pérez-López, Gunjal, HAMERLY and Larger before them, to include Larger’s time delayed reservoir would allow Rodrigues, Nagano, Pérez-López, Gunjal and Larger’s to create virtual nodes. One would have been motivated to make such a combination in order to improve the performance of memory topology and providing optimal scaling, as suggested by Larger (NPL: High-Speed Photonic Reservoir Computing Using a Time-Delay-Based Architecture: Million Words per Second Classification) (P11:S5B:C2)
Allowable Subject Matter
Claims 4 & 5 are objected to as being dependent upon a rejected base claim, but would be allowable upon proper overcome of the 112 rejection as discussed above and if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 4, the prior art of record, discloses or reasonably the silicon photonic recurrent neural network comprises a plurality of photonic recurrent neural network neurons defined by the following relationship:
PNG
media_image1.png
48
454
media_image1.png
Greyscale
where s is the neuron's state which is the current injected to a modulator neuron, y is an output optical signal, r is a time constant of a photonic circuit forming the neuron, Whn is a feedback weight, Wil is an input coupling weight, and a(.) is a transfer function of silicon photonic modulator neurons.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE ALLMAN THOMPSON whose telephone number is (571)272-3671. The examiner can normally be reached Monday - Thursday, 6 a.m. - 3 p.m. ET..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kamran Afshar can be reached at (571) 272-7796. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/K.A.T./Examiner, Art Unit 2125
/KAMRAN AFSHAR/Supervisory Patent Examiner, Art Unit 2125
Prosecution Insights