DETAILED ACTION
This office action is in response to amendment filed on 5/29/2026.
Claims 1 – 5, 8, 9, 11 – 15 and 18 – 20 are amended.
Claims 1 – 20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 – 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sindu et al (US 20190012278, hereinafter Sindu), in view of He et al (US 20210105862, hereinafter He), and further in view of Hefty (US 20130262613).
As per claim 1, Sindu discloses: A networking device, comprising:
a first processor to perform compute tasks associated with an operation, wherein the first processor is in communication with a fabric of accelerators performing the operation via a first interface; (Sindhu figure 1B: CPU 104; [0024]: “Similarly, GPU rack 22 may host a number of GPU blades 23 or other compute nodes that are designed to operate under the direction of a CPU or a DPU for performing complex mathematical and graphical operations better suited for GPUs.”.)
and a second processor to perform control plane tasks associated with the operation, wherein the control plane tasks performed by the second processor relieve the first processor from responsibilities of performing the control plane tasks associated with the operation. (Sindhu figure 1B and [0043]: “compute node 100A includes data processing unit (DPU) 102A… DPU 102A also acts as a network interface for compute node 100A to network 120A”; [0045]: “DPU 102A provides access between network 120A, storage device 114, GPU 106, and CPU 104. In other examples, such as in FIGS. 2 and 3 as discussed in greater detail below, a DPU such as DPU 102A may aggregate and process network and SSD I/O to multiple server devices. In this manner, DPU 102A is configured to retrieve data from storage device 114 on behalf of CPU 104, store data to storage device 114 on behalf of CPU 104, and retrieve data from network 120A on behalf of CPU 104”.)
Sindu did not explicitly disclose:
the control plane tasks offloaded to the second processor by the first processor via a second interface;
wherein the control plane tasks comprise a subnet management function and a global fabric management function for the fabric of accelerators, and wherein the second processor executes the subnet management function and the global fabric management function to manage operation of the fabric of accelerators.
However, He (US 20210105862) teaches:
the control plane tasks offloaded to the second processor by the first processor via a second interface; (He [0008]: “The slave UE establishes an attachment to a core network of a cellular communications system, and obtains a set of security credentials configured to encrypt and decrypt traffic between the slave UE and the core network. The slave UE establishes a D2D connection with a master UE that is also attached to the core network. The slave UE offloads, from the slave UE to the master UE, one or more communication functions including at least one communication function with the core network for maintaining the attachment of the slave UE to the core network, the one or more offloaded communication functions including transport of control plane signaling associated with the slave UE's set of security credentials. The slave UE exchanges application-layer data that is relayed by the master UE over the D2D connection and is targeted to or received from an application server.”)
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of He into that of Sindu in order to the control plane tasks offloaded to the second processor by the first processor via a second interface. Sindhu teaches the DPU provided services for the CPU. One of ordinary skill in the art can see that the control plane tasks of DPU should be offloaded from the CPU first, such as demonstrated in He reference, applicants thus have merely claimed the combination of known parts in the field to achieve predictable results and is therefore rejected under 35 USC 103.
Hefty teaches:
wherein the control plane tasks comprise a subnet management function and a global fabric management function for the fabric of accelerators, and wherein the second processor executes the subnet management function and the global fabric management function to manage operation of the fabric of accelerators. (Hefty figure 1 and [0015]. Examiner notes SM116 is mapped to the claimed second processor.)
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Hefty into that of Sindu and He in order to have the control plane tasks comprise a subnet management function and a global fabric management function for the fabric of accelerators, and wherein the second processor executes the subnet management function and the global fabric management function to manage operation of the fabric of accelerators. Sindhu teaches the DPU provided services for the CPU. Hefty has shown that the claimed limitations are merely commonly known control plane tasks that can be performed by a subnet manager, applicants thus have merely claimed the combination of known parts in the field to achieve predictable results and is therefore rejected under 35 USC 103.
As per claim 2, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the second processor is in communication with the fabric of accelerators performing the operation via a third interface. (Sindhu figure 1B and [0043]: PCI-e bus 118; also figure 1A: GPU rack 22.)
As per claim 3, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the subnet management function and the global fabric management function comprise one or more of topology discovery, link training, port identifier assignment, port management, and routing for the fabric of accelerators. (Hefty figure 1 and [0015].)
As per claim 4, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the second processor coordinates control plane tasks performed by the second processor coordinate aspects associated with the fabric of accelerators performing a task for the first processor the operation. (Sindhu [0045] – [0046].)
As per claim 5, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the first processor comprises a CPU connected to the fabric of accelerators performing the operation via the first interface. (Sindhu figure 1B and [0043].)
As per claim 6, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the second processor comprises a data processing unit (DPU), the DPU comprising a processor and a network interface card. (Sindhu figure 1B and [0043].)
As per claim 7, the combination of Sindu, He and Hefty further teach:
The networking device of claim 6, wherein the DPU receives configuration setting data from a user via the first processor. (Sindhu [0039].)
As per claim 8, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the second processor adjusts the execution of the fabric management operations in response to configuration setting data received from a user. (Sindhu [0039] – [0040].)
As per claim 9, the combination of Sindu, He and Hefty further teach:
The networking device of claim 1, wherein the second processor is in communication with the fabric of accelerators performing the operation via one or more of InfiniBand and Ethernet interfaces. (Sindhu figure 1B and [0043].)
As per claim 10, the combination of Sindu, He and Hefty further teach:
The networking device of claim 9, wherein the fabric executes an artificial intelligence engine. (Sindhu [0056].)
As per claim 11, it claims substantially similar limitation as claim 1 and is therefore rejected under the same rationale.
As per claim 12, it claims substantially similar limitation as claim 2 and is therefore rejected under the same rationale.
As per claim 13, it claims substantially similar limitation as claim 3 and is therefore rejected under the same rationale.
As per claim 14, it claims substantially similar limitation as claim 4 and is therefore rejected under the same rationale.
As per claim 15, it claims substantially similar limitation as claim 5 and is therefore rejected under the same rationale.
As per claim 16, it claims substantially similar limitation as claim 6 and is therefore rejected under the same rationale.
As per claim 17, it claims substantially similar limitation as claim 7 and is therefore rejected under the same rationale.
As per claim 18, it claims substantially similar limitation as claim 8 and is therefore rejected under the same rationale.
As per claim 19, it is the method variant of claim 1 and is therefore rejected under the same rationale.
As per claim 20, it is the method variant of claim 2 and is therefore rejected under the same rationale.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 – 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLES M SWIFT whose telephone number is (571)270-7756. The examiner can normally be reached Monday - Friday: 9:30 AM - 7PM.
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/CHARLES M SWIFT/Primary Examiner, Art Unit 2196
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