DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 2-7, 9-14 are objected to because of the following informalities:
Claims 3, 10 appears to have an error for “store corresponding the data addresses”, changing to “store the corresponding data addresses” is suggested.
Claims 4, 11 appears to have errors for “smallest the negative value” and “largest the negative value”, either changing to “of the negative value” or removing “the” is suggested.
Claims 2-7, 9-14 line 1 change “computing an inner product” to “computing the inner product”.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: MAC module in claims 1, 8.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
As to claim 1, 8’s MAC module, the examiner interprets the means plus function limitation to the corresponding structure: multiplier and accumulator as disclosed in Fig. 5 element 160 and the first paragraph of pg. 17 of the applicant’s specification.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-14 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Regarding claim 1, at Step 1, the claim is directed to a device, which is a statutory category of invention (Machine).
At Step 2A Prong 1, Examiner notes that the claims are directed towards an abstract idea. The claim language has been reproduced below:
A device for computing an inner product comprising: a data memory configured to store a plurality of data groups, wherein each of the plurality of data groups comprises data values (mathematical relationship);
an inverted index memory (IIM) configured to store a data address and a corresponding weight index value of each of the plurality of data groups in the data memory;
a weight mapping table configured to store a weight value corresponding to the weight index value (mathematical relationship);
a controller electrically connected to the data memory, the IIM, and the weight mapping table, wherein the controller is configured to sequentially obtain the data addresses and the corresponding weight index values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and driving the weight mapping table to sequentially output the weight values corresponding to the weight index values;
a pre-accumulator electrically connected to the data memory, wherein the pre-accumulator is configured to receive and accumulate the data values of each of the plurality of data groups to generate accumulation values (mathematical calculation);
and a multiplier-accumulate (MAC) module electrically connected to the pre-accumulator and the weight mapping table, wherein the MAC module is configured to receive the accumulation value and the weight value that correspond to each of the plurality of data groups, and configured to perform multiplication and accumulation on the accumulation value and the weight value that correspond to each of the plurality of data groups based on a distributive law, thereby generating an inner product value (mathematical calculation).
At Step 2A Prong 2, the additional elements are bolded above. The additional elements do not integrate the abstract ideas into a practical application because the computer elements, which are recited at a high level of generality, provide conventional computer functions that do not impose any meaningful limits on practicing the abstract ideas. See MPEP 2106.05(f). The limitations regarding storing and receiving data are insignificant extra-solution activities of data gathering. The limitation of “sequentially obtain the data addresses and the corresponding weight index values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and driving the weight mapping table to sequentially output the weight values corresponding to the weight index values” is an insignificant extra-solution activity of selecting a particular type of data to be manipulated. The limitations “a weight mapping table”, “a pre-accumulator”, and “a multiplier-accumulate (MAC) module” are the equivalent of reciting “apply it” to the judicial exceptions. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
At Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. As set forth in step 2A prong 2 analysis, the functions of storing and retrieving information is recognized by the courts as well-understood routine and conventional. Additionally, the function of arranging a hierarchy of groups and sorting information claimed at a high level of generality is recognized by the courts to be well-understood, routine, conventional activity. See MPEP 2106.05(d)(II). Furthermore, the “a weight mapping table”, “a pre-accumulator”, and “a multiplier-accumulate (MAC) module” are the equivalent of adding the words “apply it” to the judicial exception and are mere instructions to implement the abstract idea on a computer. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 2, it is directed to the mathematical concept “based on variable length encoding”.
Under Step 2A Prong 2, the claim recites additional elements “configured to store the data address and the corresponding weight index of each of the plurality of data groups”. The additional element does not integrate the abstract ideas into a practical application because the storing does not impose any meaningful limits on practicing the abstract idea as it is mere data gathering. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 3, it is directed to the mathematical concept of “in an order of from the positive values to the negative values” and “weight values corresponding to the plurality of data groups comprise positive values and negative values”.
Under Step 2A Prong 2, the claim recites additional element “store corresponding the data addresses”. The additional element does not integrate the abstract ideas into a practical application because the storing does not impose any meaningful limits on practicing the abstract idea. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 4, it is directed to the mathematical concept of “an order of from a smallest the negative value to a largest the negative value, and the data corresponding to the smallest the negative value is closer to the data address corresponding to the positive value than the data address corresponding to the largest the negative value”.
Under Step 2A Prong 2, the claim recites additional element “store corresponding the data addresses”. The additional element does not integrate the abstract ideas into a practical application because the storing does not impose any meaningful limits on practicing the abstract idea. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 5, it is directed to the mathematical concept of “multiply the accumulation value and the weight value that correspond to each of the plurality of data groups, thereby generating product values” and “accumulate the product values, thereby generating the inner product value”.
Under Step 2A Prong 2, the claim recites additional elements “multiplier” and “accumulator”. The additional element does not integrate the abstract ideas into a practical application because the “multiplier” and “accumulator” are recited at a high level of generality and do not impose any meaningful limits on practicing the abstract idea, as they are the equivalent of reciting “apply it” to the abstract ideas. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 6, it is directed to the mathematical concept of “perform an activation function, a rounding function, or a saturation function on the inner product value”.
Under Step 2A Prong 2, the claim recites additional element “function processor”. The additional element does not integrate the abstract ideas into a practical application because the “function processor” is recited at a high level of generality and does not impose any meaningful limits on practicing the abstract idea, as it is the equivalent of reciting “apply it” to the abstract ideas. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claim 7, under Step 2A Prong 2, the claim recites additional element “is applied to a neural network, a filter, or a related computation”. The additional element does not integrate the abstract ideas into a practical application because the limitation is merely the equivalent of reciting “apply it” to the abstract idea and does not impose any meaningful limits on practicing the abstract idea. Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application, and the claim is directed to the judicial exception.
Under Step 2B, the additional elements do not, alone or in combination, amount to significantly more than the recited judicial exception. Even when considered in combination, these additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which do not provide an inventive concept. The claim is not eligible.
Regarding claims 8-14, the claims are directed to a device that would be practiced by the device of claims 1-7, respectively. All steps performed by the device of claims 8-14 are executed by the apparatus in claims 1-7, respectively, as configured. The analysis of 1-7 applies equally to claims 8-14.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 5-8, 10, 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Yan et al. (US 20210350205 A1, hereinafter “Yan”) in view of Han et al. (US 20210182666 A1, hereinafter “Han”).
As per claim 1, Yan teaches A device for computing an inner product comprising: a data memory configured to store a plurality of data groups, wherein each of the plurality of data groups comprises data values (Yan: Fig. 12 element 1204; [0128]);
an inverted index memory (IIM) configured to store a data address and a corresponding weight index value of each of the plurality of data groups in the data memory (Yan: Fig. 12 element 1202; [0085], [0087], [0150]);
a weight mapping table configured to store a weight value corresponding to the weight index value (Yan: Fig. 12 element 1203; [0085]);
a controller electrically connected to the data memory, the IIM, and the weight mapping table (Yan: Fig. 12 element 123),
a pre-accumulator electrically connected to the data memory, wherein the pre-accumulator is configured to receive and accumulate the data values of each of the plurality of data groups to generate accumulation values (Yan: Fig. 13 element 131; [0134]);
and a multiplier-accumulate (MAC) module electrically connected to the pre-accumulator and the weight mapping table, wherein the MAC module is configured to receive the accumulation value and the weight value that correspond to each of the plurality of data groups, and configured to perform multiplication and accumulation on the accumulation value and the weight value that correspond to each of the plurality of data groups based on a distributive law (Yan Fig. 13 element 132; [0140]),
However, while Yan discloses a control unit sending instructions ([0133]) and convolution processing, Yan does not explicitly disclose the functions of the control unit instructions nor the processing method resulting in an inner product. Thus, Yan does not teach wherein the controller is configured to sequentially obtain the data addresses and the corresponding weight index values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and driving the weight mapping table to sequentially output the weight values corresponding to the weight index values; thereby generating an inner product value.
Han teaches wherein the controller is configured to sequentially obtain the data addresses and the corresponding weight index values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and driving the weight mapping table to sequentially output the weight values corresponding to the weight index values (Han: [0069]); thereby generating an inner product value (Han: [0035]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the control unit of Yan with the control unit of Han. One would have been motivated to combine these references because both references disclose neural network processors, and controlling the weight storage data method of Han improves the efficiency of convolution operation (Han: [0058]).
As per claim 3, Yan/Han further teaches The device for computing an inner product according to claim 1, wherein the weight values corresponding to the plurality of data groups comprise positive values and negative values, and the IIM is configured to store corresponding the data addresses in an order of from the positive values to the negative values (Yan: Fig. 10; [0124]).
As per claim 5, Yan/Han further teaches The device for computing an inner product according to claim 1, wherein the MAC module includes: a multiplier electrically connected to the pre-accumulator and the weight mapping table, wherein the multiplier is configured to receive and multiply the accumulation value and the weight value that correspond to each of the plurality of data groups, thereby generating product values (Yan: Fig. 13 element 1307; [0140]);
and an accumulator electrically connected to the multiplier and configured to receive and accumulate the product values, thereby generating the inner product value (Yan: Fig. 13 element 1309; [0140]).
As per claim 6, Yan teaches The device for computing an inner product according to claim 5,
Yan does not explicitly disclose post-processing after completing the multiply-accumulate. Thus, Yan does not teach wherein the accumulator is further electrically connected to a function processor, and the function processor is configured to perform an activation function, a rounding function, or a saturation function on the inner product value.
Han teaches wherein the accumulator is further electrically connected to a function processor, and the function processor is configured to perform an activation function, a rounding function, or a saturation function on the inner product value (Han: Fig. 5 pooling unit and/or activation unit; [0071]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the class multiplication and partial sum unit of Yan with activation and/or pooling unit of Han. One would have been motivated to combine these references because both references disclose neural network processors, and combining prior art elements according to known methods to yield predictable results (neural network processor performing neural network operations (Han: [0004]).
As per claim 7, Yan/Han further teaches The device for computing an inner product according to claim 1, wherein the inner product value is applied to a neural network, a filter, or a related computation (Yan: abstract).
As per claim 8, Yan teaches A device for computing an inner product comprising: a data memory configured to store a plurality of data groups, wherein each of the plurality of data groups comprises data values (Yan: Fig. 12 element 1204; [0128]);
an inverted index memory (IIM) configured to store a data address and a corresponding weight value of each of the plurality of data groups in the data memory (Yan: Fig. 12 elements 1202, 1203; [0085], [0087], [0150]);
a controller electrically connected to the data memory and the IIM (Yan: Fig. 12 element 123),
a pre-accumulator electrically connected to the data memory, wherein the pre-accumulator is configured to receive and accumulate the data values of each of the plurality of data groups to generate accumulation values (Yan: Fig. 13 element 131; [0134]);
and a multiplier-accumulate (MAC) module electrically connected to the pre-accumulator and the controller, wherein the MAC module is configured to receive the accumulation value and the weight value that correspond to each of the plurality of data groups, and configured to perform multiplication and accumulation on the accumulation value and the weight value that correspond to each of the plurality of data groups based on a distributive law (Yan Fig. 13 element 132; [0140]),
However, while Yan discloses a control unit sending instructions ([0133]) and convolution processing, Yan does not explicitly disclose the functions of the control unit instructions nor the processing method resulting in an inner product. Thus, Yan does not teach wherein the controller is configured to sequentially obtain the data addresses and the corresponding weight values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and to sequentially output the weight values corresponding to the plurality of data groups; thereby generating an inner product value.
Han teaches wherein the controller is configured to sequentially obtain the data addresses and the corresponding weight values of the plurality of data groups from the IIM, thereby driving the data memory to sequentially output the data values of the plurality of data groups and to sequentially output the weight values corresponding to the plurality of data groups (Han: [0069]); thereby generating an inner product value (Han: [0035]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the control unit of Yan with the control unit of Han. One would have been motivated to combine these references because both references disclose neural network processors, and controlling the weight storage data method of Han improves the efficiency of convolution operation (Han: [0058]).
As per claims 10, 12-14, the claims are directed to a device that implements the same or similar features as the device of claims 3, 5-7, and are therefore rejected for at least the same reasons therein.
Claims 2, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Yan/Han in further view of Davis et al. (US 20140108481 A1, hereinafter “Davis).
As per claim 2, Yan/Han teaches The device for computing an inner product according to claim 1,
Yan does not explicitly disclose storing weights based on variable length coding. Thus, Yan does not teach wherein the IIM is configured to store the data address and the corresponding weight index value of each of the plurality of data groups based on variable length coding.
Davis teaches wherein the IIM is configured to store the data address and the corresponding weight index value of each of the plurality of data groups based on variable length coding (Davis: Fig. 7; [0031]-[0032]).
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to modify, with a reasonable expectation of success, the weight storage of Yan with the variable length coding of Davis. One would have been motivated to combine these references because both references disclose handling nonzero and zero elements, and the variable-length encoding of Davis reduces storage overhead (Davis: [0032]).
As per claim 9, the claim is directed to a device that implements the same or similar features as the device of claim 2, and is therefore rejected for at least the same reasons therein.
Allowable Subject Matter
Claims 4, 11 would be allowable if rewritten to overcome the rejections under 35 USC 101 set forth in this Office Action and rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As to claims 4, 11, the prior art of record does not teach or suggest a combination as claimed including: wherein the IIM is configured to store corresponding the data addresses in an order of from a smallest the negative value to a largest the negative value, and the data address corresponding to the smallest the negative value is closer to the data address corresponding to the positive value than the data address corresponding to the largest the negative value.
Yan discloses ordering classes b values (Fig. 10). However, Yan separates the positive and negative values into separate classes ([0042]). Yan does not suggest a correlation of data addresses across different classes such that the smaller negative values are closer to positive values than largest negative value. Therefore, Yan does not teach or suggest a combination as claimed including the limitations identified above.
Han discloses obtaining weight by establishing indexes ([0064]) that are stored sequentially ([0052]) and obtaining corresponding input feature map data ([0057]). Han does not suggest a correlation of the input neuron addresses with the weight indexes. Therefore, Han does not teach or suggest a combination as claimed including the limitations identified above.
Xi et al. (US 20200342288 A1, hereinafter “Xi”) discloses generating partial sums before multiply/sum module (Fig. 4). The Partial Sum Generator sums elements of training data corresponding to a centroid value ([0062]), wherein centroid values are approximation of the weight values ([0044]). Xi does not suggest ordering the data address based on data values. Therefore, Xi does not teach or suggest a combination as claimed including the limitations identified above.
Rhee et al. (US 20190149134 A1, hereinafter “Rhee”) discloses performing convolution logic with product of sums operations ([0037]). Rhee does not suggest ordering addresses based on data values. Therefore, Rhee does not teach or suggest a combination as claimed including the limitations identified above.
Conclusion
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/P.N.L./
Phat LeExaminer, Art Unit 2182 (571) 272-0546
/ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182
Prosecution Insights